1 //===- X86DisassemblerTables.cpp - Disassembler tables ----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file is part of the X86 Disassembler Emitter.
10 // It contains the implementation of the disassembler tables.
11 // Documentation for the disassembler emitter in general can be found in
12 //  X86DisassemblerEmitter.h.
13 //
14 //===----------------------------------------------------------------------===//
15 
16 #include "X86DisassemblerTables.h"
17 #include "X86DisassemblerShared.h"
18 #include "X86ModRMFilters.h"
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include "llvm/Support/Format.h"
22 #include "llvm/Support/raw_ostream.h"
23 #include <map>
24 
25 using namespace llvm;
26 using namespace X86Disassembler;
27 
28 /// stringForContext - Returns a string containing the name of a particular
29 ///   InstructionContext, usually for diagnostic purposes.
30 ///
31 /// @param insnContext  - The instruction class to transform to a string.
32 /// @return           - A statically-allocated string constant that contains the
33 ///                     name of the instruction class.
stringForContext(InstructionContext insnContext)34 static inline const char *stringForContext(InstructionContext insnContext) {
35   switch (insnContext) {
36   default:
37     llvm_unreachable("Unhandled instruction class");
38 #define ENUM_ENTRY(n, r, d)                                                    \
39   case n:                                                                      \
40     return #n;                                                                 \
41     break;
42 #define ENUM_ENTRY_K_B(n, r, d)                                                \
43   ENUM_ENTRY(n, r, d)                                                          \
44   ENUM_ENTRY(n##_K_B, r, d) ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d)   \
45       ENUM_ENTRY(n##_B, r, d) ENUM_ENTRY(n##_KZ_B, r, d)
46     INSTRUCTION_CONTEXTS
47 #undef ENUM_ENTRY
48 #undef ENUM_ENTRY_K_B
49   }
50 }
51 
52 /// stringForOperandType - Like stringForContext, but for OperandTypes.
stringForOperandType(OperandType type)53 static inline const char *stringForOperandType(OperandType type) {
54   switch (type) {
55   default:
56     llvm_unreachable("Unhandled type");
57 #define ENUM_ENTRY(i, d)                                                       \
58   case i:                                                                      \
59     return #i;
60     TYPES
61 #undef ENUM_ENTRY
62   }
63 }
64 
65 /// stringForOperandEncoding - like stringForContext, but for
66 ///   OperandEncodings.
stringForOperandEncoding(OperandEncoding encoding)67 static inline const char *stringForOperandEncoding(OperandEncoding encoding) {
68   switch (encoding) {
69   default:
70     llvm_unreachable("Unhandled encoding");
71 #define ENUM_ENTRY(i, d)                                                       \
72   case i:                                                                      \
73     return #i;
74     ENCODINGS
75 #undef ENUM_ENTRY
76   }
77 }
78 
79 /// inheritsFrom - Indicates whether all instructions in one class also belong
80 ///   to another class.
81 ///
82 /// @param child  - The class that may be the subset
83 /// @param parent - The class that may be the superset
84 /// @return       - True if child is a subset of parent, false otherwise.
inheritsFrom(InstructionContext child,InstructionContext parent,bool noPrefix=true,bool VEX_LIG=false,bool WIG=false,bool AdSize64=false)85 static inline bool inheritsFrom(InstructionContext child,
86                                 InstructionContext parent, bool noPrefix = true,
87                                 bool VEX_LIG = false, bool WIG = false,
88                                 bool AdSize64 = false) {
89   if (child == parent)
90     return true;
91 
92   switch (parent) {
93   case IC:
94     return (inheritsFrom(child, IC_64BIT, AdSize64) ||
95             (noPrefix && inheritsFrom(child, IC_OPSIZE, noPrefix)) ||
96             inheritsFrom(child, IC_ADSIZE) ||
97             (noPrefix && inheritsFrom(child, IC_XD, noPrefix)) ||
98             (noPrefix && inheritsFrom(child, IC_XS, noPrefix)));
99   case IC_64BIT:
100     return (inheritsFrom(child, IC_64BIT_REXW) ||
101             (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE, noPrefix)) ||
102             (!AdSize64 && inheritsFrom(child, IC_64BIT_ADSIZE)) ||
103             (noPrefix && inheritsFrom(child, IC_64BIT_XD, noPrefix)) ||
104             (noPrefix && inheritsFrom(child, IC_64BIT_XS, noPrefix)));
105   case IC_OPSIZE:
106     return inheritsFrom(child, IC_64BIT_OPSIZE) ||
107            inheritsFrom(child, IC_OPSIZE_ADSIZE);
108   case IC_ADSIZE:
109     return (noPrefix && inheritsFrom(child, IC_OPSIZE_ADSIZE, noPrefix));
110   case IC_OPSIZE_ADSIZE:
111     return false;
112   case IC_64BIT_ADSIZE:
113     return (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE, noPrefix));
114   case IC_64BIT_OPSIZE_ADSIZE:
115     return false;
116   case IC_XD:
117     return inheritsFrom(child, IC_64BIT_XD);
118   case IC_XS:
119     return inheritsFrom(child, IC_64BIT_XS);
120   case IC_XD_OPSIZE:
121     return inheritsFrom(child, IC_64BIT_XD_OPSIZE);
122   case IC_XS_OPSIZE:
123     return inheritsFrom(child, IC_64BIT_XS_OPSIZE);
124   case IC_XD_ADSIZE:
125     return inheritsFrom(child, IC_64BIT_XD_ADSIZE);
126   case IC_XS_ADSIZE:
127     return inheritsFrom(child, IC_64BIT_XS_ADSIZE);
128   case IC_64BIT_REXW:
129     return ((noPrefix && inheritsFrom(child, IC_64BIT_REXW_XS, noPrefix)) ||
130             (noPrefix && inheritsFrom(child, IC_64BIT_REXW_XD, noPrefix)) ||
131             (noPrefix && inheritsFrom(child, IC_64BIT_REXW_OPSIZE, noPrefix)) ||
132             (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE)));
133   case IC_64BIT_OPSIZE:
134     return inheritsFrom(child, IC_64BIT_REXW_OPSIZE) ||
135            (!AdSize64 && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE)) ||
136            (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE));
137   case IC_64BIT_XD:
138     return (inheritsFrom(child, IC_64BIT_REXW_XD) ||
139             (!AdSize64 && inheritsFrom(child, IC_64BIT_XD_ADSIZE)));
140   case IC_64BIT_XS:
141     return (inheritsFrom(child, IC_64BIT_REXW_XS) ||
142             (!AdSize64 && inheritsFrom(child, IC_64BIT_XS_ADSIZE)));
143   case IC_64BIT_XD_OPSIZE:
144   case IC_64BIT_XS_OPSIZE:
145     return false;
146   case IC_64BIT_XD_ADSIZE:
147   case IC_64BIT_XS_ADSIZE:
148     return false;
149   case IC_64BIT_REXW_XD:
150   case IC_64BIT_REXW_XS:
151   case IC_64BIT_REXW_OPSIZE:
152   case IC_64BIT_REXW_ADSIZE:
153   case IC_64BIT_REX2:
154     return false;
155   case IC_VEX:
156     return (VEX_LIG && WIG && inheritsFrom(child, IC_VEX_L_W)) ||
157            (WIG && inheritsFrom(child, IC_VEX_W)) ||
158            (VEX_LIG && inheritsFrom(child, IC_VEX_L));
159   case IC_VEX_XS:
160     return (VEX_LIG && WIG && inheritsFrom(child, IC_VEX_L_W_XS)) ||
161            (WIG && inheritsFrom(child, IC_VEX_W_XS)) ||
162            (VEX_LIG && inheritsFrom(child, IC_VEX_L_XS));
163   case IC_VEX_XD:
164     return (VEX_LIG && WIG && inheritsFrom(child, IC_VEX_L_W_XD)) ||
165            (WIG && inheritsFrom(child, IC_VEX_W_XD)) ||
166            (VEX_LIG && inheritsFrom(child, IC_VEX_L_XD));
167   case IC_VEX_OPSIZE:
168     return (VEX_LIG && WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE)) ||
169            (WIG && inheritsFrom(child, IC_VEX_W_OPSIZE)) ||
170            (VEX_LIG && inheritsFrom(child, IC_VEX_L_OPSIZE));
171   case IC_VEX_W:
172     return VEX_LIG && inheritsFrom(child, IC_VEX_L_W);
173   case IC_VEX_W_XS:
174     return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XS);
175   case IC_VEX_W_XD:
176     return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XD);
177   case IC_VEX_W_OPSIZE:
178     return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE);
179   case IC_VEX_L:
180     return WIG && inheritsFrom(child, IC_VEX_L_W);
181   case IC_VEX_L_XS:
182     return WIG && inheritsFrom(child, IC_VEX_L_W_XS);
183   case IC_VEX_L_XD:
184     return WIG && inheritsFrom(child, IC_VEX_L_W_XD);
185   case IC_VEX_L_OPSIZE:
186     return WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE);
187   case IC_VEX_L_W:
188   case IC_VEX_L_W_XS:
189   case IC_VEX_L_W_XD:
190   case IC_VEX_L_W_OPSIZE:
191     return false;
192   case IC_EVEX:
193     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W)) ||
194            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W)) ||
195            (WIG && inheritsFrom(child, IC_EVEX_W)) ||
196            (VEX_LIG && inheritsFrom(child, IC_EVEX_L)) ||
197            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2));
198   case IC_EVEX_XS:
199     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XS)) ||
200            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XS)) ||
201            (WIG && inheritsFrom(child, IC_EVEX_W_XS)) ||
202            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS)) ||
203            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS));
204   case IC_EVEX_XD:
205     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XD)) ||
206            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XD)) ||
207            (WIG && inheritsFrom(child, IC_EVEX_W_XD)) ||
208            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD)) ||
209            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD));
210   case IC_EVEX_OPSIZE:
211     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) ||
212            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE)) ||
213            (WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE)) ||
214            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE)) ||
215            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE));
216   case IC_EVEX_OPSIZE_ADSIZE:
217     return false;
218   case IC_EVEX_K:
219     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_K)) ||
220            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_K)) ||
221            (WIG && inheritsFrom(child, IC_EVEX_W_K)) ||
222            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K)) ||
223            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K));
224   case IC_EVEX_XS_K:
225     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) ||
226            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K)) ||
227            (WIG && inheritsFrom(child, IC_EVEX_W_XS_K)) ||
228            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K)) ||
229            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K));
230   case IC_EVEX_XD_K:
231     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) ||
232            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K)) ||
233            (WIG && inheritsFrom(child, IC_EVEX_W_XD_K)) ||
234            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K)) ||
235            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K));
236   case IC_EVEX_OPSIZE_K:
237     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) ||
238            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K)) ||
239            (WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K)) ||
240            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K)) ||
241            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K));
242   case IC_EVEX_KZ:
243     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) ||
244            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ)) ||
245            (WIG && inheritsFrom(child, IC_EVEX_W_KZ)) ||
246            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ)) ||
247            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ));
248   case IC_EVEX_XS_KZ:
249     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) ||
250            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ)) ||
251            (WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ)) ||
252            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ)) ||
253            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ));
254   case IC_EVEX_XD_KZ:
255     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) ||
256            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ)) ||
257            (WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ)) ||
258            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ)) ||
259            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ));
260   case IC_EVEX_OPSIZE_KZ:
261     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) ||
262            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ)) ||
263            (WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ)) ||
264            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ)) ||
265            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ));
266   case IC_EVEX_W:
267     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W)) ||
268            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W));
269   case IC_EVEX_W_XS:
270     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS)) ||
271            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS));
272   case IC_EVEX_W_XD:
273     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD)) ||
274            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD));
275   case IC_EVEX_W_OPSIZE:
276     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) ||
277            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE));
278   case IC_EVEX_W_K:
279     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K)) ||
280            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K));
281   case IC_EVEX_W_XS_K:
282     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) ||
283            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K));
284   case IC_EVEX_W_XD_K:
285     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) ||
286            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K));
287   case IC_EVEX_W_OPSIZE_K:
288     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) ||
289            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K));
290   case IC_EVEX_W_KZ:
291     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) ||
292            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ));
293   case IC_EVEX_W_XS_KZ:
294     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) ||
295            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ));
296   case IC_EVEX_W_XD_KZ:
297     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) ||
298            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ));
299   case IC_EVEX_W_OPSIZE_KZ:
300     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) ||
301            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ));
302   case IC_EVEX_L:
303     return WIG && inheritsFrom(child, IC_EVEX_L_W);
304   case IC_EVEX_L_XS:
305     return WIG && inheritsFrom(child, IC_EVEX_L_W_XS);
306   case IC_EVEX_L_XD:
307     return WIG && inheritsFrom(child, IC_EVEX_L_W_XD);
308   case IC_EVEX_L_OPSIZE:
309     return WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE);
310   case IC_EVEX_L_K:
311     return WIG && inheritsFrom(child, IC_EVEX_L_W_K);
312   case IC_EVEX_L_XS_K:
313     return WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K);
314   case IC_EVEX_L_XD_K:
315     return WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K);
316   case IC_EVEX_L_OPSIZE_K:
317     return WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K);
318   case IC_EVEX_L_KZ:
319     return WIG && inheritsFrom(child, IC_EVEX_L_W_KZ);
320   case IC_EVEX_L_XS_KZ:
321     return WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ);
322   case IC_EVEX_L_XD_KZ:
323     return WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ);
324   case IC_EVEX_L_OPSIZE_KZ:
325     return WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ);
326   case IC_EVEX_L_W:
327   case IC_EVEX_L_W_XS:
328   case IC_EVEX_L_W_XD:
329   case IC_EVEX_L_W_OPSIZE:
330     return false;
331   case IC_EVEX_L_W_K:
332   case IC_EVEX_L_W_XS_K:
333   case IC_EVEX_L_W_XD_K:
334   case IC_EVEX_L_W_OPSIZE_K:
335     return false;
336   case IC_EVEX_L_W_KZ:
337   case IC_EVEX_L_W_XS_KZ:
338   case IC_EVEX_L_W_XD_KZ:
339   case IC_EVEX_L_W_OPSIZE_KZ:
340     return false;
341   case IC_EVEX_L2:
342     return WIG && inheritsFrom(child, IC_EVEX_L2_W);
343   case IC_EVEX_L2_XS:
344     return WIG && inheritsFrom(child, IC_EVEX_L2_W_XS);
345   case IC_EVEX_L2_XD:
346     return WIG && inheritsFrom(child, IC_EVEX_L2_W_XD);
347   case IC_EVEX_L2_OPSIZE:
348     return WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE);
349   case IC_EVEX_L2_K:
350     return WIG && inheritsFrom(child, IC_EVEX_L2_W_K);
351   case IC_EVEX_L2_XS_K:
352     return WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K);
353   case IC_EVEX_L2_XD_K:
354     return WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K);
355   case IC_EVEX_L2_OPSIZE_K:
356     return WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K);
357   case IC_EVEX_L2_KZ:
358     return WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ);
359   case IC_EVEX_L2_XS_KZ:
360     return WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ);
361   case IC_EVEX_L2_XD_KZ:
362     return WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ);
363   case IC_EVEX_L2_OPSIZE_KZ:
364     return WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ);
365   case IC_EVEX_L2_W:
366   case IC_EVEX_L2_W_XS:
367   case IC_EVEX_L2_W_XD:
368   case IC_EVEX_L2_W_OPSIZE:
369     return false;
370   case IC_EVEX_L2_W_K:
371   case IC_EVEX_L2_W_XS_K:
372   case IC_EVEX_L2_W_XD_K:
373   case IC_EVEX_L2_W_OPSIZE_K:
374     return false;
375   case IC_EVEX_L2_W_KZ:
376   case IC_EVEX_L2_W_XS_KZ:
377   case IC_EVEX_L2_W_XD_KZ:
378   case IC_EVEX_L2_W_OPSIZE_KZ:
379     return false;
380   case IC_EVEX_B:
381     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_B)) ||
382            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_B)) ||
383            (WIG && inheritsFrom(child, IC_EVEX_W_B)) ||
384            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_B)) ||
385            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_B));
386   case IC_EVEX_XS_B:
387     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) ||
388            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B)) ||
389            (WIG && inheritsFrom(child, IC_EVEX_W_XS_B)) ||
390            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_B)) ||
391            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_B));
392   case IC_EVEX_XD_B:
393     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) ||
394            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B)) ||
395            (WIG && inheritsFrom(child, IC_EVEX_W_XD_B)) ||
396            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_B)) ||
397            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_B));
398   case IC_EVEX_OPSIZE_B:
399     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) ||
400            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B)) ||
401            (WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_B)) ||
402            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_B)) ||
403            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_B));
404   case IC_EVEX_K_B:
405     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) ||
406            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B)) ||
407            (WIG && inheritsFrom(child, IC_EVEX_W_K_B)) ||
408            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K_B)) ||
409            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K_B));
410   case IC_EVEX_XS_K_B:
411     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) ||
412            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B)) ||
413            (WIG && inheritsFrom(child, IC_EVEX_W_XS_K_B)) ||
414            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K_B)) ||
415            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K_B));
416   case IC_EVEX_XD_K_B:
417     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) ||
418            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B)) ||
419            (WIG && inheritsFrom(child, IC_EVEX_W_XD_K_B)) ||
420            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K_B)) ||
421            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K_B));
422   case IC_EVEX_OPSIZE_K_B:
423     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) ||
424            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B)) ||
425            (WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K_B)) ||
426            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K_B)) ||
427            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K_B));
428   case IC_EVEX_KZ_B:
429     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) ||
430            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B)) ||
431            (WIG && inheritsFrom(child, IC_EVEX_W_KZ_B)) ||
432            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ_B)) ||
433            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ_B));
434   case IC_EVEX_XS_KZ_B:
435     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) ||
436            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B)) ||
437            (WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ_B)) ||
438            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ_B)) ||
439            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ_B));
440   case IC_EVEX_XD_KZ_B:
441     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) ||
442            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B)) ||
443            (WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ_B)) ||
444            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ_B)) ||
445            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ_B));
446   case IC_EVEX_OPSIZE_KZ_B:
447     return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) ||
448            (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B)) ||
449            (WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ_B)) ||
450            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ_B)) ||
451            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ_B));
452   case IC_EVEX_W_B:
453     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_B)) ||
454            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_B));
455   case IC_EVEX_W_XS_B:
456     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) ||
457            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B));
458   case IC_EVEX_W_XD_B:
459     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) ||
460            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B));
461   case IC_EVEX_W_OPSIZE_B:
462     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) ||
463            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B));
464   case IC_EVEX_W_K_B:
465     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) ||
466            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K_B));
467   case IC_EVEX_W_XS_K_B:
468     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) ||
469            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B));
470   case IC_EVEX_W_XD_K_B:
471     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) ||
472            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B));
473   case IC_EVEX_W_OPSIZE_K_B:
474     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) ||
475            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B));
476   case IC_EVEX_W_KZ_B:
477     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) ||
478            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B));
479   case IC_EVEX_W_XS_KZ_B:
480     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) ||
481            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B));
482   case IC_EVEX_W_XD_KZ_B:
483     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) ||
484            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B));
485   case IC_EVEX_W_OPSIZE_KZ_B:
486     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) ||
487            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B));
488   case IC_EVEX_L_B:
489     return WIG && inheritsFrom(child, IC_EVEX_L_W_B);
490   case IC_EVEX_L_XS_B:
491     return WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B);
492   case IC_EVEX_L_XD_B:
493     return WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B);
494   case IC_EVEX_L_OPSIZE_B:
495     return WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B);
496   case IC_EVEX_L_K_B:
497     return WIG && inheritsFrom(child, IC_EVEX_L_W_K_B);
498   case IC_EVEX_L_XS_K_B:
499     return WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B);
500   case IC_EVEX_L_XD_K_B:
501     return WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B);
502   case IC_EVEX_L_OPSIZE_K_B:
503     return WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B);
504   case IC_EVEX_L_KZ_B:
505     return WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B);
506   case IC_EVEX_L_XS_KZ_B:
507     return WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B);
508   case IC_EVEX_L_XD_KZ_B:
509     return WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B);
510   case IC_EVEX_L_OPSIZE_KZ_B:
511     return WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B);
512   case IC_EVEX_L_W_B:
513   case IC_EVEX_L_W_XS_B:
514   case IC_EVEX_L_W_XD_B:
515   case IC_EVEX_L_W_OPSIZE_B:
516     return false;
517   case IC_EVEX_L_W_K_B:
518   case IC_EVEX_L_W_XS_K_B:
519   case IC_EVEX_L_W_XD_K_B:
520   case IC_EVEX_L_W_OPSIZE_K_B:
521     return false;
522   case IC_EVEX_L_W_KZ_B:
523   case IC_EVEX_L_W_XS_KZ_B:
524   case IC_EVEX_L_W_XD_KZ_B:
525   case IC_EVEX_L_W_OPSIZE_KZ_B:
526     return false;
527   case IC_EVEX_L2_B:
528     return WIG && inheritsFrom(child, IC_EVEX_L2_W_B);
529   case IC_EVEX_L2_XS_B:
530     return WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B);
531   case IC_EVEX_L2_XD_B:
532     return WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B);
533   case IC_EVEX_L2_OPSIZE_B:
534     return WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B);
535   case IC_EVEX_L2_K_B:
536     return WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B);
537   case IC_EVEX_L2_XS_K_B:
538     return WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B);
539   case IC_EVEX_L2_XD_K_B:
540     return WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B);
541   case IC_EVEX_L2_OPSIZE_K_B:
542     return WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B);
543   case IC_EVEX_L2_KZ_B:
544     return WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B);
545   case IC_EVEX_L2_XS_KZ_B:
546     return WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B);
547   case IC_EVEX_L2_XD_KZ_B:
548     return WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B);
549   case IC_EVEX_L2_OPSIZE_KZ_B:
550     return WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B);
551   case IC_EVEX_L2_W_B:
552   case IC_EVEX_L2_W_XS_B:
553   case IC_EVEX_L2_W_XD_B:
554   case IC_EVEX_L2_W_OPSIZE_B:
555     return false;
556   case IC_EVEX_L2_W_K_B:
557   case IC_EVEX_L2_W_XS_K_B:
558   case IC_EVEX_L2_W_XD_K_B:
559   case IC_EVEX_L2_W_OPSIZE_K_B:
560     return false;
561   case IC_EVEX_L2_W_KZ_B:
562   case IC_EVEX_L2_W_XS_KZ_B:
563   case IC_EVEX_L2_W_XD_KZ_B:
564   case IC_EVEX_L2_W_OPSIZE_KZ_B:
565     return false;
566   case IC_EVEX_NF:
567   case IC_EVEX_B_NF:
568   case IC_EVEX_OPSIZE_NF:
569   case IC_EVEX_OPSIZE_B_NF:
570   case IC_EVEX_W_NF:
571   case IC_EVEX_W_B_NF:
572     return false;
573   default:
574     errs() << "Unknown instruction class: "
575            << stringForContext((InstructionContext)parent) << "\n";
576     llvm_unreachable("Unknown instruction class");
577   }
578 }
579 
580 /// outranks - Indicates whether, if an instruction has two different applicable
581 ///   classes, which class should be preferred when performing decode.  This
582 ///   imposes a total ordering (ties are resolved toward "lower")
583 ///
584 /// @param upper  - The class that may be preferable
585 /// @param lower  - The class that may be less preferable
586 /// @return       - True if upper is to be preferred, false otherwise.
outranks(InstructionContext upper,InstructionContext lower)587 static inline bool outranks(InstructionContext upper,
588                             InstructionContext lower) {
589   assert(upper < IC_max);
590   assert(lower < IC_max);
591 
592 #define ENUM_ENTRY(n, r, d) r,
593 #define ENUM_ENTRY_K_B(n, r, d)                                                \
594   ENUM_ENTRY(n, r, d)                                                          \
595   ENUM_ENTRY(n##_K_B, r, d)                                                    \
596   ENUM_ENTRY(n##_KZ_B, r, d) ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d)  \
597       ENUM_ENTRY(n##_B, r, d)
598   static int ranks[IC_max] = {INSTRUCTION_CONTEXTS};
599 #undef ENUM_ENTRY
600 #undef ENUM_ENTRY_K_B
601 
602   return (ranks[upper] > ranks[lower]);
603 }
604 
605 /// getDecisionType - Determines whether a ModRM decision with 255 entries can
606 ///   be compacted by eliminating redundant information.
607 ///
608 /// @param decision - The decision to be compacted.
609 /// @return         - The compactest available representation for the decision.
getDecisionType(ModRMDecision & decision)610 static ModRMDecisionType getDecisionType(ModRMDecision &decision) {
611   bool satisfiesOneEntry = true;
612   bool satisfiesSplitRM = true;
613   bool satisfiesSplitReg = true;
614   bool satisfiesSplitMisc = true;
615 
616   for (unsigned index = 0; index < 256; ++index) {
617     if (decision.instructionIDs[index] != decision.instructionIDs[0])
618       satisfiesOneEntry = false;
619 
620     if (((index & 0xc0) == 0xc0) &&
621         (decision.instructionIDs[index] != decision.instructionIDs[0xc0]))
622       satisfiesSplitRM = false;
623 
624     if (((index & 0xc0) != 0xc0) &&
625         (decision.instructionIDs[index] != decision.instructionIDs[0x00]))
626       satisfiesSplitRM = false;
627 
628     if (((index & 0xc0) == 0xc0) && (decision.instructionIDs[index] !=
629                                      decision.instructionIDs[index & 0xf8]))
630       satisfiesSplitReg = false;
631 
632     if (((index & 0xc0) != 0xc0) && (decision.instructionIDs[index] !=
633                                      decision.instructionIDs[index & 0x38]))
634       satisfiesSplitMisc = false;
635   }
636 
637   if (satisfiesOneEntry)
638     return MODRM_ONEENTRY;
639 
640   if (satisfiesSplitRM)
641     return MODRM_SPLITRM;
642 
643   if (satisfiesSplitReg && satisfiesSplitMisc)
644     return MODRM_SPLITREG;
645 
646   if (satisfiesSplitMisc)
647     return MODRM_SPLITMISC;
648 
649   return MODRM_FULL;
650 }
651 
652 /// stringForDecisionType - Returns a statically-allocated string corresponding
653 ///   to a particular decision type.
654 ///
655 /// @param dt - The decision type.
656 /// @return   - A pointer to the statically-allocated string (e.g.,
657 ///             "MODRM_ONEENTRY" for MODRM_ONEENTRY).
stringForDecisionType(ModRMDecisionType dt)658 static const char *stringForDecisionType(ModRMDecisionType dt) {
659 #define ENUM_ENTRY(n)                                                          \
660   case n:                                                                      \
661     return #n;
662   switch (dt) {
663   default:
664     llvm_unreachable("Unknown decision type");
665     MODRMTYPES
666   };
667 #undef ENUM_ENTRY
668 }
669 
DisassemblerTables()670 DisassemblerTables::DisassemblerTables() {
671   for (unsigned i = 0; i < std::size(Tables); i++)
672     Tables[i] = std::make_unique<ContextDecision>();
673 
674   HasConflicts = false;
675 }
676 
~DisassemblerTables()677 DisassemblerTables::~DisassemblerTables() {}
678 
emitModRMDecision(raw_ostream & o1,raw_ostream & o2,unsigned & i1,unsigned & i2,unsigned & ModRMTableNum,ModRMDecision & decision) const679 void DisassemblerTables::emitModRMDecision(raw_ostream &o1, raw_ostream &o2,
680                                            unsigned &i1, unsigned &i2,
681                                            unsigned &ModRMTableNum,
682                                            ModRMDecision &decision) const {
683   static uint32_t sEntryNumber = 1;
684   ModRMDecisionType dt = getDecisionType(decision);
685 
686   if (dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0) {
687     // Empty table.
688     o2 << "{" << stringForDecisionType(dt) << ", 0}";
689     return;
690   }
691 
692   std::vector<unsigned> ModRMDecision;
693 
694   switch (dt) {
695   default:
696     llvm_unreachable("Unknown decision type");
697   case MODRM_ONEENTRY:
698     ModRMDecision.push_back(decision.instructionIDs[0]);
699     break;
700   case MODRM_SPLITRM:
701     ModRMDecision.push_back(decision.instructionIDs[0x00]);
702     ModRMDecision.push_back(decision.instructionIDs[0xc0]);
703     break;
704   case MODRM_SPLITREG:
705     for (unsigned index = 0; index < 64; index += 8)
706       ModRMDecision.push_back(decision.instructionIDs[index]);
707     for (unsigned index = 0xc0; index < 256; index += 8)
708       ModRMDecision.push_back(decision.instructionIDs[index]);
709     break;
710   case MODRM_SPLITMISC:
711     for (unsigned index = 0; index < 64; index += 8)
712       ModRMDecision.push_back(decision.instructionIDs[index]);
713     for (unsigned index = 0xc0; index < 256; ++index)
714       ModRMDecision.push_back(decision.instructionIDs[index]);
715     break;
716   case MODRM_FULL:
717     for (unsigned short InstructionID : decision.instructionIDs)
718       ModRMDecision.push_back(InstructionID);
719     break;
720   }
721 
722   unsigned &EntryNumber = ModRMTable[ModRMDecision];
723   if (EntryNumber == 0) {
724     EntryNumber = ModRMTableNum;
725 
726     ModRMTableNum += ModRMDecision.size();
727     o1 << "/*Table" << EntryNumber << "*/\n";
728     i1++;
729     for (unsigned I : ModRMDecision) {
730       o1.indent(i1 * 2) << format("0x%hx", I) << ", /*"
731                         << InstructionSpecifiers[I].name << "*/\n";
732     }
733     i1--;
734   }
735 
736   o2 << "{" << stringForDecisionType(dt) << ", " << EntryNumber << "}";
737 
738   switch (dt) {
739   default:
740     llvm_unreachable("Unknown decision type");
741   case MODRM_ONEENTRY:
742     sEntryNumber += 1;
743     break;
744   case MODRM_SPLITRM:
745     sEntryNumber += 2;
746     break;
747   case MODRM_SPLITREG:
748     sEntryNumber += 16;
749     break;
750   case MODRM_SPLITMISC:
751     sEntryNumber += 8 + 64;
752     break;
753   case MODRM_FULL:
754     sEntryNumber += 256;
755     break;
756   }
757 
758   // We assume that the index can fit into uint16_t.
759   assert(sEntryNumber < 65536U &&
760          "Index into ModRMDecision is too large for uint16_t!");
761   (void)sEntryNumber;
762 }
763 
emitOpcodeDecision(raw_ostream & o1,raw_ostream & o2,unsigned & i1,unsigned & i2,unsigned & ModRMTableNum,OpcodeDecision & opDecision) const764 void DisassemblerTables::emitOpcodeDecision(raw_ostream &o1, raw_ostream &o2,
765                                             unsigned &i1, unsigned &i2,
766                                             unsigned &ModRMTableNum,
767                                             OpcodeDecision &opDecision) const {
768   o2 << "{";
769   ++i2;
770 
771   unsigned index;
772   for (index = 0; index < 256; ++index) {
773     auto &decision = opDecision.modRMDecisions[index];
774     ModRMDecisionType dt = getDecisionType(decision);
775     if (!(dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0))
776       break;
777   }
778   if (index == 256) {
779     // If all 256 entries are MODRM_ONEENTRY, omit output.
780     static_assert(MODRM_ONEENTRY == 0);
781     --i2;
782     o2 << "},\n";
783   } else {
784     o2 << " /* struct OpcodeDecision */ {\n";
785     for (index = 0; index < 256; ++index) {
786       o2.indent(i2);
787 
788       o2 << "/*0x" << format("%02hhx", index) << "*/";
789 
790       emitModRMDecision(o1, o2, i1, i2, ModRMTableNum,
791                         opDecision.modRMDecisions[index]);
792 
793       if (index < 255)
794         o2 << ",";
795 
796       o2 << "\n";
797     }
798     o2.indent(i2) << "}\n";
799     --i2;
800     o2.indent(i2) << "},\n";
801   }
802 }
803 
emitContextDecision(raw_ostream & o1,raw_ostream & o2,unsigned & i1,unsigned & i2,unsigned & ModRMTableNum,ContextDecision & decision,const char * name) const804 void DisassemblerTables::emitContextDecision(raw_ostream &o1, raw_ostream &o2,
805                                              unsigned &i1, unsigned &i2,
806                                              unsigned &ModRMTableNum,
807                                              ContextDecision &decision,
808                                              const char *name) const {
809   o2.indent(i2) << "static const struct ContextDecision " << name
810                 << " = {{/* opcodeDecisions */\n";
811   i2++;
812 
813   for (unsigned index = 0; index < IC_max; ++index) {
814     o2.indent(i2) << "/*";
815     o2 << stringForContext((InstructionContext)index);
816     o2 << "*/ ";
817 
818     emitOpcodeDecision(o1, o2, i1, i2, ModRMTableNum,
819                        decision.opcodeDecisions[index]);
820   }
821 
822   i2--;
823   o2.indent(i2) << "}};" << "\n";
824 }
825 
emitInstructionInfo(raw_ostream & o,unsigned & i) const826 void DisassemblerTables::emitInstructionInfo(raw_ostream &o,
827                                              unsigned &i) const {
828   unsigned NumInstructions = InstructionSpecifiers.size();
829 
830   o << "static const struct OperandSpecifier x86OperandSets[]["
831     << X86_MAX_OPERANDS << "] = {\n";
832 
833   typedef SmallVector<std::pair<OperandEncoding, OperandType>, X86_MAX_OPERANDS>
834       OperandListTy;
835   std::map<OperandListTy, unsigned> OperandSets;
836 
837   unsigned OperandSetNum = 0;
838   for (unsigned Index = 0; Index < NumInstructions; ++Index) {
839     OperandListTy OperandList;
840 
841     for (auto Operand : InstructionSpecifiers[Index].operands) {
842       OperandEncoding Encoding = (OperandEncoding)Operand.encoding;
843       OperandType Type = (OperandType)Operand.type;
844       OperandList.push_back(std::make_pair(Encoding, Type));
845     }
846     unsigned &N = OperandSets[OperandList];
847     if (N != 0)
848       continue;
849 
850     N = ++OperandSetNum;
851 
852     o << "  { /* " << (OperandSetNum - 1) << " */\n";
853     for (unsigned i = 0, e = OperandList.size(); i != e; ++i) {
854       const char *Encoding = stringForOperandEncoding(OperandList[i].first);
855       const char *Type = stringForOperandType(OperandList[i].second);
856       o << "    { " << Encoding << ", " << Type << " },\n";
857     }
858     o << "  },\n";
859   }
860   o << "};" << "\n\n";
861 
862   o.indent(i * 2) << "static const struct InstructionSpecifier ";
863   o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n";
864 
865   i++;
866 
867   for (unsigned index = 0; index < NumInstructions; ++index) {
868     o.indent(i * 2) << "{ /* " << index << " */\n";
869     i++;
870 
871     OperandListTy OperandList;
872     for (auto Operand : InstructionSpecifiers[index].operands) {
873       OperandEncoding Encoding = (OperandEncoding)Operand.encoding;
874       OperandType Type = (OperandType)Operand.type;
875       OperandList.push_back(std::make_pair(Encoding, Type));
876     }
877     o.indent(i * 2) << (OperandSets[OperandList] - 1) << ",\n";
878 
879     o.indent(i * 2) << "/* " << InstructionSpecifiers[index].name << " */\n";
880 
881     i--;
882     o.indent(i * 2) << "},\n";
883   }
884 
885   i--;
886   o.indent(i * 2) << "};" << "\n";
887 }
888 
emitContextTable(raw_ostream & o,unsigned & i) const889 void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const {
890   o.indent(i * 2) << "static const uint8_t " CONTEXTS_STR "[" << ATTR_max
891                   << "] = {\n";
892   i++;
893 
894   for (unsigned index = 0; index < ATTR_max; ++index) {
895     o.indent(i * 2);
896 
897     if ((index & ATTR_EVEX) && (index & ATTR_OPSIZE) && (index & ATTR_ADSIZE))
898       o << "IC_EVEX_OPSIZE_ADSIZE";
899     else if (index & ATTR_EVEXNF) {
900       o << "IC_EVEX";
901       if (index & ATTR_REXW)
902         o << "_W";
903       else if (index & ATTR_OPSIZE)
904         o << "_OPSIZE";
905 
906       if (index & ATTR_EVEXB)
907         o << "_B";
908 
909       o << "_NF";
910     } else if ((index & ATTR_EVEX) || (index & ATTR_VEX) ||
911                (index & ATTR_VEXL)) {
912       if (index & ATTR_EVEX)
913         o << "IC_EVEX";
914       else
915         o << "IC_VEX";
916 
917       if ((index & ATTR_EVEX) && (index & ATTR_EVEXL2))
918         o << "_L2";
919       else if (index & ATTR_VEXL)
920         o << "_L";
921 
922       if (index & ATTR_REXW)
923         o << "_W";
924 
925       if (index & ATTR_OPSIZE)
926         o << "_OPSIZE";
927       else if (index & ATTR_XD)
928         o << "_XD";
929       else if (index & ATTR_XS)
930         o << "_XS";
931 
932       if (index & ATTR_EVEX) {
933         if (index & ATTR_EVEXKZ)
934           o << "_KZ";
935         else if (index & ATTR_EVEXK)
936           o << "_K";
937 
938         if (index & ATTR_EVEXB)
939           o << "_B";
940       }
941     } else if ((index & ATTR_64BIT) && (index & ATTR_REX2))
942       o << "IC_64BIT_REX2";
943     else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS))
944       o << "IC_64BIT_REXW_XS";
945     else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD))
946       o << "IC_64BIT_REXW_XD";
947     else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
948              (index & ATTR_OPSIZE))
949       o << "IC_64BIT_REXW_OPSIZE";
950     else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
951              (index & ATTR_ADSIZE))
952       o << "IC_64BIT_REXW_ADSIZE";
953     else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_OPSIZE))
954       o << "IC_64BIT_XD_OPSIZE";
955     else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_ADSIZE))
956       o << "IC_64BIT_XD_ADSIZE";
957     else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_OPSIZE))
958       o << "IC_64BIT_XS_OPSIZE";
959     else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_ADSIZE))
960       o << "IC_64BIT_XS_ADSIZE";
961     else if ((index & ATTR_64BIT) && (index & ATTR_XS))
962       o << "IC_64BIT_XS";
963     else if ((index & ATTR_64BIT) && (index & ATTR_XD))
964       o << "IC_64BIT_XD";
965     else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE) &&
966              (index & ATTR_ADSIZE))
967       o << "IC_64BIT_OPSIZE_ADSIZE";
968     else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE))
969       o << "IC_64BIT_OPSIZE";
970     else if ((index & ATTR_64BIT) && (index & ATTR_ADSIZE))
971       o << "IC_64BIT_ADSIZE";
972     else if ((index & ATTR_64BIT) && (index & ATTR_REXW))
973       o << "IC_64BIT_REXW";
974     else if ((index & ATTR_64BIT))
975       o << "IC_64BIT";
976     else if ((index & ATTR_XS) && (index & ATTR_OPSIZE))
977       o << "IC_XS_OPSIZE";
978     else if ((index & ATTR_XD) && (index & ATTR_OPSIZE))
979       o << "IC_XD_OPSIZE";
980     else if ((index & ATTR_XS) && (index & ATTR_ADSIZE))
981       o << "IC_XS_ADSIZE";
982     else if ((index & ATTR_XD) && (index & ATTR_ADSIZE))
983       o << "IC_XD_ADSIZE";
984     else if (index & ATTR_XS)
985       o << "IC_XS";
986     else if (index & ATTR_XD)
987       o << "IC_XD";
988     else if ((index & ATTR_OPSIZE) && (index & ATTR_ADSIZE))
989       o << "IC_OPSIZE_ADSIZE";
990     else if (index & ATTR_OPSIZE)
991       o << "IC_OPSIZE";
992     else if (index & ATTR_ADSIZE)
993       o << "IC_ADSIZE";
994     else
995       o << "IC";
996 
997     o << ", // " << index << "\n";
998   }
999 
1000   i--;
1001   o.indent(i * 2) << "};" << "\n";
1002 }
1003 
emitContextDecisions(raw_ostream & o1,raw_ostream & o2,unsigned & i1,unsigned & i2,unsigned & ModRMTableNum) const1004 void DisassemblerTables::emitContextDecisions(raw_ostream &o1, raw_ostream &o2,
1005                                               unsigned &i1, unsigned &i2,
1006                                               unsigned &ModRMTableNum) const {
1007   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[0], ONEBYTE_STR);
1008   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[1], TWOBYTE_STR);
1009   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[2],
1010                       THREEBYTE38_STR);
1011   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[3],
1012                       THREEBYTE3A_STR);
1013   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[4], XOP8_MAP_STR);
1014   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[5], XOP9_MAP_STR);
1015   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[6], XOPA_MAP_STR);
1016   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[7],
1017                       THREEDNOW_MAP_STR);
1018   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[8], MAP4_STR);
1019   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[9], MAP5_STR);
1020   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[10], MAP6_STR);
1021   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[11], MAP7_STR);
1022 }
1023 
emit(raw_ostream & o) const1024 void DisassemblerTables::emit(raw_ostream &o) const {
1025   unsigned i1 = 0;
1026   unsigned i2 = 0;
1027 
1028   std::string s1;
1029   std::string s2;
1030 
1031   raw_string_ostream o1(s1);
1032   raw_string_ostream o2(s2);
1033 
1034   emitInstructionInfo(o, i2);
1035   o << "\n";
1036 
1037   emitContextTable(o, i2);
1038   o << "\n";
1039 
1040   unsigned ModRMTableNum = 0;
1041 
1042   o << "static const InstrUID modRMTable[] = {\n";
1043   i1++;
1044   std::vector<unsigned> EmptyTable(1, 0);
1045   ModRMTable[EmptyTable] = ModRMTableNum;
1046   ModRMTableNum += EmptyTable.size();
1047   o1 << "/*EmptyTable*/\n";
1048   o1.indent(i1 * 2) << "0x0,\n";
1049   i1--;
1050   emitContextDecisions(o1, o2, i1, i2, ModRMTableNum);
1051 
1052   o << o1.str();
1053   o << "  0x0\n";
1054   o << "};\n";
1055   o << "\n";
1056   o << o2.str();
1057   o << "\n";
1058   o << "\n";
1059 }
1060 
setTableFields(ModRMDecision & decision,const ModRMFilter & filter,InstrUID uid,uint8_t opcode)1061 void DisassemblerTables::setTableFields(ModRMDecision &decision,
1062                                         const ModRMFilter &filter, InstrUID uid,
1063                                         uint8_t opcode) {
1064   for (unsigned index = 0; index < 256; ++index) {
1065     if (filter.accepts(index)) {
1066       if (decision.instructionIDs[index] == uid)
1067         continue;
1068 
1069       if (decision.instructionIDs[index] != 0) {
1070         InstructionSpecifier &newInfo = InstructionSpecifiers[uid];
1071         InstructionSpecifier &previousInfo =
1072             InstructionSpecifiers[decision.instructionIDs[index]];
1073 
1074         if (previousInfo.name == "NOOP" &&
1075             (newInfo.name == "XCHG16ar" || newInfo.name == "XCHG32ar" ||
1076              newInfo.name == "XCHG64ar"))
1077           continue; // special case for XCHG*ar and NOOP
1078 
1079         if (outranks(previousInfo.insnContext, newInfo.insnContext))
1080           continue;
1081 
1082         if (previousInfo.insnContext == newInfo.insnContext) {
1083           errs() << "Error: Primary decode conflict: ";
1084           errs() << newInfo.name << " would overwrite " << previousInfo.name;
1085           errs() << "\n";
1086           errs() << "ModRM   " << index << "\n";
1087           errs() << "Opcode  " << (uint16_t)opcode << "\n";
1088           errs() << "Context " << stringForContext(newInfo.insnContext) << "\n";
1089           HasConflicts = true;
1090         }
1091       }
1092 
1093       decision.instructionIDs[index] = uid;
1094     }
1095   }
1096 }
1097 
setTableFields(OpcodeType type,InstructionContext insnContext,uint8_t opcode,const ModRMFilter & filter,InstrUID uid,bool is32bit,bool noPrefix,bool ignoresVEX_L,bool ignoresW,unsigned addressSize)1098 void DisassemblerTables::setTableFields(
1099     OpcodeType type, InstructionContext insnContext, uint8_t opcode,
1100     const ModRMFilter &filter, InstrUID uid, bool is32bit, bool noPrefix,
1101     bool ignoresVEX_L, bool ignoresW, unsigned addressSize) {
1102   ContextDecision &decision = *Tables[type];
1103 
1104   for (unsigned index = 0; index < IC_max; ++index) {
1105     if ((is32bit || addressSize == 16) &&
1106         inheritsFrom((InstructionContext)index, IC_64BIT))
1107       continue;
1108 
1109     bool adSize64 = addressSize == 64;
1110     if (inheritsFrom((InstructionContext)index,
1111                      InstructionSpecifiers[uid].insnContext, noPrefix,
1112                      ignoresVEX_L, ignoresW, adSize64))
1113       setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode],
1114                      filter, uid, opcode);
1115   }
1116 }
1117