1 /* $OpenBSD: cyreg.h,v 1.9 2024/09/01 03:08:56 jsg Exp $ */ 2 /* $FreeBSD: cyreg.h,v 1.1 1995/07/05 12:15:51 bde Exp $ */ 3 4 /*- 5 * Copyright (c) 1995 Bruce Evans. 6 * All rights reserved. 7 * 8 * Modified by Timo Rossi, 1996 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the author nor the names of contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 #ifndef _DEV_IC_CYREG_H_ 36 #define _DEV_IC_CYREG_H_ 37 38 #include <sys/timeout.h> 39 40 /* 41 * Definitions for Cyclades Cyclom-Y serial boards. 42 */ 43 44 #define CY8_SVCACKR 0x100 45 #define CY8_SVCACKT 0x200 46 #define CY8_SVCACKM 0x300 47 48 /* twice this in PCI mode (shifted BUSTYPE bits left) */ 49 #define CY_CD1400_MEMSPACING 0x400 50 51 /* adjustment value for accessing the last 4 cd1400s on Cyclom-32 */ 52 #define CY32_ADDR_FIX 0xe00 53 54 #define CY16_RESET 0x1400 55 #define CY_CLEAR_INTR 0x1800 /* intr ack address */ 56 57 #define CY_MAX_CD1400s 8 /* for Cyclom-32 */ 58 59 /* I/O location for enabling interrupts on PCI Cyclom cards */ 60 #define CY_PCI_INTENA 0x68 61 #define CY_PCI_INTENA_9050 0x4c 62 63 /* Cyclom-Y Custom Register for PLX ID (PCI only) */ 64 #define CY_PLX_VER 0x3400 /* PLX version */ 65 #define CY_PLX_9050 0x0b 66 #define CY_PLX_9060 0x0c 67 #define CY_PLX_9080 0x0d 68 69 #define CY_CLOCK 25000000 /* baud rate clock */ 70 #define CY_CLOCK_60 60000000 /* baud rate clock for newer cd1400s */ 71 72 /* 73 * bustype is actually the shift count for the offset 74 * ISA card addresses are multiplied by 2 (shifted 1 bit) 75 * and PCI addresses multiplied by 4 (shifted 2 bits) 76 */ 77 #define CY_BUSTYPE_ISA 0 78 #define CY_BUSTYPE_PCI 1 79 80 #define RX_FIFO_THRESHOLD 6 81 82 /* Automatic RTS (or actually DTR, the RTS and DTR lines need to be exchanged) 83 * handshake threshold used if CY_HW_RTS is defined 84 */ 85 #define RX_DTR_THRESHOLD 9 86 87 /* 88 * Maximum number of ports per card 89 */ 90 #define CY_MAX_PORTS (CD1400_NO_OF_CHANNELS * CY_MAX_CD1400s) 91 92 /* 93 * Port number on card encoded in low 5 bits 94 * card number in next 2 bits (only space for 4 cards) 95 * high bit reserved for dialout flag 96 */ 97 #define CY_PORT(x) (minor(x) & 0xf) 98 #define CY_CARD(x) ((minor(x) >> 5) & 3) 99 #define CY_DIALOUT(x) ((minor(x) & 0x80) != 0) 100 #define CY_DIALIN(x) (!CY_DIALOUT(x)) 101 102 /* 103 * read/write cd1400 registers (when cy_port-structure is available) 104 */ 105 #define cd_read_reg(cy,reg) bus_space_read_1(cy->cy_memt, cy->cy_memh, \ 106 cy->cy_chip_offs+(((reg<<1))<<cy->cy_bustype)) 107 108 #define cd_write_reg(cy,reg,val) bus_space_write_1(cy->cy_memt, cy->cy_memh, \ 109 cy->cy_chip_offs+(((reg<<1))<<cy->cy_bustype), \ 110 (val)) 111 112 /* 113 * read/write cd1400 registers (when sc_softc-structure is available) 114 */ 115 #define cd_read_reg_sc(sc,chip,reg) bus_space_read_1(sc->sc_memt, \ 116 sc->sc_memh, \ 117 sc->sc_cd1400_offs[chip]+\ 118 (((reg<<1))<<sc->sc_bustype)) 119 120 #define cd_write_reg_sc(sc,chip,reg,val) bus_space_write_1(sc->sc_memt, \ 121 sc->sc_memh, \ 122 sc->sc_cd1400_offs[chip]+\ 123 (((reg<<1))<<sc->sc_bustype), \ 124 (val)) 125 126 /* 127 * ibuf is a simple ring buffer. It is always used two 128 * bytes at a time (status and data) 129 */ 130 #define IBUF_SIZE (2*512) 131 132 /* software state for one port */ 133 struct cy_port { 134 int cy_port_num; 135 bus_space_tag_t cy_memt; 136 bus_space_handle_t cy_memh; 137 int cy_chip_offs; 138 int cy_bustype; 139 int cy_clock; 140 struct tty *cy_tty; 141 int cy_openflags; 142 int cy_fifo_overruns; 143 int cy_ibuf_overruns; 144 u_char cy_channel_control; /* last CCR channel 145 * control command 146 * bits */ 147 u_char cy_carrier_stat; /* copied from MSVR2 */ 148 u_char cy_flags; 149 u_char *cy_ibuf, *cy_ibuf_end; 150 u_char *cy_ibuf_rd_ptr, *cy_ibuf_wr_ptr; 151 #ifdef CY_DEBUG1 152 int cy_rx_int_count; 153 int cy_tx_int_count; 154 int cy_modem_int_count; 155 int cy_start_count; 156 #endif /* CY_DEBUG1 */ 157 }; 158 159 #define CYF_CARRIER_CHANGED 0x01 160 #define CYF_START_BREAK 0x02 161 #define CYF_END_BREAK 0x04 162 #define CYF_STOP 0x08 163 #define CYF_SEND_NUL 0x10 164 #define CYF_START 0x20 165 166 /* software state for one card */ 167 struct cy_softc { 168 struct device sc_dev; 169 struct timeout sc_poll_to; 170 int sc_events; 171 void *sc_ih; 172 bus_space_tag_t sc_memt; 173 bus_space_handle_t sc_memh; 174 int sc_bustype; 175 int sc_nports; /* number of ports on this card */ 176 int sc_cd1400_offs[CY_MAX_CD1400s]; 177 struct cy_port sc_ports[CY_MAX_PORTS]; 178 int sc_nr_cd1400s; 179 #ifdef CY_DEBUG1 180 int sc_poll_count1; 181 int sc_poll_count2; 182 #endif 183 }; 184 185 int cy_probe_common(bus_space_tag_t, bus_space_handle_t, int); 186 void cy_attach(struct device *, struct device *); 187 int cy_intr(void *); 188 189 #endif /* _DEV_IC_CYREG_H_ */ 190