1 //===-- PPCMachineFunctionInfo.h - Private data used for PowerPC --*- C++ -*-=// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file declares the PowerPC specific subclass of MachineFunctionInfo. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_TARGET_POWERPC_PPCMACHINEFUNCTIONINFO_H 14 #define LLVM_LIB_TARGET_POWERPC_PPCMACHINEFUNCTIONINFO_H 15 16 #include "llvm/ADT/SmallVector.h" 17 #include "llvm/CodeGen/MachineFunction.h" 18 #include "llvm/CodeGen/TargetCallingConv.h" 19 20 namespace llvm { 21 22 /// PPCFunctionInfo - This class is derived from MachineFunction private 23 /// PowerPC target-specific information for each MachineFunction. 24 class PPCFunctionInfo : public MachineFunctionInfo { 25 public: 26 // The value in the ParamType are used to indicate the bitstrings used in the 27 // encoding format. 28 enum ParamType { 29 FixedType = 0x0, 30 ShortFloatPoint = 0x2, 31 LongFloatPoint = 0x3 32 }; 33 34 private: 35 virtual void anchor(); 36 37 /// FramePointerSaveIndex - Frame index of where the old frame pointer is 38 /// stored. Also used as an anchor for instructions that need to be altered 39 /// when using frame pointers (dyna_add, dyna_sub.) 40 int FramePointerSaveIndex = 0; 41 42 /// ReturnAddrSaveIndex - Frame index of where the return address is stored. 43 /// 44 int ReturnAddrSaveIndex = 0; 45 46 /// Frame index where the old base pointer is stored. 47 int BasePointerSaveIndex = 0; 48 49 /// Frame index where the old PIC base pointer is stored. 50 int PICBasePointerSaveIndex = 0; 51 52 /// Frame index where the ROP Protection Hash is stored. 53 int ROPProtectionHashSaveIndex = 0; 54 55 /// MustSaveLR - Indicates whether LR is defined (or clobbered) in the current 56 /// function. This is only valid after the initial scan of the function by 57 /// PEI. 58 bool MustSaveLR = false; 59 60 /// MustSaveTOC - Indicates that the TOC save needs to be performed in the 61 /// prologue of the function. This is typically the case when there are 62 /// indirect calls in the function and it is more profitable to save the 63 /// TOC pointer in the prologue than in the block(s) containing the call(s). 64 bool MustSaveTOC = false; 65 66 /// Do we have to disable shrink-wrapping? This has to be set if we emit any 67 /// instructions that clobber LR in the entry block because discovering this 68 /// in PEI is too late (happens after shrink-wrapping); 69 bool ShrinkWrapDisabled = false; 70 71 /// Does this function have any stack spills. 72 bool HasSpills = false; 73 74 /// Does this function spill using instructions with only r+r (not r+i) 75 /// forms. 76 bool HasNonRISpills = false; 77 78 /// SpillsCR - Indicates whether CR is spilled in the current function. 79 bool SpillsCR = false; 80 81 /// DisableNonVolatileCR - Indicates whether non-volatile CR fields would be 82 /// disabled. 83 bool DisableNonVolatileCR = false; 84 85 /// LRStoreRequired - The bool indicates whether there is some explicit use of 86 /// the LR/LR8 stack slot that is not obvious from scanning the code. This 87 /// requires that the code generator produce a store of LR to the stack on 88 /// entry, even though LR may otherwise apparently not be used. 89 bool LRStoreRequired = false; 90 91 /// This function makes use of the PPC64 ELF TOC base pointer (register r2). 92 bool UsesTOCBasePtr = false; 93 94 /// MinReservedArea - This is the frame size that is at least reserved in a 95 /// potential caller (parameter+linkage area). 96 unsigned MinReservedArea = 0; 97 98 /// TailCallSPDelta - Stack pointer delta used when tail calling. Maximum 99 /// amount the stack pointer is adjusted to make the frame bigger for tail 100 /// calls. Used for creating an area before the register spill area. 101 int TailCallSPDelta = 0; 102 103 /// HasFastCall - Does this function contain a fast call. Used to determine 104 /// how the caller's stack pointer should be calculated (epilog/dynamicalloc). 105 bool HasFastCall = false; 106 107 /// VarArgsFrameIndex - FrameIndex for start of varargs area. 108 int VarArgsFrameIndex = 0; 109 110 /// VarArgsStackOffset - StackOffset for start of stack 111 /// arguments. 112 113 int VarArgsStackOffset = 0; 114 115 /// VarArgsNumGPR - Index of the first unused integer 116 /// register for parameter passing. 117 unsigned VarArgsNumGPR = 0; 118 119 /// VarArgsNumFPR - Index of the first unused double 120 /// register for parameter passing. 121 unsigned VarArgsNumFPR = 0; 122 123 /// FixedParamNum - Number of fixed parameter. 124 unsigned FixedParamNum = 0; 125 126 /// FloatingParamNum - Number of floating point parameter. 127 unsigned FloatingPointParamNum = 0; 128 129 /// ParamType - Encode type for every parameter 130 /// in the order of parameters passing in. 131 /// Bitstring starts from the most significant (leftmost) bit. 132 /// '0'b => fixed parameter. 133 /// '10'b => floating point short parameter. 134 /// '11'b => floating point long parameter. 135 uint32_t ParameterType = 0; 136 137 /// CRSpillFrameIndex - FrameIndex for CR spill slot for 32-bit SVR4. 138 int CRSpillFrameIndex = 0; 139 140 /// If any of CR[2-4] need to be saved in the prologue and restored in the 141 /// epilogue then they are added to this array. This is used for the 142 /// 64-bit SVR4 ABI. 143 SmallVector<Register, 3> MustSaveCRs; 144 145 /// Whether this uses the PIC Base register or not. 146 bool UsesPICBase = false; 147 148 /// We keep track attributes for each live-in virtual registers 149 /// to use SExt/ZExt flags in later optimization. 150 std::vector<std::pair<Register, ISD::ArgFlagsTy>> LiveInAttrs; 151 152 public: 153 explicit PPCFunctionInfo(const MachineFunction &MF); 154 getFramePointerSaveIndex()155 int getFramePointerSaveIndex() const { return FramePointerSaveIndex; } setFramePointerSaveIndex(int Idx)156 void setFramePointerSaveIndex(int Idx) { FramePointerSaveIndex = Idx; } 157 getReturnAddrSaveIndex()158 int getReturnAddrSaveIndex() const { return ReturnAddrSaveIndex; } setReturnAddrSaveIndex(int idx)159 void setReturnAddrSaveIndex(int idx) { ReturnAddrSaveIndex = idx; } 160 getBasePointerSaveIndex()161 int getBasePointerSaveIndex() const { return BasePointerSaveIndex; } setBasePointerSaveIndex(int Idx)162 void setBasePointerSaveIndex(int Idx) { BasePointerSaveIndex = Idx; } 163 getPICBasePointerSaveIndex()164 int getPICBasePointerSaveIndex() const { return PICBasePointerSaveIndex; } setPICBasePointerSaveIndex(int Idx)165 void setPICBasePointerSaveIndex(int Idx) { PICBasePointerSaveIndex = Idx; } 166 getROPProtectionHashSaveIndex()167 int getROPProtectionHashSaveIndex() const { 168 return ROPProtectionHashSaveIndex; 169 } setROPProtectionHashSaveIndex(int Idx)170 void setROPProtectionHashSaveIndex(int Idx) { 171 ROPProtectionHashSaveIndex = Idx; 172 } 173 getMinReservedArea()174 unsigned getMinReservedArea() const { return MinReservedArea; } setMinReservedArea(unsigned size)175 void setMinReservedArea(unsigned size) { MinReservedArea = size; } 176 getTailCallSPDelta()177 int getTailCallSPDelta() const { return TailCallSPDelta; } setTailCallSPDelta(int size)178 void setTailCallSPDelta(int size) { TailCallSPDelta = size; } 179 180 /// MustSaveLR - This is set when the prolog/epilog inserter does its initial 181 /// scan of the function. It is true if the LR/LR8 register is ever explicitly 182 /// defined/clobbered in the machine function (e.g. by calls and movpctolr, 183 /// which is used in PIC generation), or if the LR stack slot is explicitly 184 /// referenced by builtin_return_address. setMustSaveLR(bool U)185 void setMustSaveLR(bool U) { MustSaveLR = U; } mustSaveLR()186 bool mustSaveLR() const { return MustSaveLR; } 187 setMustSaveTOC(bool U)188 void setMustSaveTOC(bool U) { MustSaveTOC = U; } mustSaveTOC()189 bool mustSaveTOC() const { return MustSaveTOC; } 190 191 /// We certainly don't want to shrink wrap functions if we've emitted a 192 /// MovePCtoLR8 as that has to go into the entry, so the prologue definitely 193 /// has to go into the entry block. setShrinkWrapDisabled(bool U)194 void setShrinkWrapDisabled(bool U) { ShrinkWrapDisabled = U; } shrinkWrapDisabled()195 bool shrinkWrapDisabled() const { return ShrinkWrapDisabled; } 196 setHasSpills()197 void setHasSpills() { HasSpills = true; } hasSpills()198 bool hasSpills() const { return HasSpills; } 199 setHasNonRISpills()200 void setHasNonRISpills() { HasNonRISpills = true; } hasNonRISpills()201 bool hasNonRISpills() const { return HasNonRISpills; } 202 setSpillsCR()203 void setSpillsCR() { SpillsCR = true; } isCRSpilled()204 bool isCRSpilled() const { return SpillsCR; } 205 setDisableNonVolatileCR()206 void setDisableNonVolatileCR() { DisableNonVolatileCR = true; } isNonVolatileCRDisabled()207 bool isNonVolatileCRDisabled() const { return DisableNonVolatileCR; } 208 setLRStoreRequired()209 void setLRStoreRequired() { LRStoreRequired = true; } isLRStoreRequired()210 bool isLRStoreRequired() const { return LRStoreRequired; } 211 setUsesTOCBasePtr()212 void setUsesTOCBasePtr() { UsesTOCBasePtr = true; } usesTOCBasePtr()213 bool usesTOCBasePtr() const { return UsesTOCBasePtr; } 214 setHasFastCall()215 void setHasFastCall() { HasFastCall = true; } hasFastCall()216 bool hasFastCall() const { return HasFastCall;} 217 getVarArgsFrameIndex()218 int getVarArgsFrameIndex() const { return VarArgsFrameIndex; } setVarArgsFrameIndex(int Index)219 void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; } 220 getVarArgsStackOffset()221 int getVarArgsStackOffset() const { return VarArgsStackOffset; } setVarArgsStackOffset(int Offset)222 void setVarArgsStackOffset(int Offset) { VarArgsStackOffset = Offset; } 223 getVarArgsNumGPR()224 unsigned getVarArgsNumGPR() const { return VarArgsNumGPR; } setVarArgsNumGPR(unsigned Num)225 void setVarArgsNumGPR(unsigned Num) { VarArgsNumGPR = Num; } 226 getFixedParamNum()227 unsigned getFixedParamNum() const { return FixedParamNum; } 228 getFloatingPointParamNum()229 unsigned getFloatingPointParamNum() const { return FloatingPointParamNum; } 230 getParameterType()231 uint32_t getParameterType() const { return ParameterType; } 232 void appendParameterType(ParamType Type); 233 getVarArgsNumFPR()234 unsigned getVarArgsNumFPR() const { return VarArgsNumFPR; } setVarArgsNumFPR(unsigned Num)235 void setVarArgsNumFPR(unsigned Num) { VarArgsNumFPR = Num; } 236 237 /// This function associates attributes for each live-in virtual register. addLiveInAttr(Register VReg,ISD::ArgFlagsTy Flags)238 void addLiveInAttr(Register VReg, ISD::ArgFlagsTy Flags) { 239 LiveInAttrs.push_back(std::make_pair(VReg, Flags)); 240 } 241 242 /// This function returns true if the specified vreg is 243 /// a live-in register and sign-extended. 244 bool isLiveInSExt(Register VReg) const; 245 246 /// This function returns true if the specified vreg is 247 /// a live-in register and zero-extended. 248 bool isLiveInZExt(Register VReg) const; 249 getCRSpillFrameIndex()250 int getCRSpillFrameIndex() const { return CRSpillFrameIndex; } setCRSpillFrameIndex(int idx)251 void setCRSpillFrameIndex(int idx) { CRSpillFrameIndex = idx; } 252 253 const SmallVectorImpl<Register> & getMustSaveCRs()254 getMustSaveCRs() const { return MustSaveCRs; } addMustSaveCR(Register Reg)255 void addMustSaveCR(Register Reg) { MustSaveCRs.push_back(Reg); } 256 setUsesPICBase(bool uses)257 void setUsesPICBase(bool uses) { UsesPICBase = uses; } usesPICBase()258 bool usesPICBase() const { return UsesPICBase; } 259 260 MCSymbol *getPICOffsetSymbol(MachineFunction &MF) const; 261 262 MCSymbol *getGlobalEPSymbol(MachineFunction &MF) const; 263 MCSymbol *getLocalEPSymbol(MachineFunction &MF) const; 264 MCSymbol *getTOCOffsetSymbol(MachineFunction &MF) const; 265 }; 266 267 } // end namespace llvm 268 269 #endif // LLVM_LIB_TARGET_POWERPC_PPCMACHINEFUNCTIONINFO_H 270