1 /*
2 * Copyright (C) 2021 Intel Corporation
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 */
7
8 #include "shared/source/aub_mem_dump/definitions/aub_services.h"
9 #include "shared/source/debug_settings/debug_settings_manager.h"
10 #include "shared/source/helpers/constants.h"
11 #include "shared/source/unified_memory/usm_memory_support.h"
12 #include "shared/source/xe_hpc_core/hw_cmds.h"
13
14 #include "engine_node.h"
15
16 namespace NEO {
17
18 const char *HwMapper<IGFX_PVC>::abbreviation = "pvc";
19
isSimulationPVC(unsigned short deviceId)20 bool isSimulationPVC(unsigned short deviceId) {
21 return false;
22 };
23
24 const PLATFORM PVC::platform = {
25 IGFX_PVC,
26 PCH_UNKNOWN,
27 IGFX_XE_HPC_CORE,
28 IGFX_XE_HPC_CORE,
29 PLATFORM_NONE, // default init
30 0, // usDeviceID
31 0, // usRevId. 0 sets the stepping to A0
32 0, // usDeviceID_PCH
33 0, // usRevId_PCH
34 GTTYPE_UNDEFINED};
35
36 const RuntimeCapabilityTable PVC::capabilityTable{
37 EngineDirectSubmissionInitVec{
38 {aub_stream::ENGINE_CCS, {true, false, false, true}},
39 {aub_stream::ENGINE_CCS1, {true, false, true, true}},
40 {aub_stream::ENGINE_CCS2, {true, false, true, true}},
41 {aub_stream::ENGINE_CCS3, {true, false, true, true}},
42 {aub_stream::ENGINE_BCS1, {true, false, true, true}},
43 {aub_stream::ENGINE_BCS2, {true, false, true, true}},
44 {aub_stream::ENGINE_BCS3, {true, false, true, true}},
45 {aub_stream::ENGINE_BCS4, {true, false, true, true}},
46 {aub_stream::ENGINE_BCS5, {true, false, true, true}},
47 {aub_stream::ENGINE_BCS6, {true, false, true, true}},
48 {aub_stream::ENGINE_BCS7, {true, false, true, true}},
49 {aub_stream::ENGINE_BCS8, {true, false, true, true}}}, // directSubmissionEngines
50 {0, 0, 0, 0, false, false, false, false}, // kmdNotifyProperties
51 maxNBitValue(57), // gpuAddressSpace
52 0, // sharedSystemMemCapabilities
53 83.333, // defaultProfilingTimerResolution
54 MemoryConstants::pageSize, // requiredPreemptionSurfaceSize
55 &isSimulationPVC, // isSimulation
56 "core", // platformType
57 "", // deviceName
58 PreemptionMode::ThreadGroup, // defaultPreemptionMode
59 aub_stream::ENGINE_CCS, // defaultEngineType
60 0, // maxRenderFrequency
61 30, // clVersionSupport
62 CmdServicesMemTraceVersion::DeviceValues::Pvc, // aubDeviceId
63 0, // extraQuantityThreadsPerEU
64 128, // slmSize
65 sizeof(PVC::GRF), // grfSize
66 36u, // timestampValidBits
67 32u, // kernelTimestampValidBits
68 false, // blitterOperationsSupported
69 true, // ftrSupportsInteger64BitAtomics
70 true, // ftrSupportsFP64
71 true, // ftrSupports64BitMath
72 true, // ftrSvm
73 false, // ftrSupportsCoherency
74 false, // ftrSupportsVmeAvcTextureSampler
75 false, // ftrSupportsVmeAvcPreemption
76 false, // ftrRenderCompressedBuffers
77 false, // ftrRenderCompressedImages
78 true, // ftr64KBpages
79 true, // instrumentationEnabled
80 false, // sourceLevelDebuggerSupported
81 false, // supportsVme
82 false, // supportCacheFlushAfterWalker
83 false, // supportsImages
84 false, // supportsDeviceEnqueue
85 false, // supportsPipes
86 true, // supportsOcl21Features
87 true, // supportsOnDemandPageFaults
88 true, // supportsIndependentForwardProgress
89 false, // hostPtrTrackingEnabled
90 true, // levelZeroSupported
91 false, // isIntegratedDevice
92 false, // supportsMediaBlock
93 false // fusedEuEnabled
94 };
95
setupFeatureAndWorkaroundTable(HardwareInfo * hwInfo)96 void PVC::setupFeatureAndWorkaroundTable(HardwareInfo *hwInfo) {
97 FeatureTable *featureTable = &hwInfo->featureTable;
98 WorkaroundTable *workaroundTable = &hwInfo->workaroundTable;
99
100 featureTable->flags.ftrL3IACoherency = true;
101 featureTable->flags.ftrLocalMemory = true;
102 featureTable->flags.ftrLinearCCS = true;
103 featureTable->flags.ftrFlatPhysCCS = true;
104 featureTable->flags.ftrE2ECompression = false;
105 featureTable->flags.ftrCCSNode = true;
106 featureTable->flags.ftrCCSRing = true;
107 featureTable->flags.ftrMultiTileArch = true;
108 featureTable->flags.ftrCCSMultiInstance = true;
109
110 featureTable->flags.ftrPPGTT = true;
111 featureTable->flags.ftrSVM = true;
112 featureTable->flags.ftrL3IACoherency = true;
113 featureTable->flags.ftrIA32eGfxPTEs = true;
114 featureTable->flags.ftrStandardMipTailFormat = true;
115 featureTable->flags.ftrTranslationTable = true;
116 featureTable->flags.ftrUserModeTranslationTable = true;
117 featureTable->flags.ftrTileMappedResource = true;
118 featureTable->flags.ftrEnableGuC = true;
119 featureTable->flags.ftrFbc = true;
120 featureTable->flags.ftrFbc2AddressTranslation = true;
121 featureTable->flags.ftrFbcBlitterTracking = true;
122 featureTable->flags.ftrAstcHdr2D = true;
123 featureTable->flags.ftrAstcLdr2D = true;
124
125 featureTable->flags.ftr3dMidBatchPreempt = true;
126 featureTable->flags.ftrGpGpuMidBatchPreempt = true;
127 featureTable->flags.ftrGpGpuThreadGroupLevelPreempt = true;
128 featureTable->flags.ftrPerCtxtPreemptionGranularityControl = true;
129
130 featureTable->flags.ftrTileY = false;
131 featureTable->ftrBcsInfo = maxNBitValue(9);
132 workaroundTable->flags.wa4kAlignUVOffsetNV12LinearSurface = true;
133 workaroundTable->flags.waEnablePreemptionGranularityControlByUMD = true;
134 }
135
adjustHardwareInfo(HardwareInfo * hwInfo)136 void PVC::adjustHardwareInfo(HardwareInfo *hwInfo) {
137 hwInfo->capabilityTable.sharedSystemMemCapabilities = (UNIFIED_SHARED_MEMORY_ACCESS | UNIFIED_SHARED_MEMORY_CONCURRENT_ACCESS | UNIFIED_SHARED_MEMORY_CONCURRENT_ATOMIC_ACCESS);
138 }
setupHardwareInfoBase(HardwareInfo * hwInfo,bool setupFeatureTableAndWorkaroundTable,bool setupMultiTile)139 void PVC::setupHardwareInfoBase(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable, bool setupMultiTile) {
140 GT_SYSTEM_INFO *gtSysInfo = &hwInfo->gtSystemInfo;
141 gtSysInfo->ThreadCount = gtSysInfo->EUCount * PVC::threadsPerEu;
142 gtSysInfo->MaxFillRate = 128;
143 gtSysInfo->TotalVsThreads = 336;
144 gtSysInfo->TotalHsThreads = 336;
145 gtSysInfo->TotalDsThreads = 336;
146 gtSysInfo->TotalGsThreads = 336;
147 gtSysInfo->TotalPsThreadsWindowerRange = 64;
148 gtSysInfo->CsrSizeInMb = 8;
149 gtSysInfo->MaxEuPerSubSlice = PVC::maxEuPerSubslice;
150 gtSysInfo->MaxSlicesSupported = PVC::maxSlicesSupported;
151 gtSysInfo->MaxSubSlicesSupported = PVC::maxSubslicesSupported;
152 gtSysInfo->MaxDualSubSlicesSupported = PVC::maxDualSubslicesSupported;
153 gtSysInfo->IsL3HashModeEnabled = false;
154 gtSysInfo->IsDynamicallyPopulated = false;
155
156 gtSysInfo->MultiTileArchInfo.IsValid = setupMultiTile;
157 gtSysInfo->MultiTileArchInfo.TileCount = 1;
158 if (DebugManager.flags.CreateMultipleSubDevices.get() > 0) {
159 gtSysInfo->MultiTileArchInfo.TileCount = DebugManager.flags.CreateMultipleSubDevices.get();
160 }
161 gtSysInfo->MultiTileArchInfo.TileMask = static_cast<uint8_t>(maxNBitValue(gtSysInfo->MultiTileArchInfo.TileCount));
162
163 PVC::adjustHardwareInfo(hwInfo);
164 }
165
166 FeatureTable PVC::featureTable;
167 WorkaroundTable PVC::workaroundTable;
168
169 const HardwareInfo PVC_CONFIG::hwInfo = {
170 &PVC::platform,
171 &PVC::featureTable,
172 &PVC::workaroundTable,
173 &PVC_CONFIG::gtSystemInfo,
174 PVC::capabilityTable,
175 };
176
177 GT_SYSTEM_INFO PVC_CONFIG::gtSystemInfo = {0};
setupHardwareInfo(HardwareInfo * hwInfo,bool setupFeatureTableAndWorkaroundTable)178 void PVC_CONFIG::setupHardwareInfo(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable) {
179 PVC_CONFIG::setupHardwareInfoMultiTile(hwInfo, setupFeatureTableAndWorkaroundTable, false);
180 }
setupHardwareInfoMultiTile(HardwareInfo * hwInfo,bool setupFeatureTableAndWorkaroundTable,bool setupMultiTile)181 void PVC_CONFIG::setupHardwareInfoMultiTile(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable, bool setupMultiTile) {
182 GT_SYSTEM_INFO *gtSysInfo = &hwInfo->gtSystemInfo;
183 gtSysInfo->CsrSizeInMb = 8;
184 gtSysInfo->IsL3HashModeEnabled = false;
185 gtSysInfo->IsDynamicallyPopulated = false;
186
187 // non-zero values for unit tests
188 if (gtSysInfo->SliceCount == 0) {
189 gtSysInfo->SliceCount = 2;
190 gtSysInfo->SubSliceCount = 8;
191 gtSysInfo->DualSubSliceCount = gtSysInfo->SubSliceCount;
192 gtSysInfo->EUCount = 40;
193 gtSysInfo->MaxEuPerSubSlice = gtSysInfo->EUCount / gtSysInfo->SubSliceCount;
194 gtSysInfo->MaxSlicesSupported = gtSysInfo->SliceCount;
195 gtSysInfo->MaxSubSlicesSupported = gtSysInfo->SubSliceCount;
196
197 gtSysInfo->L3BankCount = 1;
198
199 gtSysInfo->CCSInfo.IsValid = true;
200 gtSysInfo->CCSInfo.NumberOfCCSEnabled = 2;
201 gtSysInfo->CCSInfo.Instances.CCSEnableMask = 0b11;
202
203 hwInfo->featureTable.ftrBcsInfo = 1;
204
205 for (uint32_t slice = 0; slice < gtSysInfo->SliceCount; slice++) {
206 gtSysInfo->SliceInfo[slice].Enabled = true;
207 }
208 }
209
210 if (setupFeatureTableAndWorkaroundTable) {
211 PVC::setupFeatureAndWorkaroundTable(hwInfo);
212 }
213 };
214
215 #include "hw_info_setup_pvc.inl"
216 } // namespace NEO
217