1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2010-2016 Solarflare Communications Inc.
5 * All rights reserved.
6 *
7 * This software was developed in part by Philip Paeps under contract for
8 * Solarflare Communications, Inc.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are met:
12 *
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * The views and conclusions contained in the software and documentation are
32 * those of the authors and should not be interpreted as representing official
33 * policies, either expressed or implied, of the FreeBSD Project.
34 */
35
36 #include <sys/cdefs.h>
37 #include "opt_rss.h"
38
39 #include <sys/param.h>
40 #include <sys/kernel.h>
41 #include <sys/bus.h>
42 #include <sys/rman.h>
43 #include <sys/lock.h>
44 #include <sys/module.h>
45 #include <sys/mutex.h>
46 #include <sys/smp.h>
47 #include <sys/socket.h>
48 #include <sys/taskqueue.h>
49 #include <sys/sockio.h>
50 #include <sys/sysctl.h>
51 #include <sys/priv.h>
52 #include <sys/syslog.h>
53
54 #include <dev/pci/pcireg.h>
55 #include <dev/pci/pcivar.h>
56
57 #include <net/ethernet.h>
58 #include <net/if.h>
59 #include <net/if_var.h>
60 #include <net/if_media.h>
61 #include <net/if_types.h>
62
63 #ifdef RSS
64 #include <net/rss_config.h>
65 #endif
66
67 #include "common/efx.h"
68
69 #include "sfxge.h"
70 #include "sfxge_rx.h"
71 #include "sfxge_ioc.h"
72 #include "sfxge_version.h"
73
74 #define SFXGE_CAP (IFCAP_VLAN_MTU | IFCAP_VLAN_HWCSUM | \
75 IFCAP_RXCSUM | IFCAP_TXCSUM | \
76 IFCAP_RXCSUM_IPV6 | IFCAP_TXCSUM_IPV6 | \
77 IFCAP_TSO4 | IFCAP_TSO6 | \
78 IFCAP_JUMBO_MTU | \
79 IFCAP_VLAN_HWTSO | IFCAP_LINKSTATE | IFCAP_HWSTATS)
80 #define SFXGE_CAP_ENABLE SFXGE_CAP
81 #define SFXGE_CAP_FIXED (IFCAP_VLAN_MTU | \
82 IFCAP_JUMBO_MTU | IFCAP_LINKSTATE | IFCAP_HWSTATS)
83
84 MALLOC_DEFINE(M_SFXGE, "sfxge", "Solarflare 10GigE driver");
85
86 SYSCTL_NODE(_hw, OID_AUTO, sfxge, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
87 "SFXGE driver parameters");
88
89 #define SFXGE_PARAM_RX_RING SFXGE_PARAM(rx_ring)
90 static int sfxge_rx_ring_entries = SFXGE_NDESCS;
91 TUNABLE_INT(SFXGE_PARAM_RX_RING, &sfxge_rx_ring_entries);
92 SYSCTL_INT(_hw_sfxge, OID_AUTO, rx_ring, CTLFLAG_RDTUN,
93 &sfxge_rx_ring_entries, 0,
94 "Maximum number of descriptors in a receive ring");
95
96 #define SFXGE_PARAM_TX_RING SFXGE_PARAM(tx_ring)
97 static int sfxge_tx_ring_entries = SFXGE_NDESCS;
98 TUNABLE_INT(SFXGE_PARAM_TX_RING, &sfxge_tx_ring_entries);
99 SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_ring, CTLFLAG_RDTUN,
100 &sfxge_tx_ring_entries, 0,
101 "Maximum number of descriptors in a transmit ring");
102
103 #define SFXGE_PARAM_RESTART_ATTEMPTS SFXGE_PARAM(restart_attempts)
104 static int sfxge_restart_attempts = 3;
105 TUNABLE_INT(SFXGE_PARAM_RESTART_ATTEMPTS, &sfxge_restart_attempts);
106 SYSCTL_INT(_hw_sfxge, OID_AUTO, restart_attempts, CTLFLAG_RDTUN,
107 &sfxge_restart_attempts, 0,
108 "Maximum number of attempts to bring interface up after reset");
109
110 #if EFSYS_OPT_MCDI_LOGGING
111 #define SFXGE_PARAM_MCDI_LOGGING SFXGE_PARAM(mcdi_logging)
112 static int sfxge_mcdi_logging = 0;
113 TUNABLE_INT(SFXGE_PARAM_MCDI_LOGGING, &sfxge_mcdi_logging);
114 #endif
115
116 static void
117 sfxge_reset(void *arg, int npending);
118
119 static int
sfxge_estimate_rsrc_limits(struct sfxge_softc * sc)120 sfxge_estimate_rsrc_limits(struct sfxge_softc *sc)
121 {
122 efx_drv_limits_t limits;
123 int rc;
124 unsigned int evq_max;
125 uint32_t evq_allocated;
126 uint32_t rxq_allocated;
127 uint32_t txq_allocated;
128
129 /*
130 * Limit the number of event queues to:
131 * - number of CPUs
132 * - hardwire maximum RSS channels
133 * - administratively specified maximum RSS channels
134 */
135 #ifdef RSS
136 /*
137 * Avoid extra limitations so that the number of queues
138 * may be configured at administrator's will
139 */
140 evq_max = MIN(MAX(rss_getnumbuckets(), 1), EFX_MAXRSS);
141 #else
142 evq_max = MIN(mp_ncpus, EFX_MAXRSS);
143 #endif
144 if (sc->max_rss_channels > 0)
145 evq_max = MIN(evq_max, sc->max_rss_channels);
146
147 memset(&limits, 0, sizeof(limits));
148
149 limits.edl_min_evq_count = 1;
150 limits.edl_max_evq_count = evq_max;
151 limits.edl_min_txq_count = SFXGE_EVQ0_N_TXQ(sc);
152 limits.edl_max_txq_count = evq_max + SFXGE_EVQ0_N_TXQ(sc) - 1;
153 limits.edl_min_rxq_count = 1;
154 limits.edl_max_rxq_count = evq_max;
155
156 efx_nic_set_drv_limits(sc->enp, &limits);
157
158 if ((rc = efx_nic_init(sc->enp)) != 0)
159 return (rc);
160
161 rc = efx_nic_get_vi_pool(sc->enp, &evq_allocated, &rxq_allocated,
162 &txq_allocated);
163 if (rc != 0) {
164 efx_nic_fini(sc->enp);
165 return (rc);
166 }
167
168 KASSERT(txq_allocated >= SFXGE_EVQ0_N_TXQ(sc),
169 ("txq_allocated < %u", SFXGE_EVQ0_N_TXQ(sc)));
170
171 sc->evq_max = MIN(evq_allocated, evq_max);
172 sc->evq_max = MIN(rxq_allocated, sc->evq_max);
173 sc->evq_max = MIN(txq_allocated - (SFXGE_EVQ0_N_TXQ(sc) - 1),
174 sc->evq_max);
175
176 KASSERT(sc->evq_max <= evq_max,
177 ("allocated more than maximum requested"));
178
179 #ifdef RSS
180 if (sc->evq_max < rss_getnumbuckets())
181 device_printf(sc->dev, "The number of allocated queues (%u) "
182 "is less than the number of RSS buckets (%u); "
183 "performance degradation might be observed",
184 sc->evq_max, rss_getnumbuckets());
185 #endif
186
187 /*
188 * NIC is kept initialized in the case of success to be able to
189 * initialize port to find out media types.
190 */
191 return (0);
192 }
193
194 static int
sfxge_set_drv_limits(struct sfxge_softc * sc)195 sfxge_set_drv_limits(struct sfxge_softc *sc)
196 {
197 efx_drv_limits_t limits;
198
199 memset(&limits, 0, sizeof(limits));
200
201 /* Limits are strict since take into account initial estimation */
202 limits.edl_min_evq_count = limits.edl_max_evq_count =
203 sc->intr.n_alloc;
204 limits.edl_min_txq_count = limits.edl_max_txq_count =
205 sc->intr.n_alloc + SFXGE_EVQ0_N_TXQ(sc) - 1;
206 limits.edl_min_rxq_count = limits.edl_max_rxq_count =
207 sc->intr.n_alloc;
208
209 return (efx_nic_set_drv_limits(sc->enp, &limits));
210 }
211
212 static int
sfxge_start(struct sfxge_softc * sc)213 sfxge_start(struct sfxge_softc *sc)
214 {
215 int rc;
216
217 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc);
218
219 if (sc->init_state == SFXGE_STARTED)
220 return (0);
221
222 if (sc->init_state != SFXGE_REGISTERED) {
223 rc = EINVAL;
224 goto fail;
225 }
226
227 /* Set required resource limits */
228 if ((rc = sfxge_set_drv_limits(sc)) != 0)
229 goto fail;
230
231 if ((rc = efx_nic_init(sc->enp)) != 0)
232 goto fail;
233
234 /* Start processing interrupts. */
235 if ((rc = sfxge_intr_start(sc)) != 0)
236 goto fail2;
237
238 /* Start processing events. */
239 if ((rc = sfxge_ev_start(sc)) != 0)
240 goto fail3;
241
242 /* Fire up the port. */
243 if ((rc = sfxge_port_start(sc)) != 0)
244 goto fail4;
245
246 /* Start the receiver side. */
247 if ((rc = sfxge_rx_start(sc)) != 0)
248 goto fail5;
249
250 /* Start the transmitter side. */
251 if ((rc = sfxge_tx_start(sc)) != 0)
252 goto fail6;
253
254 sc->init_state = SFXGE_STARTED;
255
256 /* Tell the stack we're running. */
257 if_setdrvflagbits(sc->ifnet, IFF_DRV_RUNNING, IFF_DRV_OACTIVE);
258
259 return (0);
260
261 fail6:
262 sfxge_rx_stop(sc);
263
264 fail5:
265 sfxge_port_stop(sc);
266
267 fail4:
268 sfxge_ev_stop(sc);
269
270 fail3:
271 sfxge_intr_stop(sc);
272
273 fail2:
274 efx_nic_fini(sc->enp);
275
276 fail:
277 device_printf(sc->dev, "sfxge_start: %d\n", rc);
278
279 return (rc);
280 }
281
282 static void
sfxge_if_init(void * arg)283 sfxge_if_init(void *arg)
284 {
285 struct sfxge_softc *sc;
286
287 sc = (struct sfxge_softc *)arg;
288
289 SFXGE_ADAPTER_LOCK(sc);
290 (void)sfxge_start(sc);
291 SFXGE_ADAPTER_UNLOCK(sc);
292 }
293
294 static void
sfxge_stop(struct sfxge_softc * sc)295 sfxge_stop(struct sfxge_softc *sc)
296 {
297 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc);
298
299 if (sc->init_state != SFXGE_STARTED)
300 return;
301
302 sc->init_state = SFXGE_REGISTERED;
303
304 /* Stop the transmitter. */
305 sfxge_tx_stop(sc);
306
307 /* Stop the receiver. */
308 sfxge_rx_stop(sc);
309
310 /* Stop the port. */
311 sfxge_port_stop(sc);
312
313 /* Stop processing events. */
314 sfxge_ev_stop(sc);
315
316 /* Stop processing interrupts. */
317 sfxge_intr_stop(sc);
318
319 efx_nic_fini(sc->enp);
320
321 if_setdrvflagbits(sc->ifnet, 0, IFF_DRV_RUNNING);
322 }
323
324 static int
sfxge_vpd_ioctl(struct sfxge_softc * sc,sfxge_ioc_t * ioc)325 sfxge_vpd_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ioc)
326 {
327 efx_vpd_value_t value;
328 int rc = 0;
329
330 switch (ioc->u.vpd.op) {
331 case SFXGE_VPD_OP_GET_KEYWORD:
332 value.evv_tag = ioc->u.vpd.tag;
333 value.evv_keyword = ioc->u.vpd.keyword;
334 rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value);
335 if (rc != 0)
336 break;
337 ioc->u.vpd.len = MIN(ioc->u.vpd.len, value.evv_length);
338 if (ioc->u.vpd.payload != 0) {
339 rc = copyout(value.evv_value, ioc->u.vpd.payload,
340 ioc->u.vpd.len);
341 }
342 break;
343 case SFXGE_VPD_OP_SET_KEYWORD:
344 if (ioc->u.vpd.len > sizeof(value.evv_value))
345 return (EINVAL);
346 value.evv_tag = ioc->u.vpd.tag;
347 value.evv_keyword = ioc->u.vpd.keyword;
348 value.evv_length = ioc->u.vpd.len;
349 rc = copyin(ioc->u.vpd.payload, value.evv_value, value.evv_length);
350 if (rc != 0)
351 break;
352 rc = efx_vpd_set(sc->enp, sc->vpd_data, sc->vpd_size, &value);
353 if (rc != 0)
354 break;
355 rc = efx_vpd_verify(sc->enp, sc->vpd_data, sc->vpd_size);
356 if (rc != 0)
357 break;
358 rc = efx_vpd_write(sc->enp, sc->vpd_data, sc->vpd_size);
359 break;
360 default:
361 rc = EOPNOTSUPP;
362 break;
363 }
364
365 return (rc);
366 }
367
368 static int
sfxge_private_ioctl(struct sfxge_softc * sc,sfxge_ioc_t * ioc)369 sfxge_private_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ioc)
370 {
371 switch (ioc->op) {
372 case SFXGE_MCDI_IOC:
373 return (sfxge_mcdi_ioctl(sc, ioc));
374 case SFXGE_NVRAM_IOC:
375 return (sfxge_nvram_ioctl(sc, ioc));
376 case SFXGE_VPD_IOC:
377 return (sfxge_vpd_ioctl(sc, ioc));
378 default:
379 return (EOPNOTSUPP);
380 }
381 }
382
383 static int
sfxge_if_ioctl(if_t ifp,unsigned long command,caddr_t data)384 sfxge_if_ioctl(if_t ifp, unsigned long command, caddr_t data)
385 {
386 struct sfxge_softc *sc;
387 struct ifreq *ifr;
388 sfxge_ioc_t ioc;
389 int error;
390
391 ifr = (struct ifreq *)data;
392 sc = if_getsoftc(ifp);
393 error = 0;
394
395 switch (command) {
396 case SIOCSIFFLAGS:
397 SFXGE_ADAPTER_LOCK(sc);
398 if (if_getflags(ifp) & IFF_UP) {
399 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) {
400 if ((if_getflags(ifp) ^ sc->if_flags) &
401 (IFF_PROMISC | IFF_ALLMULTI)) {
402 sfxge_mac_filter_set(sc);
403 }
404 } else
405 sfxge_start(sc);
406 } else
407 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING)
408 sfxge_stop(sc);
409 sc->if_flags = if_getflags(ifp);
410 SFXGE_ADAPTER_UNLOCK(sc);
411 break;
412 case SIOCSIFMTU:
413 if (ifr->ifr_mtu == if_getmtu(ifp)) {
414 /* Nothing to do */
415 error = 0;
416 } else if (ifr->ifr_mtu > SFXGE_MAX_MTU) {
417 error = EINVAL;
418 } else if (!(if_getdrvflags(ifp) & IFF_DRV_RUNNING)) {
419 if_setmtu(ifp, ifr->ifr_mtu);
420 error = 0;
421 } else {
422 /* Restart required */
423 SFXGE_ADAPTER_LOCK(sc);
424 sfxge_stop(sc);
425 if_setmtu(ifp, ifr->ifr_mtu);
426 error = sfxge_start(sc);
427 SFXGE_ADAPTER_UNLOCK(sc);
428 if (error != 0) {
429 if_setflagbits(ifp, 0, IFF_UP);
430 if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING);
431 if_down(ifp);
432 }
433 }
434 break;
435 case SIOCADDMULTI:
436 case SIOCDELMULTI:
437 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING)
438 sfxge_mac_filter_set(sc);
439 break;
440 case SIOCSIFCAP:
441 {
442 int reqcap = ifr->ifr_reqcap;
443 int capchg_mask;
444
445 SFXGE_ADAPTER_LOCK(sc);
446
447 /* Capabilities to be changed in accordance with request */
448 capchg_mask = if_getcapenable(ifp) ^ reqcap;
449
450 /*
451 * The networking core already rejects attempts to
452 * enable capabilities we don't have. We still have
453 * to reject attempts to disable capabilities that we
454 * can't (yet) disable.
455 */
456 KASSERT((reqcap & ~if_getcapabilities(ifp)) == 0,
457 ("Unsupported capabilities 0x%x requested 0x%x vs "
458 "supported 0x%x",
459 reqcap & ~if_getcapabilities(ifp),
460 reqcap , if_getcapabilities(ifp)));
461 if (capchg_mask & SFXGE_CAP_FIXED) {
462 error = EINVAL;
463 SFXGE_ADAPTER_UNLOCK(sc);
464 break;
465 }
466
467 /* Check request before any changes */
468 if ((capchg_mask & IFCAP_TSO4) &&
469 (reqcap & (IFCAP_TSO4 | IFCAP_TXCSUM)) == IFCAP_TSO4) {
470 error = EAGAIN;
471 SFXGE_ADAPTER_UNLOCK(sc);
472 if_printf(ifp, "enable txcsum before tso4\n");
473 break;
474 }
475 if ((capchg_mask & IFCAP_TSO6) &&
476 (reqcap & (IFCAP_TSO6 | IFCAP_TXCSUM_IPV6)) == IFCAP_TSO6) {
477 error = EAGAIN;
478 SFXGE_ADAPTER_UNLOCK(sc);
479 if_printf(ifp, "enable txcsum6 before tso6\n");
480 break;
481 }
482
483 if (reqcap & IFCAP_TXCSUM) {
484 if_sethwassistbits(ifp, (CSUM_IP | CSUM_TCP | CSUM_UDP), 0);
485 } else {
486 if_sethwassistbits(ifp, 0, (CSUM_IP | CSUM_TCP | CSUM_UDP));
487 if (reqcap & IFCAP_TSO4) {
488 reqcap &= ~IFCAP_TSO4;
489 if_printf(ifp,
490 "tso4 disabled due to -txcsum\n");
491 }
492 }
493 if (reqcap & IFCAP_TXCSUM_IPV6) {
494 if_sethwassistbits(ifp, (CSUM_TCP_IPV6 | CSUM_UDP_IPV6), 0);
495 } else {
496 if_sethwassistbits(ifp, 0, (CSUM_TCP_IPV6 | CSUM_UDP_IPV6));
497 if (reqcap & IFCAP_TSO6) {
498 reqcap &= ~IFCAP_TSO6;
499 if_printf(ifp,
500 "tso6 disabled due to -txcsum6\n");
501 }
502 }
503
504 /*
505 * The kernel takes both IFCAP_TSOx and CSUM_TSO into
506 * account before using TSO. So, we do not touch
507 * checksum flags when IFCAP_TSOx is modified.
508 * Note that CSUM_TSO is (CSUM_IP_TSO|CSUM_IP6_TSO),
509 * but both bits are set in IPv4 and IPv6 mbufs.
510 */
511
512 if_setcapenable(ifp, reqcap);
513
514 SFXGE_ADAPTER_UNLOCK(sc);
515 break;
516 }
517 case SIOCSIFMEDIA:
518 case SIOCGIFMEDIA:
519 error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
520 break;
521 #ifdef SIOCGI2C
522 case SIOCGI2C:
523 {
524 struct ifi2creq i2c;
525
526 error = copyin(ifr_data_get_ptr(ifr), &i2c, sizeof(i2c));
527 if (error != 0)
528 break;
529
530 if (i2c.len > sizeof(i2c.data)) {
531 error = EINVAL;
532 break;
533 }
534
535 SFXGE_ADAPTER_LOCK(sc);
536 error = efx_phy_module_get_info(sc->enp, i2c.dev_addr,
537 i2c.offset, i2c.len,
538 &i2c.data[0]);
539 SFXGE_ADAPTER_UNLOCK(sc);
540 if (error == 0)
541 error = copyout(&i2c, ifr_data_get_ptr(ifr),
542 sizeof(i2c));
543 break;
544 }
545 #endif
546 case SIOCGPRIVATE_0:
547 error = priv_check(curthread, PRIV_DRIVER);
548 if (error != 0)
549 break;
550 error = copyin(ifr_data_get_ptr(ifr), &ioc, sizeof(ioc));
551 if (error != 0)
552 return (error);
553 error = sfxge_private_ioctl(sc, &ioc);
554 if (error == 0) {
555 error = copyout(&ioc, ifr_data_get_ptr(ifr),
556 sizeof(ioc));
557 }
558 break;
559 default:
560 error = ether_ioctl(ifp, command, data);
561 }
562
563 return (error);
564 }
565
566 static void
sfxge_ifnet_fini(if_t ifp)567 sfxge_ifnet_fini(if_t ifp)
568 {
569 struct sfxge_softc *sc = if_getsoftc(ifp);
570
571 SFXGE_ADAPTER_LOCK(sc);
572 sfxge_stop(sc);
573 SFXGE_ADAPTER_UNLOCK(sc);
574
575 ifmedia_removeall(&sc->media);
576 ether_ifdetach(ifp);
577 if_free(ifp);
578 }
579
580 static int
sfxge_ifnet_init(if_t ifp,struct sfxge_softc * sc)581 sfxge_ifnet_init(if_t ifp, struct sfxge_softc *sc)
582 {
583 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp);
584 device_t dev;
585 int rc;
586
587 dev = sc->dev;
588 sc->ifnet = ifp;
589
590 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
591 if_setinitfn(ifp, sfxge_if_init);
592 if_setsoftc(ifp, sc);
593 if_setflags(ifp, IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST);
594 if_setioctlfn(ifp, sfxge_if_ioctl);
595
596 if_setcapabilities(ifp, SFXGE_CAP);
597 if_setcapenable(ifp, SFXGE_CAP_ENABLE);
598 if_sethwtsomax(ifp, SFXGE_TSO_MAX_SIZE);
599 if_sethwtsomaxsegcount(ifp, SFXGE_TX_MAPPING_MAX_SEG);
600 if_sethwtsomaxsegsize(ifp, PAGE_SIZE);
601
602 #ifdef SFXGE_LRO
603 if_setcapabilitiesbit(ifp, IFCAP_LRO, 0);
604 if_setcapenablebit(ifp, IFCAP_LRO, 0);
605 #endif
606
607 if (encp->enc_hw_tx_insert_vlan_enabled) {
608 if_setcapabilitiesbit(ifp, IFCAP_VLAN_HWTAGGING, 0);
609 if_setcapenablebit(ifp, IFCAP_VLAN_HWTAGGING, 0);
610 }
611 if_sethwassistbits(ifp, CSUM_TCP | CSUM_UDP | CSUM_IP | CSUM_TSO |
612 CSUM_TCP_IPV6 | CSUM_UDP_IPV6, 0);
613
614 ether_ifattach(ifp, encp->enc_mac_addr);
615
616 if_settransmitfn(ifp, sfxge_if_transmit);
617 if_setqflushfn(ifp, sfxge_if_qflush);
618
619 if_setgetcounterfn(ifp, sfxge_get_counter);
620
621 DBGPRINT(sc->dev, "ifmedia_init");
622 if ((rc = sfxge_port_ifmedia_init(sc)) != 0)
623 goto fail;
624
625 return (0);
626
627 fail:
628 ether_ifdetach(sc->ifnet);
629 return (rc);
630 }
631
632 void
sfxge_sram_buf_tbl_alloc(struct sfxge_softc * sc,size_t n,uint32_t * idp)633 sfxge_sram_buf_tbl_alloc(struct sfxge_softc *sc, size_t n, uint32_t *idp)
634 {
635 KASSERT(sc->buffer_table_next + n <=
636 efx_nic_cfg_get(sc->enp)->enc_buftbl_limit,
637 ("buffer table full"));
638
639 *idp = sc->buffer_table_next;
640 sc->buffer_table_next += n;
641 }
642
643 static int
sfxge_bar_init(struct sfxge_softc * sc)644 sfxge_bar_init(struct sfxge_softc *sc)
645 {
646 efsys_bar_t *esbp = &sc->bar;
647
648 esbp->esb_rid = PCIR_BAR(sc->mem_bar);
649 if ((esbp->esb_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY,
650 &esbp->esb_rid, RF_ACTIVE)) == NULL) {
651 device_printf(sc->dev, "Cannot allocate BAR region %d\n",
652 sc->mem_bar);
653 return (ENXIO);
654 }
655 esbp->esb_tag = rman_get_bustag(esbp->esb_res);
656 esbp->esb_handle = rman_get_bushandle(esbp->esb_res);
657
658 SFXGE_BAR_LOCK_INIT(esbp, device_get_nameunit(sc->dev));
659
660 return (0);
661 }
662
663 static void
sfxge_bar_fini(struct sfxge_softc * sc)664 sfxge_bar_fini(struct sfxge_softc *sc)
665 {
666 efsys_bar_t *esbp = &sc->bar;
667
668 bus_release_resource(sc->dev, SYS_RES_MEMORY, esbp->esb_rid,
669 esbp->esb_res);
670 SFXGE_BAR_LOCK_DESTROY(esbp);
671 }
672
673 static int
sfxge_create(struct sfxge_softc * sc)674 sfxge_create(struct sfxge_softc *sc)
675 {
676 device_t dev;
677 efx_nic_t *enp;
678 int error;
679 char rss_param_name[sizeof(SFXGE_PARAM(%d.max_rss_channels))];
680 #if EFSYS_OPT_MCDI_LOGGING
681 char mcdi_log_param_name[sizeof(SFXGE_PARAM(%d.mcdi_logging))];
682 #endif
683
684 dev = sc->dev;
685
686 SFXGE_ADAPTER_LOCK_INIT(sc, device_get_nameunit(sc->dev));
687
688 sc->max_rss_channels = 0;
689 snprintf(rss_param_name, sizeof(rss_param_name),
690 SFXGE_PARAM(%d.max_rss_channels),
691 (int)device_get_unit(dev));
692 TUNABLE_INT_FETCH(rss_param_name, &sc->max_rss_channels);
693 #if EFSYS_OPT_MCDI_LOGGING
694 sc->mcdi_logging = sfxge_mcdi_logging;
695 snprintf(mcdi_log_param_name, sizeof(mcdi_log_param_name),
696 SFXGE_PARAM(%d.mcdi_logging),
697 (int)device_get_unit(dev));
698 TUNABLE_INT_FETCH(mcdi_log_param_name, &sc->mcdi_logging);
699 #endif
700
701 sc->stats_node = SYSCTL_ADD_NODE(device_get_sysctl_ctx(dev),
702 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "stats",
703 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Statistics");
704 if (sc->stats_node == NULL) {
705 error = ENOMEM;
706 goto fail;
707 }
708
709 TASK_INIT(&sc->task_reset, 0, sfxge_reset, sc);
710
711 (void) pci_enable_busmaster(dev);
712
713 /* Initialize DMA mappings. */
714 DBGPRINT(sc->dev, "dma_init...");
715 if ((error = sfxge_dma_init(sc)) != 0)
716 goto fail;
717
718 error = efx_family(pci_get_vendor(dev), pci_get_device(dev),
719 &sc->family, &sc->mem_bar);
720 KASSERT(error == 0, ("Family should be filtered by sfxge_probe()"));
721
722 /* Map the device registers. */
723 DBGPRINT(sc->dev, "bar_init...");
724 if ((error = sfxge_bar_init(sc)) != 0)
725 goto fail;
726
727 DBGPRINT(sc->dev, "nic_create...");
728
729 /* Create the common code nic object. */
730 SFXGE_EFSYS_LOCK_INIT(&sc->enp_lock,
731 device_get_nameunit(sc->dev), "nic");
732 if ((error = efx_nic_create(sc->family, (efsys_identifier_t *)sc,
733 &sc->bar, &sc->enp_lock, &enp)) != 0)
734 goto fail3;
735 sc->enp = enp;
736
737 /* Initialize MCDI to talk to the microcontroller. */
738 DBGPRINT(sc->dev, "mcdi_init...");
739 if ((error = sfxge_mcdi_init(sc)) != 0)
740 goto fail4;
741
742 /* Probe the NIC and build the configuration data area. */
743 DBGPRINT(sc->dev, "nic_probe...");
744 if ((error = efx_nic_probe(enp, EFX_FW_VARIANT_DONT_CARE)) != 0)
745 goto fail5;
746
747 if (!ISP2(sfxge_rx_ring_entries) ||
748 (sfxge_rx_ring_entries < EFX_RXQ_MINNDESCS) ||
749 (sfxge_rx_ring_entries > EFX_RXQ_MAXNDESCS)) {
750 log(LOG_ERR, "%s=%d must be power of 2 from %u to %u",
751 SFXGE_PARAM_RX_RING, sfxge_rx_ring_entries,
752 EFX_RXQ_MINNDESCS, EFX_RXQ_MAXNDESCS);
753 error = EINVAL;
754 goto fail_rx_ring_entries;
755 }
756 sc->rxq_entries = sfxge_rx_ring_entries;
757
758 if (efx_nic_cfg_get(enp)->enc_features & EFX_FEATURE_TXQ_CKSUM_OP_DESC)
759 sc->txq_dynamic_cksum_toggle_supported = B_TRUE;
760 else
761 sc->txq_dynamic_cksum_toggle_supported = B_FALSE;
762
763 if (!ISP2(sfxge_tx_ring_entries) ||
764 (sfxge_tx_ring_entries < EFX_TXQ_MINNDESCS) ||
765 (sfxge_tx_ring_entries > efx_nic_cfg_get(enp)->enc_txq_max_ndescs)) {
766 log(LOG_ERR, "%s=%d must be power of 2 from %u to %u",
767 SFXGE_PARAM_TX_RING, sfxge_tx_ring_entries,
768 EFX_TXQ_MINNDESCS, efx_nic_cfg_get(enp)->enc_txq_max_ndescs);
769 error = EINVAL;
770 goto fail_tx_ring_entries;
771 }
772 sc->txq_entries = sfxge_tx_ring_entries;
773
774 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev),
775 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
776 OID_AUTO, "version", CTLFLAG_RD,
777 SFXGE_VERSION_STRING, 0,
778 "Driver version");
779
780 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
781 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
782 OID_AUTO, "phy_type", CTLFLAG_RD,
783 NULL, efx_nic_cfg_get(enp)->enc_phy_type,
784 "PHY type");
785
786 /* Initialize the NVRAM. */
787 DBGPRINT(sc->dev, "nvram_init...");
788 if ((error = efx_nvram_init(enp)) != 0)
789 goto fail6;
790
791 /* Initialize the VPD. */
792 DBGPRINT(sc->dev, "vpd_init...");
793 if ((error = efx_vpd_init(enp)) != 0)
794 goto fail7;
795
796 efx_mcdi_new_epoch(enp);
797
798 /* Reset the NIC. */
799 DBGPRINT(sc->dev, "nic_reset...");
800 if ((error = efx_nic_reset(enp)) != 0)
801 goto fail8;
802
803 /* Initialize buffer table allocation. */
804 sc->buffer_table_next = 0;
805
806 /*
807 * Guarantee minimum and estimate maximum number of event queues
808 * to take it into account when MSI-X interrupts are allocated.
809 * It initializes NIC and keeps it initialized on success.
810 */
811 if ((error = sfxge_estimate_rsrc_limits(sc)) != 0)
812 goto fail8;
813
814 /* Set up interrupts. */
815 DBGPRINT(sc->dev, "intr_init...");
816 if ((error = sfxge_intr_init(sc)) != 0)
817 goto fail9;
818
819 /* Initialize event processing state. */
820 DBGPRINT(sc->dev, "ev_init...");
821 if ((error = sfxge_ev_init(sc)) != 0)
822 goto fail11;
823
824 /* Initialize port state. */
825 DBGPRINT(sc->dev, "port_init...");
826 if ((error = sfxge_port_init(sc)) != 0)
827 goto fail12;
828
829 /* Initialize receive state. */
830 DBGPRINT(sc->dev, "rx_init...");
831 if ((error = sfxge_rx_init(sc)) != 0)
832 goto fail13;
833
834 /* Initialize transmit state. */
835 DBGPRINT(sc->dev, "tx_init...");
836 if ((error = sfxge_tx_init(sc)) != 0)
837 goto fail14;
838
839 sc->init_state = SFXGE_INITIALIZED;
840
841 DBGPRINT(sc->dev, "success");
842 return (0);
843
844 fail14:
845 sfxge_rx_fini(sc);
846
847 fail13:
848 sfxge_port_fini(sc);
849
850 fail12:
851 sfxge_ev_fini(sc);
852
853 fail11:
854 sfxge_intr_fini(sc);
855
856 fail9:
857 efx_nic_fini(sc->enp);
858
859 fail8:
860 efx_vpd_fini(enp);
861
862 fail7:
863 efx_nvram_fini(enp);
864
865 fail6:
866 fail_tx_ring_entries:
867 fail_rx_ring_entries:
868 efx_nic_unprobe(enp);
869
870 fail5:
871 sfxge_mcdi_fini(sc);
872
873 fail4:
874 sc->enp = NULL;
875 efx_nic_destroy(enp);
876 SFXGE_EFSYS_LOCK_DESTROY(&sc->enp_lock);
877
878 fail3:
879 sfxge_bar_fini(sc);
880 (void) pci_disable_busmaster(sc->dev);
881
882 fail:
883 DBGPRINT(sc->dev, "failed %d", error);
884 sc->dev = NULL;
885 SFXGE_ADAPTER_LOCK_DESTROY(sc);
886 return (error);
887 }
888
889 static void
sfxge_destroy(struct sfxge_softc * sc)890 sfxge_destroy(struct sfxge_softc *sc)
891 {
892 efx_nic_t *enp;
893
894 /* Clean up transmit state. */
895 sfxge_tx_fini(sc);
896
897 /* Clean up receive state. */
898 sfxge_rx_fini(sc);
899
900 /* Clean up port state. */
901 sfxge_port_fini(sc);
902
903 /* Clean up event processing state. */
904 sfxge_ev_fini(sc);
905
906 /* Clean up interrupts. */
907 sfxge_intr_fini(sc);
908
909 /* Tear down common code subsystems. */
910 efx_nic_reset(sc->enp);
911 efx_vpd_fini(sc->enp);
912 efx_nvram_fini(sc->enp);
913 efx_nic_unprobe(sc->enp);
914
915 /* Tear down MCDI. */
916 sfxge_mcdi_fini(sc);
917
918 /* Destroy common code context. */
919 enp = sc->enp;
920 sc->enp = NULL;
921 efx_nic_destroy(enp);
922
923 /* Free DMA memory. */
924 sfxge_dma_fini(sc);
925
926 /* Free mapped BARs. */
927 sfxge_bar_fini(sc);
928
929 (void) pci_disable_busmaster(sc->dev);
930
931 taskqueue_drain(taskqueue_thread, &sc->task_reset);
932
933 /* Destroy the softc lock. */
934 SFXGE_ADAPTER_LOCK_DESTROY(sc);
935 }
936
937 static int
sfxge_vpd_handler(SYSCTL_HANDLER_ARGS)938 sfxge_vpd_handler(SYSCTL_HANDLER_ARGS)
939 {
940 struct sfxge_softc *sc = arg1;
941 efx_vpd_value_t value;
942 int rc;
943
944 value.evv_tag = arg2 >> 16;
945 value.evv_keyword = arg2 & 0xffff;
946 if ((rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value))
947 != 0)
948 return (rc);
949
950 return (SYSCTL_OUT(req, value.evv_value, value.evv_length));
951 }
952
953 static void
sfxge_vpd_try_add(struct sfxge_softc * sc,struct sysctl_oid_list * list,efx_vpd_tag_t tag,const char * keyword)954 sfxge_vpd_try_add(struct sfxge_softc *sc, struct sysctl_oid_list *list,
955 efx_vpd_tag_t tag, const char *keyword)
956 {
957 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
958 efx_vpd_value_t value;
959
960 /* Check whether VPD tag/keyword is present */
961 value.evv_tag = tag;
962 value.evv_keyword = EFX_VPD_KEYWORD(keyword[0], keyword[1]);
963 if (efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value) != 0)
964 return;
965
966 SYSCTL_ADD_PROC(ctx, list, OID_AUTO, keyword,
967 CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_NEEDGIANT,
968 sc, tag << 16 | EFX_VPD_KEYWORD(keyword[0], keyword[1]),
969 sfxge_vpd_handler, "A", "");
970 }
971
972 static int
sfxge_vpd_init(struct sfxge_softc * sc)973 sfxge_vpd_init(struct sfxge_softc *sc)
974 {
975 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
976 struct sysctl_oid *vpd_node;
977 struct sysctl_oid_list *vpd_list;
978 char keyword[3];
979 efx_vpd_value_t value;
980 int rc;
981
982 if ((rc = efx_vpd_size(sc->enp, &sc->vpd_size)) != 0) {
983 /*
984 * Unprivileged functions deny VPD access.
985 * Simply skip VPD in this case.
986 */
987 if (rc == EACCES)
988 goto done;
989 goto fail;
990 }
991 sc->vpd_data = malloc(sc->vpd_size, M_SFXGE, M_WAITOK);
992 if ((rc = efx_vpd_read(sc->enp, sc->vpd_data, sc->vpd_size)) != 0)
993 goto fail2;
994
995 /* Copy ID (product name) into device description, and log it. */
996 value.evv_tag = EFX_VPD_ID;
997 if (efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value) == 0) {
998 value.evv_value[value.evv_length] = 0;
999 device_set_desc_copy(sc->dev, value.evv_value);
1000 device_printf(sc->dev, "%s\n", value.evv_value);
1001 }
1002
1003 vpd_node = SYSCTL_ADD_NODE(ctx,
1004 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO, "vpd",
1005 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Vital Product Data");
1006 vpd_list = SYSCTL_CHILDREN(vpd_node);
1007
1008 /* Add sysctls for all expected and any vendor-defined keywords. */
1009 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "PN");
1010 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "EC");
1011 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "SN");
1012 keyword[0] = 'V';
1013 keyword[2] = 0;
1014 for (keyword[1] = '0'; keyword[1] <= '9'; keyword[1]++)
1015 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword);
1016 for (keyword[1] = 'A'; keyword[1] <= 'Z'; keyword[1]++)
1017 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword);
1018
1019 done:
1020 return (0);
1021
1022 fail2:
1023 free(sc->vpd_data, M_SFXGE);
1024 fail:
1025 return (rc);
1026 }
1027
1028 static void
sfxge_vpd_fini(struct sfxge_softc * sc)1029 sfxge_vpd_fini(struct sfxge_softc *sc)
1030 {
1031 free(sc->vpd_data, M_SFXGE);
1032 }
1033
1034 static void
sfxge_reset(void * arg,int npending)1035 sfxge_reset(void *arg, int npending)
1036 {
1037 struct sfxge_softc *sc;
1038 int rc;
1039 unsigned attempt;
1040
1041 (void)npending;
1042
1043 sc = (struct sfxge_softc *)arg;
1044
1045 SFXGE_ADAPTER_LOCK(sc);
1046
1047 if (sc->init_state != SFXGE_STARTED)
1048 goto done;
1049
1050 sfxge_stop(sc);
1051 efx_nic_reset(sc->enp);
1052 for (attempt = 0; attempt < sfxge_restart_attempts; ++attempt) {
1053 if ((rc = sfxge_start(sc)) == 0)
1054 goto done;
1055
1056 device_printf(sc->dev, "start on reset failed (%d)\n", rc);
1057 DELAY(100000);
1058 }
1059
1060 device_printf(sc->dev, "reset failed; interface is now stopped\n");
1061
1062 done:
1063 SFXGE_ADAPTER_UNLOCK(sc);
1064 }
1065
1066 void
sfxge_schedule_reset(struct sfxge_softc * sc)1067 sfxge_schedule_reset(struct sfxge_softc *sc)
1068 {
1069 taskqueue_enqueue(taskqueue_thread, &sc->task_reset);
1070 }
1071
1072 static int
sfxge_attach(device_t dev)1073 sfxge_attach(device_t dev)
1074 {
1075 struct sfxge_softc *sc;
1076 if_t ifp;
1077 int error;
1078
1079 sc = device_get_softc(dev);
1080 sc->dev = dev;
1081
1082 /* Allocate ifnet. */
1083 ifp = if_alloc(IFT_ETHER);
1084 if (ifp == NULL) {
1085 device_printf(dev, "Couldn't allocate ifnet\n");
1086 error = ENOMEM;
1087 goto fail;
1088 }
1089 sc->ifnet = ifp;
1090
1091 /* Initialize hardware. */
1092 DBGPRINT(sc->dev, "create nic");
1093 if ((error = sfxge_create(sc)) != 0)
1094 goto fail2;
1095
1096 /* Create the ifnet for the port. */
1097 DBGPRINT(sc->dev, "init ifnet");
1098 if ((error = sfxge_ifnet_init(ifp, sc)) != 0)
1099 goto fail3;
1100
1101 DBGPRINT(sc->dev, "init vpd");
1102 if ((error = sfxge_vpd_init(sc)) != 0)
1103 goto fail4;
1104
1105 /*
1106 * NIC is initialized inside sfxge_create() and kept inialized
1107 * to be able to initialize port to discover media types in
1108 * sfxge_ifnet_init().
1109 */
1110 efx_nic_fini(sc->enp);
1111
1112 sc->init_state = SFXGE_REGISTERED;
1113
1114 DBGPRINT(sc->dev, "success");
1115 return (0);
1116
1117 fail4:
1118 sfxge_ifnet_fini(ifp);
1119 fail3:
1120 efx_nic_fini(sc->enp);
1121 sfxge_destroy(sc);
1122
1123 fail2:
1124 if_free(sc->ifnet);
1125
1126 fail:
1127 DBGPRINT(sc->dev, "failed %d", error);
1128 return (error);
1129 }
1130
1131 static int
sfxge_detach(device_t dev)1132 sfxge_detach(device_t dev)
1133 {
1134 struct sfxge_softc *sc;
1135
1136 sc = device_get_softc(dev);
1137
1138 sfxge_vpd_fini(sc);
1139
1140 /* Destroy the ifnet. */
1141 sfxge_ifnet_fini(sc->ifnet);
1142
1143 /* Tear down hardware. */
1144 sfxge_destroy(sc);
1145
1146 return (0);
1147 }
1148
1149 static int
sfxge_probe(device_t dev)1150 sfxge_probe(device_t dev)
1151 {
1152 uint16_t pci_vendor_id;
1153 uint16_t pci_device_id;
1154 efx_family_t family;
1155 unsigned int mem_bar;
1156 int rc;
1157
1158 pci_vendor_id = pci_get_vendor(dev);
1159 pci_device_id = pci_get_device(dev);
1160
1161 DBGPRINT(dev, "PCI ID %04x:%04x", pci_vendor_id, pci_device_id);
1162 rc = efx_family(pci_vendor_id, pci_device_id, &family, &mem_bar);
1163 if (rc != 0) {
1164 DBGPRINT(dev, "efx_family fail %d", rc);
1165 return (ENXIO);
1166 }
1167
1168 if (family == EFX_FAMILY_SIENA) {
1169 device_set_desc(dev, "Solarflare SFC9000 family");
1170 return (0);
1171 }
1172
1173 if (family == EFX_FAMILY_HUNTINGTON) {
1174 device_set_desc(dev, "Solarflare SFC9100 family");
1175 return (0);
1176 }
1177
1178 if (family == EFX_FAMILY_MEDFORD) {
1179 device_set_desc(dev, "Solarflare SFC9200 family");
1180 return (0);
1181 }
1182
1183 if (family == EFX_FAMILY_MEDFORD2) {
1184 device_set_desc(dev, "Solarflare SFC9250 family");
1185 return (0);
1186 }
1187
1188 DBGPRINT(dev, "impossible controller family %d", family);
1189 return (ENXIO);
1190 }
1191
1192 static device_method_t sfxge_methods[] = {
1193 DEVMETHOD(device_probe, sfxge_probe),
1194 DEVMETHOD(device_attach, sfxge_attach),
1195 DEVMETHOD(device_detach, sfxge_detach),
1196
1197 DEVMETHOD_END
1198 };
1199
1200 static driver_t sfxge_driver = {
1201 "sfxge",
1202 sfxge_methods,
1203 sizeof(struct sfxge_softc)
1204 };
1205
1206 DRIVER_MODULE(sfxge, pci, sfxge_driver, 0, 0);
1207