1 /* -*- tab-width: 4 -*-
2 *
3 * Electric(tm) VLSI Design System
4 *
5 * File: sim.cpp
6 * Simulation tool: main module
7 * Written by: Steven M. Rubin, Static Free Software
8 *
9 * Copyright (c) 2000 Static Free Software.
10 *
11 * Electric(tm) is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * Electric(tm) is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with Electric(tm); see the file COPYING. If not, write to
23 * the Free Software Foundation, Inc., 59 Temple Place, Suite 330,
24 * Boston, Mass 02111-1307, USA.
25 *
26 * Static Free Software
27 * 4119 Alpine Road
28 * Portola Valley, California 94028
29 * info@staticfreesoft.com
30 */
31
32 #include "config.h"
33 #if SIMTOOL
34
35 #include "global.h"
36 #include "egraphics.h"
37 #include "edialogs.h"
38 #include "sim.h"
39 #include "simals.h"
40 #include "simirsim.h"
41 #include "tecgen.h"
42 #include "tecschem.h"
43 #include "usr.h"
44
45 /* prototypes for local routines */
46 static void sim_checktostopsimulation(NODEPROTO *np);
47 static void sim_writephases(float[], INTBIG[], INTBIG, void*);
48 static void sim_optionsdlog(void);
49 static void sim_spicedlog(void);
50 static void sim_verilogdlog(void);
51 static void sim_verdiasetcellinfo(LIBRARY *curlib, void *dia);
52 static BOOLEAN sim_topofcells(CHAR **c);
53 static CHAR *sim_nextcells(void);
54 static void sim_optionssetcolorindia(void *dia, INTBIG entry, INTBIG signal, char **newlang);
55 static void sim_optionsgetcolorfromdia(void *dia, INTBIG entry, INTBIG signal);
56
57 #ifndef ALLCPLUSPLUS
58 extern "C"
59 {
60 #endif
61
62 /************************** ALS COMMANDS **************************/
63
64 /* ALS's build-actel-models command */
65 static COMCOMP qbuildp = {NOKEYWORD, topoffile, nextfile, NOPARAMS,
66 0, x_(" \t"), M_("Actel table file to convert to library"), 0};
67
68 /* ALS's clock command */
69 static INTBIG sim_nextcustomclock(CHAR*, COMCOMP*[], CHAR);
70 static COMCOMP clockcdurp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, sim_nextcustomclock,
71 0, x_(" \t"), M_("clock: duration of this phase"), 0};
72 static COMCOMP clockclevp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
73 0, x_(" \t"), M_("clock: level for this phase"), 0};
sim_nextcustomclock(CHAR * i,COMCOMP * j[],CHAR c)74 static INTBIG sim_nextcustomclock(CHAR *i, COMCOMP *j[], CHAR c)
75 { Q_UNUSED( i ); Q_UNUSED( c); j[0] = &clockclevp; j[1] = &clockcdurp; return(2); }
76 static COMCOMP clockccyp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, sim_nextcustomclock,
77 0, x_(" \t"), M_("clock: number of cycles (0 for infinite)"), 0};
78 static COMCOMP clockcstrp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
79 0, x_(" \t"), M_("clock: strength"), 0};
80 static COMCOMP clockclp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
81 0, x_(" \t"), M_("clock: random distribution"), 0};
82 static COMCOMP clockfp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
83 0, x_(" \t"), M_("50/50 duty cycle frequency"), 0};
84 static COMCOMP clockpp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
85 0, x_(" \t"), M_("50/50 duty cycle period"), 0};
86 static KEYWORD clockopt[] =
87 {
88 {x_("frequency"), 1,{&clockfp,NOKEY,NOKEY,NOKEY,NOKEY}},
89 {x_("period"), 1,{&clockpp,NOKEY,NOKEY,NOKEY,NOKEY}},
90 {x_("custom"), 3,{&clockclp,&clockcstrp,&clockccyp,NOKEY,NOKEY}},
91 TERMKEY
92 };
93 static COMCOMP clockop = {clockopt, NOTOPLIST, NONEXTLIST, NOPARAMS,
94 0, x_(" \t"), M_("clock options"), 0};
95 static COMCOMP clocknp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
96 0, x_(" \t"), M_("node name"), 0};
97
98 /* ALS's go command */
99 static COMCOMP gop = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
100 0, x_(" \t"), M_("maximum simulation time (in seconds)"), 0};
101
102 /* ALS's print command */
103 static COMCOMP printsp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
104 0, x_(" \t"), M_("node to print"), 0};
105 static KEYWORD printopt[] =
106 {
107 {x_("display"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
108 {x_("instances"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
109 {x_("netlist"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
110 {x_("size"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
111 {x_("state"), 1,{&printsp,NOKEY,NOKEY,NOKEY,NOKEY}},
112 {x_("vector"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
113 {x_("xref"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
114 TERMKEY
115 };
116 static COMCOMP printp = {printopt, NOTOPLIST, NONEXTLIST, NOPARAMS,
117 0, x_(" \t"), M_("printing options"), 0};
118
119 /* ALS's seed command */
120 static KEYWORD seedopt[] =
121 {
122 {x_("reset"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
123 {x_("no-reset"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
124 TERMKEY
125 };
126 static COMCOMP seedp = {seedopt, NOTOPLIST, NONEXTLIST, NOPARAMS,
127 0, x_(" \t"), M_("random number seed setting"), 0};
128
129 /* ALS's set command */
130 static COMCOMP settp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
131 0, x_(" \t"), M_("time of node set (in seconds)"), 0};
132 static COMCOMP setsp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
133 0, x_(" \t"), M_("strength of node set"), 0};
134 static KEYWORD setlopt[] =
135 {
136 {x_("H"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
137 {x_("L"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
138 {x_("X"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
139 TERMKEY
140 };
141 static COMCOMP setlp = {setlopt, NOTOPLIST, NONEXTLIST, NOPARAMS,
142 0, x_(" \t"), M_("state level"), 0};
143 static COMCOMP setnp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
144 0, x_(" \t"), M_("node name to set"), 0};
145
146 /* ALS's trace command */
147 static KEYWORD traceopt[] =
148 {
149 {x_("on"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
150 {x_("off"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
151 TERMKEY
152 };
153 static COMCOMP tracep = {traceopt, NOTOPLIST, NONEXTLIST, NOPARAMS,
154 0, x_(" \t"), M_("trace state"), 0};
155
156 /* ALS's vector command */
157 static COMCOMP vectordtp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
158 0, x_(" \t"), M_("time at which to delete"), 0};
159 static KEYWORD vectordopt[] =
160 {
161 {x_("time"), 1,{&vectordtp,NOKEY,NOKEY,NOKEY,NOKEY}},
162 {x_("all"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
163 TERMKEY
164 };
165 static COMCOMP vectordop = {vectordopt, NOTOPLIST, NONEXTLIST, NOPARAMS,
166 0, x_(" \t"), M_("vector deletion option"), 0};
167 static COMCOMP vectordp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
168 0, x_(" \t"), M_("node name to delete"), 0};
169 static COMCOMP vectorlp = {NOKEYWORD, topoffile, nextfile, NOPARAMS,
170 0, x_(" \t"), M_("file name with vectors"), 0};
171 static COMCOMP vectorsp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
172 0, x_(" \t"), M_("file name to save vectors"), 0};
173 static KEYWORD vectoropt[] =
174 {
175 {x_("delete"), 2,{&vectordp,&vectordop,NOKEY,NOKEY,NOKEY}},
176 {x_("load"), 1,{&vectorlp,NOKEY,NOKEY,NOKEY,NOKEY}},
177 {x_("save"), 1,{&vectorsp,NOKEY,NOKEY,NOKEY,NOKEY}},
178 {x_("new"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
179 TERMKEY
180 };
181 static COMCOMP vectorp = {vectoropt, NOTOPLIST, NONEXTLIST, NOPARAMS,
182 0, x_(" \t"), M_("vector options"), 0};
183 static KEYWORD annotateopt[] =
184 {
185 {x_("minimum"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
186 {x_("typical"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
187 {x_("maximum"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
188 TERMKEY
189 };
190 static COMCOMP annotatep = {annotateopt, NOTOPLIST, NONEXTLIST, NOPARAMS,
191 0, x_(" \t"), M_("annotate options"), 0};
192 static COMCOMP orderrp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
193 0, x_(" \t"), M_("ordered list of trace names"), 0};
194 static KEYWORD orderopt[] =
195 {
196 {x_("save"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
197 {x_("restore"), 1,{&orderrp,NOKEY,NOKEY,NOKEY,NOKEY}},
198 TERMKEY
199 };
200 static COMCOMP orderp = {orderopt, NOTOPLIST, NONEXTLIST, NOPARAMS,
201 0, x_(" \t"), M_("order options"), 0};
202
203 /* ALS's command table */
204 static KEYWORD sim_alsopt[] =
205 {
206 {x_("annotate"), 1,{&annotatep,NOKEY,NOKEY,NOKEY,NOKEY}},
207 {x_("build-actel-models"), 1,{&qbuildp,NOKEY,NOKEY,NOKEY,NOKEY}},
208 {x_("clock"), 2,{&clocknp,&clockop,NOKEY,NOKEY,NOKEY}},
209 {x_("erase"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
210 {x_("go"), 1,{&gop,NOKEY,NOKEY,NOKEY,NOKEY}},
211 {x_("help"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
212 {x_("order"), 1,{&orderp,NOKEY,NOKEY,NOKEY,NOKEY}},
213 {x_("print"), 1,{&printp,NOKEY,NOKEY,NOKEY,NOKEY}},
214 {x_("seed"), 1,{&seedp,NOKEY,NOKEY,NOKEY,NOKEY}},
215 {x_("set"), 4,{&setnp,&setlp,&setsp,&settp,NOKEY}},
216 {x_("trace"), 1,{&tracep,NOKEY,NOKEY,NOKEY,NOKEY}},
217 {x_("vector"), 1,{&vectorp,NOKEY,NOKEY,NOKEY,NOKEY}},
218 TERMKEY
219 };
220 static COMCOMP sim_alsp = {sim_alsopt, NOTOPLIST, NONEXTLIST, NOPARAMS,
221 0, x_(" \t"), M_("Simulation command"), 0};
222
223 /************************** SIMULATION WINDOW COMMANDS **************************/
224
225 static COMCOMP cursorgp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
226 0, x_(" \t"), M_("time at the extension cursor"), 0};
227 static COMCOMP cursorwp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
228 0, x_(" \t"), M_("time at the main cursor"), 0};
229 static KEYWORD cursoropt[] =
230 {
231 {x_("extension"), 1,{&cursorgp,NOKEY,NOKEY,NOKEY,NOKEY}},
232 {x_("main"), 1,{&cursorwp,NOKEY,NOKEY,NOKEY,NOKEY}},
233 {x_("center"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
234 TERMKEY
235 };
236 static COMCOMP cursorp = {cursoropt, NOTOPLIST, NONEXTLIST, NOPARAMS,
237 0, x_(" \t"), M_("cursor color"), 0};
238
239 static COMCOMP moveap = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
240 0, x_(" \t"), M_("distance to move (in seconds)"), 0};
241 static COMCOMP movesp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
242 0, x_(" \t"), M_("distance to move (in signals)"), 0};
243 static KEYWORD moveopt[] =
244 {
245 {x_("left"), 1,{&moveap,NOKEY,NOKEY,NOKEY,NOKEY}},
246 {x_("right"), 1,{&moveap,NOKEY,NOKEY,NOKEY,NOKEY}},
247 {x_("up"), 1,{&movesp,NOKEY,NOKEY,NOKEY,NOKEY}},
248 {x_("down"), 1,{&movesp,NOKEY,NOKEY,NOKEY,NOKEY}},
249 TERMKEY
250 };
251 static COMCOMP movep = {moveopt, NOTOPLIST, NONEXTLIST, NOPARAMS,
252 0, x_(" \t"), M_("window move option"), 0};
253
254 static COMCOMP zoomup = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
255 0, x_(" \t"), M_("upper time of zoom"), 0};
256 static COMCOMP zoomlp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
257 0, x_(" \t"), M_("lower time of zoom"), 0};
258 static COMCOMP zoomap = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
259 0, x_(" \t"), M_("amount to zoom"), 0};
260 static KEYWORD zoomopt[] =
261 {
262 {x_("window"), 2,{&zoomlp,&zoomup,NOKEY,NOKEY,NOKEY}},
263 {x_("in"), 1,{&zoomap,NOKEY,NOKEY,NOKEY,NOKEY}},
264 {x_("out"), 1,{&zoomap,NOKEY,NOKEY,NOKEY,NOKEY}},
265 {x_("cursor"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
266 {x_("all-displayed"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
267 TERMKEY
268 };
269 static COMCOMP zoomp = {zoomopt, NOTOPLIST, NONEXTLIST, NOPARAMS,
270 0, x_(" \t"), M_("window zoom options"), 0};
271 static COMCOMP tracessp = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
272 0, x_(" \t"), M_("number of traces to show on the display"), 0};
273 static KEYWORD tracesopt[] =
274 {
275 {x_("more"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
276 {x_("less"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
277 {x_("set"), 1,{&tracessp,NOKEY,NOKEY,NOKEY,NOKEY}},
278 TERMKEY
279 };
280 static COMCOMP tracesp = {tracesopt, NOTOPLIST, NONEXTLIST, NOPARAMS,
281 0, x_(" \t"), M_("window traces options"), 0};
282 static KEYWORD dispcolorsopt[] =
283 {
284 {x_("white"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
285 {x_("black"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
286 {x_("red"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
287 {x_("blue"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
288 {x_("green"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
289 {x_("cyan"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
290 {x_("magenta"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
291 {x_("yellow"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
292 {x_("gray"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
293 {x_("orange"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
294 {x_("purple"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
295 {x_("brown"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
296 {x_("light-gray"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
297 {x_("dark-gray"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
298 {x_("light-red"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
299 {x_("dark-red"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
300 {x_("light-green"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
301 {x_("dark-green"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
302 {x_("light-blue"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
303 {x_("dark-blue"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
304 TERMKEY
305 };
306 static COMCOMP dispcolorsp = {dispcolorsopt, NOTOPLIST, NONEXTLIST, NOPARAMS,
307 0, x_(" \t"), M_("color for this strength/level"), 0};
308 static KEYWORD dispcoloropt[] =
309 {
310 {x_("off"), 1,{&dispcolorsp,NOKEY,NOKEY,NOKEY,NOKEY}},
311 {x_("node"), 1,{&dispcolorsp,NOKEY,NOKEY,NOKEY,NOKEY}},
312 {x_("gate"), 1,{&dispcolorsp,NOKEY,NOKEY,NOKEY,NOKEY}},
313 {x_("power"), 1,{&dispcolorsp,NOKEY,NOKEY,NOKEY,NOKEY}},
314 {x_("low"), 1,{&dispcolorsp,NOKEY,NOKEY,NOKEY,NOKEY}},
315 {x_("high"), 1,{&dispcolorsp,NOKEY,NOKEY,NOKEY,NOKEY}},
316 {x_("undefined"), 1,{&dispcolorsp,NOKEY,NOKEY,NOKEY,NOKEY}},
317 TERMKEY
318 };
319 static COMCOMP dispcolorp = {dispcoloropt, NOTOPLIST, NONEXTLIST, NOPARAMS,
320 0, x_(" \t"), M_("window strength color options"), 0};
321 static COMCOMP vectorfp = {NOKEYWORD, topoffile, nextfile, NOPARAMS,
322 0, x_(" \t"), M_("Vector file"), 0};
323 static KEYWORD sim_windowopt[] =
324 {
325 {x_("cursor"), 1,{&cursorp,NOKEY,NOKEY,NOKEY,NOKEY}},
326 {x_("move"), 1,{&movep,NOKEY,NOKEY,NOKEY,NOKEY}},
327 {x_("traces"), 1,{&tracesp,NOKEY,NOKEY,NOKEY,NOKEY}},
328 {x_("zoom"), 1,{&zoomp,NOKEY,NOKEY,NOKEY,NOKEY}},
329 {x_("color"), 1,{&dispcolorp,NOKEY,NOKEY,NOKEY,NOKEY}},
330 {x_("2-state-display"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
331 {x_("12-state-display"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
332 {x_("advance-time"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
333 {x_("freeze-time"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
334 {x_("display-waveform"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
335 {x_("ignore-waveform"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
336 {x_("clear-saved-signals"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
337 {x_("vector-clear"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
338 {x_("vector-load"), 1,{&vectorfp,NOKEY,NOKEY,NOKEY,NOKEY}},
339 {x_("vector-save"), 1,{&vectorfp,NOKEY,NOKEY,NOKEY,NOKEY}},
340 {x_("vector-writespice"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
341 TERMKEY
342 };
343 static COMCOMP sim_windowp = {sim_windowopt, NOTOPLIST, NONEXTLIST, NOPARAMS,
344 0, x_(" \t"), M_("Simulation window command"), 0};
345
346 /************************** SPICE COMMANDS **************************/
347
348 static KEYWORD sim_spicelevelopt[] =
349 {
350 {x_("1"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
351 {x_("2"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
352 {x_("3"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
353 TERMKEY
354 };
355 static COMCOMP sim_spicelevelp = {sim_spicelevelopt, NOTOPLIST, NONEXTLIST,
356 NOPARAMS, INPUTOPT, x_(" \t"), M_("Spice simulation level"), M_("show current")};
357 static KEYWORD sim_spiceformopt[] =
358 {
359 {x_("2"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
360 {x_("3"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
361 {x_("hspice"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
362 {x_("pspice"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
363 {x_("gnucap"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
364 {x_("smartspice"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
365 TERMKEY
366 };
367 static COMCOMP spiceformp = {sim_spiceformopt, NOTOPLIST, NONEXTLIST,
368 NOPARAMS, INPUTOPT, x_(" \t"), M_("Spice format"), 0};
369 static KEYWORD sim_spicenotopt[] =
370 {
371 {x_("resistance"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
372 {x_("capacitances"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
373 {x_("plot"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
374 {x_("global-pwr-gnd"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
375 {x_("use-nodenames"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
376 TERMKEY
377 };
378 static COMCOMP sim_spicenotp = {sim_spicenotopt, NOTOPLIST, NONEXTLIST,
379 NOPARAMS, INPUTOPT, x_(" \t"), M_("Spice simulation NOT option"), 0};
380 static COMCOMP sim_spicereadp = {NOKEYWORD, topoffile, nextfile, NOPARAMS,
381 INPUTOPT, x_(" \t"), M_("File containing spice output"), 0};
382 static COMCOMP sim_spicesavep = {NOKEYWORD, NOTOPLIST, NONEXTLIST, NOPARAMS,
383 INPUTOPT, x_(" \t"), M_("File in which to save spice output"), 0};
384 static KEYWORD sim_spiceopt[] =
385 {
386 {x_("level"), 1,{&sim_spicelevelp,NOKEY,NOKEY,NOKEY,NOKEY}},
387 {x_("save-output"), 1,{&sim_spicesavep,NOKEY,NOKEY,NOKEY,NOKEY}},
388 {x_("format"), 1,{&spiceformp,NOKEY,NOKEY,NOKEY,NOKEY}},
389 {x_("parse-output"), 1,{&sim_spicereadp,NOKEY,NOKEY,NOKEY,NOKEY}},
390 {x_("show-spice-this-cell"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
391 {x_("not"), 1,{&sim_spicenotp,NOKEY,NOKEY,NOKEY,NOKEY}},
392 {x_("resistance"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
393 {x_("capacitances"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
394 {x_("plot"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
395 {x_("output-normal"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
396 {x_("output-raw"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
397 {x_("output-smartraw"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
398 {x_("global-pwr-gnd"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
399 {x_("use-nodenames"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
400 TERMKEY
401 };
402 static COMCOMP sim_spicep = {sim_spiceopt, NOTOPLIST, NONEXTLIST,
403 NOPARAMS, INPUTOPT, x_(" \t"), M_("Spice simulation option"), 0};
404
405 /************************** VERILOG COMMANDS **************************/
406
407 static KEYWORD sim_vernotopt[] =
408 {
409 {x_("use-assign"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
410 {x_("default-trireg"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
411 TERMKEY
412 };
413 static COMCOMP sim_vernotp = {sim_vernotopt, NOTOPLIST, NONEXTLIST,
414 NOPARAMS, INPUTOPT, x_(" \t"), M_("Verilog simulation NOT option"), 0};
415 static COMCOMP sim_verreadp = {NOKEYWORD, topoffile, nextfile, NOPARAMS,
416 INPUTOPT, x_(" \t"), M_("File containing Verilog VCD dump output"), 0};
417 static KEYWORD sim_veropt[] =
418 {
419 {x_("not"), 1,{&sim_vernotp,NOKEY,NOKEY,NOKEY,NOKEY}},
420 {x_("use-assign"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
421 {x_("default-trireg"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
422 {x_("parse-output"), 1,{&sim_verreadp,NOKEY,NOKEY,NOKEY,NOKEY}},
423 {x_("show-verilog-this-cell"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
424 TERMKEY
425 };
426 static COMCOMP sim_verp = {sim_veropt, NOTOPLIST, NONEXTLIST,
427 NOPARAMS, INPUTOPT, x_(" \t"), M_("Verilog simulation option"), 0};
428
429 /************************** FASTHENRY COMMANDS **************************/
430
431 static COMCOMP simfhaaddp = {NOKEYWORD, NOTOPLIST, NONEXTLIST,
432 NOPARAMS, INPUTOPT, x_(" \t"), M_("FastHenry arc group name"), 0};
433 static COMCOMP simfhathickp = {NOKEYWORD, NOTOPLIST, NONEXTLIST,
434 NOPARAMS, INPUTOPT, x_(" \t"), M_("FastHenry arc thickness"), 0};
435 static COMCOMP simfhawidsubp = {NOKEYWORD, NOTOPLIST, NONEXTLIST,
436 NOPARAMS, INPUTOPT, x_(" \t"), M_("FastHenry arc width subdivisions"), 0};
437 static COMCOMP simfhaheisubp = {NOKEYWORD, NOTOPLIST, NONEXTLIST,
438 NOPARAMS, INPUTOPT, x_(" \t"), M_("FastHenry arc height subdivisions"), 0};
439 static COMCOMP simfhazheadp = {NOKEYWORD, NOTOPLIST, NONEXTLIST,
440 NOPARAMS, INPUTOPT, x_(" \t"), M_("FastHenry arc head Z"), 0};
441 static COMCOMP simfhaztailp = {NOKEYWORD, NOTOPLIST, NONEXTLIST,
442 NOPARAMS, INPUTOPT, x_(" \t"), M_("FastHenry arc tail Z"), 0};
443 static KEYWORD sim_fhaopt[] =
444 {
445 {x_("add"), 1,{&simfhaaddp,NOKEY,NOKEY,NOKEY,NOKEY}},
446 {x_("remove"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
447 {x_("thickness"), 1,{&simfhathickp,NOKEY,NOKEY,NOKEY,NOKEY}},
448 {x_("width-subdivisions"), 1,{&simfhawidsubp,NOKEY,NOKEY,NOKEY,NOKEY}},
449 {x_("height-subdivisions"), 1,{&simfhaheisubp,NOKEY,NOKEY,NOKEY,NOKEY}},
450 {x_("z-head"), 1,{&simfhazheadp,NOKEY,NOKEY,NOKEY,NOKEY}},
451 {x_("z-tail"), 1,{&simfhaztailp,NOKEY,NOKEY,NOKEY,NOKEY}},
452 TERMKEY
453 };
454 COMCOMP sim_fhap = {sim_fhaopt, NOTOPLIST, NONEXTLIST,
455 NOPARAMS, INPUTOPT, x_(" \t"), M_("FastHenry arc option"), 0};
456 static COMCOMP simfhpolemp = {NOKEYWORD, NOTOPLIST, NONEXTLIST,
457 NOPARAMS, INPUTOPT, x_(" \t"), M_("Number of poles"), 0};
458 static KEYWORD simfhpoleopt[] =
459 {
460 {x_("single"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
461 {x_("multiple"), 1,{&simfhpolemp,NOKEY,NOKEY,NOKEY,NOKEY}},
462 TERMKEY
463 };
464 static COMCOMP simfhpolep = {simfhpoleopt, NOTOPLIST, NONEXTLIST,
465 NOPARAMS, INPUTOPT, x_(" \t"), M_("FastHenry multipole option"), 0};
466 static COMCOMP simfhfreqsp = {NOKEYWORD, NOTOPLIST, NONEXTLIST,
467 NOPARAMS, INPUTOPT, x_(" \t"), M_("Starting frequency"), 0};
468 static COMCOMP simfhfreqep = {NOKEYWORD, NOTOPLIST, NONEXTLIST,
469 NOPARAMS, INPUTOPT, x_(" \t"), M_("Ending frequency"), 0};
470 static COMCOMP simfhfreqrp = {NOKEYWORD, NOTOPLIST, NONEXTLIST,
471 NOPARAMS, INPUTOPT, x_(" \t"), M_("Runs per decade"), 0};
472 static KEYWORD simfhfreqopt[] =
473 {
474 {x_("single"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
475 {x_("multiple"), 3,{&simfhfreqsp,&simfhfreqep,&simfhfreqrp,NOKEY,NOKEY}},
476 TERMKEY
477 };
478 static COMCOMP simfhfreqp = {simfhfreqopt, NOTOPLIST, NONEXTLIST,
479 NOPARAMS, INPUTOPT, x_(" \t"), M_("FastHenry frequency option"), 0};
480 static COMCOMP simfhthickp = {NOKEYWORD, NOTOPLIST, NONEXTLIST,
481 NOPARAMS, INPUTOPT, x_(" \t"), M_("FastHenry default thickness"), 0};
482 static COMCOMP simfhwidthp = {NOKEYWORD, NOTOPLIST, NONEXTLIST,
483 NOPARAMS, INPUTOPT, x_(" \t"), M_("FastHenry default width subdivisions"), 0};
484 static COMCOMP simfhheightp = {NOKEYWORD, NOTOPLIST, NONEXTLIST,
485 NOPARAMS, INPUTOPT, x_(" \t"), M_("FastHenry default height subdivisions"), 0};
486 static COMCOMP simfhseglenp = {NOKEYWORD, NOTOPLIST, NONEXTLIST,
487 NOPARAMS, INPUTOPT, x_(" \t"), M_("FastHenry maximum segment length"), 0};
488 static KEYWORD simfhexeopt[] =
489 {
490 {x_("none"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
491 {x_("run"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
492 {x_("multiple-run"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
493 TERMKEY
494 };
495 static COMCOMP simfhexep = {simfhexeopt, NOTOPLIST, NONEXTLIST,
496 NOPARAMS, INPUTOPT, x_(" \t"), M_("FastHenry execution option"), 0};
497 static KEYWORD simfhpsopt[] =
498 {
499 {x_("on"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
500 {x_("off"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
501 TERMKEY
502 };
503 static COMCOMP simfhpsp = {simfhpsopt, NOTOPLIST, NONEXTLIST,
504 NOPARAMS, INPUTOPT, x_(" \t"), M_("FastHenry PostScript option"), 0};
505 static KEYWORD simfhspiceopt[] =
506 {
507 {x_("on"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
508 {x_("off"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
509 TERMKEY
510 };
511 static COMCOMP simfhspicep = {simfhspiceopt, NOTOPLIST, NONEXTLIST,
512 NOPARAMS, INPUTOPT, x_(" \t"), M_("FastHenry Spice option"), 0};
513 static KEYWORD sim_fhopt[] =
514 {
515 {x_("arc"), 1,{&sim_fhap,NOKEY,NOKEY,NOKEY,NOKEY}},
516 {x_("pole"), 1,{&simfhpolep,NOKEY,NOKEY,NOKEY,NOKEY}},
517 {x_("frequency"), 1,{&simfhfreqp,NOKEY,NOKEY,NOKEY,NOKEY}},
518 {x_("thickness"), 1,{&simfhthickp,NOKEY,NOKEY,NOKEY,NOKEY}},
519 {x_("width-subdivisions"), 1,{&simfhwidthp,NOKEY,NOKEY,NOKEY,NOKEY}},
520 {x_("height-subdivisions"), 1,{&simfhheightp,NOKEY,NOKEY,NOKEY,NOKEY}},
521 {x_("max-segment-length"), 1,{&simfhseglenp,NOKEY,NOKEY,NOKEY,NOKEY}},
522 {x_("execute"), 1,{&simfhexep,NOKEY,NOKEY,NOKEY,NOKEY}},
523 {x_("postscript"), 1,{&simfhpsp,NOKEY,NOKEY,NOKEY,NOKEY}},
524 {x_("spice"), 1,{&simfhspicep,NOKEY,NOKEY,NOKEY,NOKEY}},
525 TERMKEY
526 };
527 COMCOMP sim_fhp = {sim_fhopt, NOTOPLIST, NONEXTLIST,
528 NOPARAMS, INPUTOPT, x_(" \t"), M_("FastHenry simulation option"), 0};
529
530 /************************** SIMULATOR COMMANDS **************************/
531
532 static KEYWORD simulatorsimulateopt[] =
533 {
534 {x_("esim"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
535 {x_("rsim"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
536 {x_("rnl"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
537 {x_("cosmos"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
538 {x_("fasthenry"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
539 {x_("spice"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
540 {x_("cspice"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
541 {x_("mossim"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
542 {x_("texsim"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
543 {x_("als"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
544 {x_("verilog"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
545 {x_("abel-pal"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
546 {x_("silos"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
547 {x_("internal"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
548 TERMKEY
549 };
550 static COMCOMP simsimulatep = {simulatorsimulateopt, NOTOPLIST, NONEXTLIST,
551 NOPARAMS, INPUTOPT, x_(" \t"), M_("Netlist format to generate"), 0};
552 static COMCOMP simulatornetp = {NOKEYWORD,NOTOPLIST,NONEXTLIST,NOPARAMS,
553 INPUTOPT, x_(" \t"), M_("net or component to point out"), 0};
554 static KEYWORD simulatoropt[] =
555 {
556 {x_("spice"), 1,{&sim_spicep,NOKEY,NOKEY,NOKEY,NOKEY}},
557 {x_("pointout"), 1,{&simulatornetp,NOKEY,NOKEY,NOKEY,NOKEY}},
558 {x_("als"), 1,{&sim_alsp,NOKEY,NOKEY,NOKEY,NOKEY}},
559 {x_("verilog"), 1,{&sim_verp,NOKEY,NOKEY,NOKEY,NOKEY}},
560 {x_("fasthenry"), 1,{&sim_fhp,NOKEY,NOKEY,NOKEY,NOKEY}},
561 {x_("no-execute"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
562 {x_("execute-only"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
563 {x_("execute-quietly"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
564 {x_("execute-and-parse"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
565 {x_("execute-quietly-and-parse"),0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
566 {x_("resume"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
567 {x_("simulate"), 1,{&simsimulatep,NOKEY,NOKEY,NOKEY,NOKEY}},
568 {x_("window"), 1,{&sim_windowp,NOKEY,NOKEY,NOKEY,NOKEY}},
569 TERMKEY
570 };
571 COMCOMP sim_simulatorp = {simulatoropt,NOTOPLIST,NONEXTLIST,NOPARAMS,
572 0, x_(" \t"), M_("Simulator action"), M_("show current simulator")};
573
574 extern COMCOMP us_colorreadp;
575
576 #ifndef ALLCPLUSPLUS
577 }
578 #endif
579
580 static struct
581 {
582 CHAR *simname;
583 INTBIG min;
584 INTBIG format;
585 } sim_simtable[] =
586 {
587 {x_("abel-pal"), 1, ABEL},
588 {x_("cosmos"), 1, COSMOS},
589 {x_("esim"), 1, ESIM},
590 {x_("fasthenry"), 1, FASTHENRY},
591 {x_("rnl"), 2, RNL},
592 {x_("rsim"), 2, RSIM},
593 {x_("irsim"), 1, IRSIM},
594 {x_("maxwell"), 2, MAXWELL},
595 {x_("mossim"), 2, MOSSIM},
596 {x_("als"), 1, ALS},
597 {x_("texsim"), 1, TEXSIM},
598 {x_("silos"), 2, SILOS},
599 {x_("spice"), 2, SPICE},
600 {x_("cdl"), 2, CDL},
601 {x_("verilog"), 2, VERILOG},
602 {NULL, 0, 0} /* 0 */
603 };
604
605 TOOL *sim_tool; /* the Simulator tool object */
606 INTBIG sim_formatkey; /* key for "SIM_format" (ESIM, etc) */
607 INTBIG sim_netfilekey; /* key for "SIM_netfile" */
608 INTBIG sim_dontrunkey; /* key for "SIM_dontrun" */
609 INTBIG sim_weaknodekey; /* key for "SIM_weak_node" */
610 INTBIG sim_spice_partskey; /* key for "SIM_spice_parts" */
611 CHAR *sim_spice_parts = 0; /* cached value for "SIM_spice_parts" */
612 NODEPROTO *sim_simnt; /* cell being simulated */
613 EProcess *sim_process = 0; /* process of simulator */
614 static BOOLEAN sim_circuitchanged; /* true if circuit being simulated was changed */
615 static BOOLEAN sim_undoredochange; /* true if change comes from undo/redo */
616 static ARCINST *sim_modifyarc; /* arc whose userbits are being changed */
617 static INTBIG sim_modifyarcbits; /* former value of userbits on changed arc */
618 static LIBRARY *sim_curlib; /* for listing cells alphabetically in dialogs */
619 static NODEPROTO *sim_oldcellprotos; /* for listing cells alphabetically in dialogs */
620 static INTBIG sim_bussignalcount; /* count of signals in a bus */
621 static INTBIG sim_bussignaltotal = 0; /* total size of bus signal array */
622 static INTBIG *sim_bussignals; /* bus signal array */
623 INTBIG sim_filetypeesim; /* ESIM netlist file descriptor */
624 INTBIG sim_filetypefasthenry; /* FastHenry netlist file descriptor */
625 INTBIG sim_filetypemossim; /* MOSSIM netlist file descriptor */
626 INTBIG sim_filetypepal; /* PAL netlist file descriptor */
627 INTBIG sim_filetypeals; /* ALS netlist file descriptor */
628 INTBIG sim_filetypealsvec; /* ALS vectors file descriptor */
629 INTBIG sim_filetypeirsimcmd; /* IRSIM command (vectors) file descriptor */
630 INTBIG sim_filetypenetlisp; /* Netlisp netlist file descriptor */
631 INTBIG sim_filetypequisc; /* QUISC netlist file descriptor */
632 INTBIG sim_filetypersim; /* RSIM netlist file descriptor */
633 INTBIG sim_filetypeirsim; /* IRSIM netlist file descriptor */
634 INTBIG sim_filetypeirsimparam; /* IRSIM parameter file descriptor */
635 INTBIG sim_filetypesilos; /* Silos netlist file descriptor */
636 INTBIG sim_filetypespice; /* SPICE input file descriptor */
637 INTBIG sim_filetypespicecmd; /* SPICE command file descriptor */
638 INTBIG sim_filetypespiceout; /* SPICE output file descriptor */
639 INTBIG sim_filetypehspiceout; /* HSPICE output file descriptor */
640 INTBIG sim_filetyperawspiceout; /* SPICE raw output disk file descriptor */
641 INTBIG sim_filetypesrawspiceout; /* SmartSPICE raw output disk file descriptor */
642 INTBIG sim_filetypecdl; /* CDL output file descriptor */
643 INTBIG sim_filetypectemp; /* CDL template disk file descriptor */
644 INTBIG sim_filetypemaxwell; /* MAXWELL output file descriptor */
645 INTBIG sim_filetypetegas; /* Tegas netlist file descriptor */
646 INTBIG sim_filetypetegastab; /* Tegas table file descriptor */
647 INTBIG sim_filetypeverilog; /* Verilog file descriptor */
648 INTBIG sim_filetypeverilogvcd; /* Verilog VCD dump file descriptor */
649 static INTBIG sim_window_curactive; /* state of simulation during broadcast */
650
651 static VARMIRROR sim_variablemirror[] =
652 {
653 {&sim_window_statekey, &sim_window_state},
654 {&sim_colorstrengthoff_key, &sim_colorstrengthoff},
655 {&sim_colorstrengthnode_key, &sim_colorstrengthnode},
656 {&sim_colorstrengthgate_key, &sim_colorstrengthgate},
657 {&sim_colorstrengthpower_key, &sim_colorstrengthpower},
658 {&sim_colorlevellow_key, &sim_colorlevellow},
659 {&sim_colorlevelhigh_key, &sim_colorlevelhigh},
660 {&sim_colorlevelundef_key, &sim_colorlevelundef},
661 {&sim_colorlevelzdef_key, &sim_colorlevelzdef},
662 {0, 0}
663 };
664
sim_init(INTBIG * argc,CHAR1 * argv[],TOOL * thistool)665 void sim_init(INTBIG *argc, CHAR1 *argv[], TOOL *thistool)
666 {
667 Q_UNUSED( argc );
668 Q_UNUSED( argv );
669
670 /* nothing on pass 2 or 3 of initialization */
671 if (thistool == NOTOOL || thistool == 0) return;
672
673 /* pass 1 initialization */
674 sim_tool = thistool;
675 sim_dontrunkey = makekey(x_("SIM_dontrun"));
676 sim_weaknodekey = makekey(x_("SIM_weak_node"));
677 sim_netfilekey = makekey(x_("SIM_netfile"));
678
679 /* create disk file descriptors */
680 sim_filetypeesim = setupfiletype(x_("sim"), x_("*.sim"), MACFSTAG('TEXT'), FALSE, x_("esim"), _("ESIM netlist"));
681 sim_filetypefasthenry = setupfiletype(x_("inp"), x_("*.inp"), MACFSTAG('TEXT'), FALSE, x_("fasthenry"), _("FastHenry netlist"));
682 sim_filetypehspiceout = setupfiletype(x_("tr0"), x_("*.tr0"), MACFSTAG('TEXT'), TRUE, x_("hspiceout"), _("HSPICE output"));
683 sim_filetypemossim = setupfiletype(x_("ntk"), x_("*.ntk"), MACFSTAG('TEXT'), FALSE, x_("mossim"), _("MOSSIM netlist"));
684 sim_filetypepal = setupfiletype(x_("pal"), x_("*.pal"), MACFSTAG('TEXT'), FALSE, x_("pal"), _("Abel PAL"));
685 sim_filetypeals = setupfiletype(x_("net"), x_("*.net"), MACFSTAG('TEXT'), FALSE, x_("als"), _("ALS netlist"));
686 sim_filetypealsvec = setupfiletype(x_("vec"), x_("*.vec"), MACFSTAG('TEXT'), FALSE, x_("alsvec"), _("ALS vector"));
687 sim_filetypeirsimcmd = setupfiletype(x_("cmd"), x_("*.cmd"), MACFSTAG('TEXT'), FALSE, x_("irsimcmd"), _("IRSIM vector"));
688 sim_filetypenetlisp = setupfiletype(x_("net"), x_("*.net"), MACFSTAG('TEXT'), FALSE, x_("netlisp"), _("NetLisp netlist"));
689 sim_filetypequisc = setupfiletype(x_("sci"), x_("*.sci"), MACFSTAG('TEXT'), FALSE, x_("quisc"), _("QUISC netlist"));
690 sim_filetypersim = setupfiletype(x_("sim"), x_("*.sim"), MACFSTAG('TEXT'), FALSE, x_("rsim"), _("RSIM netlist"));
691 sim_filetypeirsim = setupfiletype(x_("sim"), x_("*.sim"), MACFSTAG('TEXT'), FALSE, x_("irsim"), _("IRSIM netlist"));
692 sim_filetypeirsimparam = setupfiletype(x_("prm"), x_("*.prm"), MACFSTAG('TEXT'), FALSE, x_("irsimparam"), _("IRSIM parameters"));
693 sim_filetypesilos = setupfiletype(x_("sil"), x_("*.sil"), MACFSTAG('TEXT'), FALSE, x_("silos"), _("SILOS netlist"));
694 sim_filetypespice = setupfiletype(x_("spi"), x_("*.spi;*.spo"), MACFSTAG('TEXT'), FALSE, x_("spice"), _("SPICE netlist"));
695 sim_filetypespicecmd = setupfiletype(x_("cmd.sp"),x_("*.cmd.sp"), MACFSTAG('TEXT'), FALSE, x_("spicecmd"), _("SPICE command"));
696 sim_filetypespiceout = setupfiletype(x_("spo"), x_("*.spo"), MACFSTAG('TEXT'), FALSE, x_("spiceout"), _("SPICE output"));
697 sim_filetyperawspiceout = setupfiletype(x_("raw"), x_("*.raw"), MACFSTAG('TEXT'), FALSE, x_("spicerawout"), _("SPICE raw output"));
698 sim_filetypesrawspiceout = setupfiletype(x_("raw"), x_("*.raw"), MACFSTAG('TEXT'), TRUE, x_("smartspicerawout"), _("SmartSPICE raw output"));
699 sim_filetypecdl = setupfiletype(x_("cdl"), x_("*.cdl"), MACFSTAG('TEXT'), FALSE, x_("cspice"), _("CDL netlist"));
700 sim_filetypectemp = setupfiletype(x_("cdltemplate"), x_("*.cdltemplate"), MACFSTAG('TEXT'), FALSE, x_("cdltemplate"), _("CDL template"));
701 sim_filetypemaxwell = setupfiletype(x_("mac"), x_("*.mac"), MACFSTAG('TEXT'), FALSE, x_("maxwell"), _("Maxwell netlist"));
702 sim_filetypetegas = setupfiletype(x_("tdl"), x_("*.tdl"), MACFSTAG('TEXT'), FALSE, x_("tegas"), _("TEGAS netlist"));
703 sim_filetypetegastab = setupfiletype(x_(""), x_("*.*"), MACFSTAG('TEXT'), FALSE, x_("tegastab"), _("TEGAS table"));
704 sim_filetypeverilog = setupfiletype(x_("v"), x_("*.v;*.ver"), MACFSTAG('TEXT'), FALSE, x_("verilog"), _("Verilog"));
705 sim_filetypeverilogvcd = setupfiletype(x_("vcd"), x_("*.dump"), MACFSTAG('TEXT'), FALSE, x_("verilogout"), _("Verilog VCD dump"));
706
707 /* initialize default simulator format */
708 changesquiet(TRUE);
709 sim_formatkey = makekey(x_("SIM_format"));
710 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_formatkey, ALS, VINTEGER|VDONTSAVE);
711
712 /* do not have the simulator automatically run */
713 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_dontrunkey, SIMRUNNO, VINTEGER|VDONTSAVE);
714
715 /* ESIM/RSIM/RNL initialization */
716 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_netfilekey, (INTBIG)x_(""), VSTRING|VDONTSAVE);
717
718 /* IRSIM initializatio */
719 sim_irsim_statekey = makekey(x_("SIM_irsim_state"));
720 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_irsim_statekey, DEFIRSIMSTATE,
721 VINTEGER|VDONTSAVE);
722
723 /* SPICE initialization */
724 sim_spice_partskey = makekey(x_("SIM_spice_parts"));
725 sim_spice_listingfilekey = makekey(x_("SIM_listingfile"));
726 sim_spice_runargskey = makekey(x_("SIM_spice_runarguments"));
727 sim_spice_levelkey = makekey(x_("SIM_spice_level"));
728 sim_spice_statekey = makekey(x_("SIM_spice_state"));
729 sim_spice_nameuniqueid = makekey(x_("SIM_spice_nameuniqueid"));
730 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_listingfilekey, (INTBIG)x_(""), VSTRING|VDONTSAVE);
731 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey, SPICERESISTANCE|SPICENODENAMES|SPICE3,
732 VINTEGER|VDONTSAVE);
733 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_levelkey, 1, VINTEGER|VDONTSAVE);
734 (void)allocstring(&sim_spice_parts, x_("spiceparts"), sim_tool->cluster);
735 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_partskey, (INTBIG)sim_spice_parts,
736 VSTRING|VDONTSAVE);
737 DiaDeclareHook(x_("spice"), &sim_spicep, sim_spicedlog);
738 changesquiet(FALSE);
739
740 /* VERILOG initialization */
741 sim_verilog_statekey = makekey(x_("SIM_verilog_state"));
742 DiaDeclareHook(x_("verilog"), &sim_verp, sim_verilogdlog);
743
744 /* FastHenry initialization */
745 sim_fasthenrystatekey = makekey(x_("SIM_fasthenry_state"));
746 sim_fasthenryfreqstartkey = makekey(x_("SIM_fasthenry_freqstart"));
747 sim_fasthenryfreqendkey = makekey(x_("SIM_fasthenry_freqend"));
748 sim_fasthenryrunsperdecadekey = makekey(x_("SIM_fasthenry_runsperdecade"));
749 sim_fasthenrynumpoleskey = makekey(x_("SIM_fasthenry_numpoles"));
750 sim_fasthenryseglimitkey = makekey(x_("SIM_fasthenry_seglimit"));
751 sim_fasthenrythicknesskey = makekey(x_("SIM_fasthenry_thickness"));
752 sim_fasthenrywidthsubdivkey = makekey(x_("SIM_fasthenry_width_subdivs"));
753 sim_fasthenryheightsubdivkey = makekey(x_("SIM_fasthenry_height_subdivs"));
754 sim_fasthenryzheadkey = makekey(x_("SIM_fasthenry_z_head"));
755 sim_fasthenryztailkey = makekey(x_("SIM_fasthenry_z_tail"));
756 sim_fasthenrygroupnamekey = makekey(x_("SIM_fasthenry_group_name"));
757 sim_fasthenryinit();
758
759 /* initialize the simulation window system */
760 sim_window_init();
761
762 /* miscellaneous initialization */
763 sim_process = 0;
764 sim_simnt = NONODEPROTO;
765 sim_circuitchanged = FALSE;
766 sim_undoredochange = FALSE;
767 DiaDeclareHook(x_("simopt"), &sim_simulatorp, sim_optionsdlog);
768 }
769
sim_done(void)770 void sim_done(void)
771 {
772 REGISTER VARIABLE *var;
773
774 if (sim_process != 0)
775 {
776 sim_process->kill();
777 delete sim_process;
778 sim_process = 0;
779
780 var = getvalkey((INTBIG)sim_tool, VTOOL, VSTRING, sim_netfilekey);
781 if (var != NOVARIABLE)
782 ttyputmsg(_("Simulation net list saved in '%s'"), (CHAR *)var->addr);
783 }
784
785 #ifdef DEBUGMEMORY
786 /* free all memory */
787 if (sim_spice_parts != 0) efree((CHAR *)sim_spice_parts);
788 if (sim_bussignaltotal > 0) efree((CHAR *)sim_bussignals);
789 simals_term();
790 sim_freewindowmemory();
791 sim_freespicememory();
792 sim_freespicerun_memory();
793 sim_freeirsimmemory();
794 sim_freemaxwellmemory();
795 sim_freeverilogmemory();
796 # if SIMTOOLIRSIM != 0
797 irsim_freememory();
798 # endif
799 #endif
800 }
801
sim_set(INTBIG count,CHAR * par[])802 void sim_set(INTBIG count, CHAR *par[])
803 {
804 REGISTER INTBIG i, j, l, newformat, amount, curtop, internal, tr, type;
805 REGISTER BOOLEAN (*charhandlerschem)(WINDOWPART*, INTSML, INTBIG) = 0,
806 (*charhandlerwave)(WINDOWPART*, INTSML, INTBIG) = 0;
807 REGISTER BOOLEAN (*startsimulation)(NODEPROTO*) = 0;
808 REGISTER INTBIG spicestate, verilogstate, signals, options, value,
809 active, vis;
810 float fvalue;
811 REGISTER void *infstr;
812 REGISTER CHAR *pp, *deflib;
813 CHAR *truename, *spiceoutfile;
814 FILE *io;
815 REGISTER VARIABLE *var;
816 REGISTER LIBRARY *lib;
817 REGISTER ARCINST *ai;
818 NODEPROTO *np, *simnp;
819 float factor;
820 double time, size, maintime, extensiontime, maxtime, mintime;
821
822 if (count == 0)
823 {
824 ttyputusage(x_("telltool simulation OPTIONS"));
825 return;
826 }
827 l = estrlen(pp = par[0]);
828
829 if (namesamen(pp, x_("simulate"), l) == 0 && l >= 2)
830 {
831 if (count < 2)
832 {
833 ttyputusage(x_("telltool simulation simulate FORMAT"));
834 return;
835 }
836
837 /* get the simulator name */
838 internal = 0;
839 l = estrlen(pp = par[1]);
840 if (namesame(pp, x_("internal")) == 0)
841 {
842 internal = 1;
843 switch (sim_window_state&SIMENGINE)
844 {
845 case SIMENGINEALS:
846 l = estrlen(pp = x_("als"));
847 break;
848 case SIMENGINEIRSIM:
849 l = estrlen(pp = x_("irsim"));
850 #if SIMTOOLIRSIM == 0
851 ttyputmsg(_("IRSIM is not built-in: just writing the deck"));
852 internal = 0;
853 #endif
854 break;
855 }
856 }
857 for(i=0; sim_simtable[i].simname != 0; i++)
858 if (namesamen(pp, sim_simtable[i].simname, l) == 0 && l >= sim_simtable[i].min) break;
859 if (sim_simtable[i].simname == 0)
860 {
861 ttyputbadusage(x_("telltool simulation simulate"));
862 return;
863 }
864 newformat = sim_simtable[i].format;
865
866 /* see if there is already a simulation running */
867 if (sim_process != 0)
868 {
869 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_formatkey);
870 if (var != NOVARIABLE && newformat == var->addr)
871 {
872 ttyputmsg(_("This simulator is already running"));
873 return;
874 }
875 ttyputerr(_("Cannot switch simulators while one is running"));
876 return;
877 }
878
879 /* make sure there is a cell to simulate */
880 np = getcurcell();
881 if (np == NONODEPROTO)
882 {
883 ttyputerr(_("No current cell to simulate"));
884 return;
885 }
886
887 /* remember the currently running format */
888 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_formatkey, newformat, VINTEGER|VDONTSAVE);
889
890 /* write the appropriate simulation file */
891 switch (newformat)
892 {
893 case ABEL:
894 sim_writepalnetlist(np);
895 break;
896 case FASTHENRY:
897 sim_writefasthenrynetlist(np);
898 break;
899 case COSMOS:
900 case ESIM:
901 case RNL:
902 case RSIM:
903 sim_writesim(np, newformat);
904 break;
905 case MOSSIM:
906 sim_writemossim(np);
907 break;
908 case MAXWELL:
909 sim_writemaxwell(np);
910 break;
911 case SILOS:
912 sim_writesilnetlist(np);
913 break;
914 case SPICE:
915 sim_writespice(np, FALSE);
916 break;
917 case CDL:
918 sim_writespice(np, TRUE);
919 break;
920 case TEXSIM:
921 sim_writetexnetlist(np);
922 break;
923 case VERILOG:
924 sim_writevernetlist(np);
925 break;
926 case IRSIM:
927 #if SIMTOOLIRSIM != 0
928 if (internal != 0)
929 {
930 charhandlerschem = irsim_charhandlerschem;
931 charhandlerwave = irsim_charhandlerwave;
932 startsimulation = irsim_startsimulation;
933 } else
934 #endif
935 {
936 sim_writeirsim(np);
937 }
938 break;
939 case ALS:
940 charhandlerschem = simals_charhandlerschem;
941 charhandlerwave = simals_charhandlerwave;
942 startsimulation = simals_startsimulation;
943 internal = 1;
944 break;
945 }
946
947 if (internal != 0)
948 {
949 active = sim_window_isactive(&simnp);
950 if (active != 0 && simnp != np)
951 {
952 if ((active&SIMWINDOWWAVEFORM) != 0)
953 {
954 ttyputerr(_("Close all simulation windows before simulating another cell"));
955 return;
956 }
957 sim_window_stopsimulation();
958 active = 0;
959 }
960
961 if (active != 0)
962 {
963 /* display schematic window if it is not up */
964 if ((active&SIMWINDOWSCHEMATIC) == 0)
965 {
966 (void)sim_window_create(0, simnp, 0, charhandlerschem, newformat);
967 return;
968 }
969
970 /* display waveform window if it is not up */
971 if ((active&SIMWINDOWWAVEFORM) == 0 && (sim_window_state&SHOWWAVEFORM) != 0)
972 {
973 (void)sim_window_create(0, simnp, charhandlerwave, 0, newformat);
974 return;
975 }
976 ttyputmsg(_("Simulation is already running"));
977 return;
978 }
979
980 /* do not simulate icons */
981 if (np->cellview == el_iconview)
982 {
983 ttyputerr(_("Cannot simulate an icon"));
984 return;
985 }
986
987 /* start simulation of the cell */
988 if ((*startsimulation)(np)) return;
989 }
990 return;
991 }
992
993 if (namesamen(pp, x_("resume"), l) == 0 && l >= 1)
994 {
995 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_formatkey);
996 if (var == NOVARIABLE)
997 {
998 ttyputerr(_("No simulation is running"));
999 return;
1000 }
1001 switch (var->addr)
1002 {
1003 case RNL:
1004 case RSIM:
1005 case ESIM:
1006 sim_resumesim(FALSE);
1007 break;
1008 default:
1009 ttyputerr(_("Cannot resume this simulator"));
1010 break;
1011 }
1012 return;
1013 }
1014
1015 if (namesamen(pp, x_("no-execute"), l) == 0 && l >= 1)
1016 {
1017 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_dontrunkey, SIMRUNNO, VINTEGER);
1018 ttyputmsg(M_("Simulator will not be invoked (deck generation only)"));
1019 return;
1020 }
1021 if (namesamen(pp, x_("execute-only"), l) == 0 && l >= 9)
1022 {
1023 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_dontrunkey, SIMRUNYES, VINTEGER);
1024 ttyputmsg(M_("Simulator will be invoked"));
1025 return;
1026 }
1027 if (namesamen(pp, x_("execute-and-parse"), l) == 0 && l >= 9)
1028 {
1029 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_dontrunkey, SIMRUNYESPARSE, VINTEGER);
1030 ttyputmsg(M_("Simulator will be invoked, output parsed"));
1031 return;
1032 }
1033 if (namesamen(pp, x_("execute-quietly-and-parse"), l) == 0 && l >= 16)
1034 {
1035 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_dontrunkey, SIMRUNYESQPARSE, VINTEGER);
1036 ttyputmsg(M_("Simulator will be invoked quietly, output parsed"));
1037 return;
1038 }
1039 if (namesamen(pp, x_("execute-quietly"), l) == 0 && l >= 9)
1040 {
1041 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_dontrunkey, SIMRUNYESQ, VINTEGER);
1042 ttyputmsg(M_("Simulator will be invoked quietly, output parsed"));
1043 return;
1044 }
1045
1046 if (namesamen(pp, x_("pointout"), l) == 0 && l >= 1)
1047 {
1048 if (count <= 1)
1049 {
1050 ttyputusage(x_("telltool simulation pointout ELEMENT"));
1051 return;
1052 }
1053 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_formatkey);
1054 if (var != NOVARIABLE) switch (var->addr)
1055 {
1056 case RNL:
1057 case RSIM:
1058 case ESIM:
1059 case COSMOS:
1060 sim_simpointout(par[1], var->addr);
1061 return;
1062 }
1063 ttyputerr(M_("Current simulator cannot pointout netlist objects"));
1064 return;
1065 }
1066
1067 if (namesamen(pp, x_("window"), l) == 0 && l >= 1)
1068 {
1069 if (count <= 1)
1070 {
1071 ttyputusage(x_("telltool simulation window COMMAND"));
1072 return;
1073 }
1074 l = estrlen(pp = par[1]);
1075
1076 if (namesamen(pp, x_("vector-clear"), l) == 0)
1077 {
1078 switch (sim_window_state&SIMENGINECUR)
1079 {
1080 case SIMENGINECURALS:
1081 par[0] = x_("vector");
1082 par[1] = x_("new");
1083 simals_com_comp(2, par);
1084 break;
1085 #if SIMTOOLIRSIM != 0
1086 case SIMENGINECURIRSIM:
1087 irsim_clearallvectors();
1088 break;
1089 #endif
1090 }
1091 return;
1092 }
1093 if (namesamen(pp, x_("vector-load"), l) == 0)
1094 {
1095 switch (sim_window_state&SIMENGINECUR)
1096 {
1097 case SIMENGINECURALS:
1098 par[0] = x_("vector");
1099 par[1] = x_("load");
1100 simals_com_comp(count, par);
1101 break;
1102 #if SIMTOOLIRSIM != 0
1103 case SIMENGINECURIRSIM:
1104 irsim_loadvectorfile((count>2) ? par[2] : 0);
1105 break;
1106 #endif
1107 }
1108 return;
1109 }
1110 if (namesamen(pp, x_("vector-save"), l) == 0)
1111 {
1112 switch (sim_window_state&SIMENGINECUR)
1113 {
1114 case SIMENGINECURALS:
1115 par[0] = x_("vector");
1116 par[1] = x_("save");
1117 simals_com_comp(count, par);
1118 break;
1119 #if SIMTOOLIRSIM != 0
1120 case SIMENGINECURIRSIM:
1121 irsim_savevectorfile((count>2) ? par[2] : 0);
1122 break;
1123 #endif
1124 }
1125 return;
1126 }
1127 if (namesamen(pp, x_("vector-writespice"), l) == 0)
1128 {
1129 sim_window_writespicecmd();
1130 return;
1131 }
1132 if (namesamen(pp, x_("clear-saved-signals"), l) == 0 && l >= 2)
1133 {
1134 for(lib = el_curlib; lib != NOLIBRARY; lib = lib->nextlibrary)
1135 {
1136 for(np = lib->firstnodeproto; np != NONODEPROTO; np = np->nextnodeproto)
1137 {
1138 if (getvalkey((INTBIG)np, VNODEPROTO, VSTRING|VISARRAY, sim_window_signalorder_key) != NOVARIABLE)
1139 (void)delvalkey((INTBIG)np, VNODEPROTO, sim_window_signalorder_key);
1140 }
1141 }
1142 if (sim_window_isactive(&np) != 0)
1143 {
1144 switch (sim_window_state&SIMENGINECUR)
1145 {
1146 case SIMENGINECURALS:
1147 simals_level_set_command(0);
1148 break;
1149 case SIMENGINECURVERILOG:
1150 sim_verlevel_set(0, np);
1151 break;
1152 #if SIMTOOLIRSIM != 0
1153 case SIMENGINECURIRSIM:
1154 irsim_level_set(0, np);
1155 break;
1156 #endif
1157 }
1158 }
1159 ttyputmsg(_("Removed default waveform signals from all cells"));
1160 return;
1161 }
1162 if (namesamen(pp, x_("2-state-display"), l) == 0 && l >= 1)
1163 {
1164 sim_window_setstate(sim_window_state & ~FULLSTATE);
1165 ttyputverbose(M_("Simulation will show only 2 states in schematics window"));
1166 return;
1167 }
1168 if (namesamen(pp, x_("12-state-display"), l) == 0 && l >= 1)
1169 {
1170 sim_window_setstate(sim_window_state | FULLSTATE);
1171 ttyputverbose(M_("Simulation will show all 12 states in schematics window"));
1172 return;
1173 }
1174 if (namesamen(pp, x_("advance-time"), l) == 0 && l >= 1)
1175 {
1176 sim_window_setstate(sim_window_state | ADVANCETIME);
1177 ttyputverbose(M_("State changes will advance time to end of activity"));
1178 return;
1179 }
1180 if (namesamen(pp, x_("freeze-time"), l) == 0 && l >= 1)
1181 {
1182 sim_window_setstate(sim_window_state & ~ADVANCETIME);
1183 ttyputverbose(M_("State changes will not advance time"));
1184 return;
1185 }
1186 if (namesamen(pp, x_("display-waveform"), l) == 0 && l >= 1)
1187 {
1188 sim_window_setstate(sim_window_state | SHOWWAVEFORM);
1189 ttyputverbose(M_("Simulation will show waveform window"));
1190 return;
1191 }
1192 if (namesamen(pp, x_("ignore-waveform"), l) == 0 && l >= 1)
1193 {
1194 sim_window_setstate(sim_window_state & ~SHOWWAVEFORM);
1195 ttyputverbose(M_("Simulation will not show waveform window"));
1196 return;
1197 }
1198 if (namesamen(pp, x_("color"), l) == 0 && l >= 2)
1199 {
1200 if (count <= 2)
1201 {
1202 sim_window_setdisplaycolor(99, 0);
1203 return;
1204 }
1205 l = estrlen(pp = par[2]);
1206 if (count < 4)
1207 {
1208 ttyputusage(x_("telltool simulation window color SIGNAL COLORNAME"));
1209 return;
1210 }
1211 i = getecolor(par[3]);
1212 if (i < 0)
1213 {
1214 ttyputbadusage(x_("telltool simulation window color"));
1215 return;
1216 }
1217 if (namesamen(pp, x_("off"), l) == 0)
1218 {
1219 sim_window_setdisplaycolor(OFF_STRENGTH, i);
1220 return;
1221 }
1222 if (namesamen(pp, x_("node"), l) == 0)
1223 {
1224 sim_window_setdisplaycolor(NODE_STRENGTH, i);
1225 return;
1226 }
1227 if (namesamen(pp, x_("gate"), l) == 0)
1228 {
1229 sim_window_setdisplaycolor(GATE_STRENGTH, i);
1230 return;
1231 }
1232 if (namesamen(pp, x_("power"), l) == 0)
1233 {
1234 sim_window_setdisplaycolor(VDD_STRENGTH, i);
1235 return;
1236 }
1237 if (namesamen(pp, x_("low"), l) == 0)
1238 {
1239 sim_window_setdisplaycolor(LOGIC_LOW, i);
1240 return;
1241 }
1242 if (namesamen(pp, x_("high"), l) == 0)
1243 {
1244 sim_window_setdisplaycolor(LOGIC_HIGH, i);
1245 return;
1246 }
1247 if (namesamen(pp, x_("undefined"), l) == 0)
1248 {
1249 sim_window_setdisplaycolor(LOGIC_X, i);
1250 return;
1251 }
1252 ttyputbadusage(x_("telltool simulation window color"));
1253 return;
1254 }
1255 if (namesamen(pp, x_("cursor"), l) == 0 && l >= 2)
1256 {
1257 if (sim_window_isactive(&np) == 0)
1258 {
1259 ttyputerr(M_("No simulator active"));
1260 return;
1261 }
1262 if (count < 3)
1263 {
1264 ttyputusage(x_("telltool simulation window cursor COMMAND"));
1265 return;
1266 }
1267 if (namesamen(par[2], x_("center"), estrlen(par[2])) == 0)
1268 {
1269 /* center the cursors visibly */
1270 sim_window_getaveragetimerange(&mintime, &maxtime);
1271 size = maxtime - mintime;
1272 time = (mintime + maxtime) / 2.0;
1273 sim_window_setmaincursor(time - size/4.0);
1274 sim_window_setextensioncursor(time + size/4.0);
1275 return;
1276 }
1277 if (count < 4)
1278 {
1279 ttyputusage(x_("telltool simulation window cursor WHICH TIME"));
1280 return;
1281 }
1282 time = eatof(par[3]);
1283 if (time < 0.0)
1284 {
1285 ttyputerr(M_("Warning: time cannot be negative, set to 0 sec."));
1286 time = 0.0;
1287 }
1288 if (namesamen(par[2], x_("main"), estrlen(par[2])) == 0)
1289 {
1290 sim_window_setmaincursor(time);
1291 return;
1292 }
1293 if (namesamen(par[2], x_("extension"), estrlen(par[2])) == 0)
1294 {
1295 sim_window_setextensioncursor(time);
1296 return;
1297 }
1298 ttyputbadusage(x_("telltool simulation window cursor"));
1299 return;
1300 }
1301 if (namesamen(pp, x_("move"), l) == 0 && l >= 1)
1302 {
1303 if ((sim_window_isactive(&np)&SIMWINDOWWAVEFORM) == 0)
1304 {
1305 ttyputerr(M_("No simulator waveform window is active"));
1306 return;
1307 }
1308 if (count < 3)
1309 {
1310 ttyputusage(x_("telltool simulation window move (left | right | up | down) [AMOUNT]"));
1311 return;
1312 }
1313
1314 l = estrlen(pp = par[2]);
1315 if (namesamen(pp, x_("left"), l) == 0 || namesamen(pp, x_("right"), l) == 0)
1316 {
1317 /* determine amount to move time */
1318 sim_window_getaveragetimerange(&mintime, &maxtime);
1319 size = maxtime - mintime;
1320 if (count < 4) time = size / 2.0f; else
1321 {
1322 time = eatof(par[3]);
1323 }
1324 if (time <= 0.0)
1325 {
1326 ttyputerr(M_("Window movement time must be greater than 0 seconds"));
1327 return;
1328 }
1329
1330 sim_window_inittraceloop();
1331 for(j=0; ; j++)
1332 {
1333 tr = sim_window_nexttraceloop();
1334 if (tr == 0) break;
1335 sim_window_gettimerange(tr, &mintime, &maxtime);
1336 if (namesamen(pp, x_("left"), l) == 0)
1337 {
1338 mintime += time;
1339 } else
1340 {
1341 mintime -= time;
1342 if (mintime < 0.0) mintime = 0.0;
1343 }
1344 maxtime = mintime + size;
1345 sim_window_settimerange(tr, mintime, maxtime);
1346 }
1347 if (sim_window_format == ALS) (void)simals_initialize_simulator(TRUE); else
1348 sim_window_redraw();
1349 return;
1350 }
1351 if (namesamen(pp, x_("up"), l) == 0 || namesamen(pp, x_("down"), l) == 0)
1352 {
1353 curtop = sim_window_gettopvisframe();
1354 vis = sim_window_getnumvisframes();
1355 signals = sim_window_getnumframes();
1356 if (count < 4) amount = vis-1; else
1357 {
1358 amount = myatoi(par[3]);
1359 if (amount <= 0)
1360 {
1361 ttyputerr(M_("Window movement time must be greater than 0 signals"));
1362 return;
1363 }
1364 }
1365 if (namesamen(pp, x_("up"), l) == 0)
1366 {
1367 curtop += amount;
1368 if (curtop + vis > signals) curtop = signals - vis;
1369 } else
1370 {
1371 curtop -= amount;
1372 if (curtop < 0) curtop = 0;
1373 }
1374 sim_window_settopvisframe(curtop);
1375 sim_window_redraw();
1376 return;
1377 }
1378
1379 ttyputbadusage(x_("telltool simulation window move"));
1380 return;
1381 }
1382 if (namesamen(pp, x_("traces"), l) == 0 && l >= 1)
1383 {
1384 if ((sim_window_isactive(&np)&SIMWINDOWWAVEFORM) == 0)
1385 {
1386 ttyputerr(M_("No simulator waveform window is active"));
1387 return;
1388 }
1389 if (count < 3)
1390 {
1391 ttyputusage(x_("telltool simulation window traces (more | less | set A)"));
1392 return;
1393 }
1394 l = estrlen(pp = par[2]);
1395
1396 if (namesamen(pp, x_("more"), l) == 0)
1397 {
1398 sim_window_setnumframes(sim_window_getnumframes()+1);
1399 sim_window_redraw();
1400 return;
1401 }
1402 if (namesamen(pp, x_("less"), l) == 0)
1403 {
1404 i = sim_window_getnumframes();
1405 if (i <= 1)
1406 {
1407 ttyputerr(M_("Must be at least 1 signal on the display"));
1408 return;
1409 }
1410 sim_window_setnumframes(i+1);
1411 sim_window_redraw();
1412 return;
1413 }
1414 if (namesamen(pp, x_("set"), l) == 0)
1415 {
1416 if (count < 4)
1417 {
1418 ttyputusage(x_("telltool simulation window traces set AMOUNT"));
1419 return;
1420 }
1421 i = myatoi(par[3]);
1422 if (i < 1)
1423 {
1424 ttyputerr(M_("Must be at least 1 signal on the display"));
1425 return;
1426 }
1427 sim_window_setnumframes(i);
1428 sim_window_redraw();
1429 return;
1430 }
1431 ttyputbadusage(x_("telltool simulation window traces"));
1432 return;
1433 }
1434 if (namesamen(pp, x_("zoom"), l) == 0 && l >= 1)
1435 {
1436 if ((sim_window_isactive(&np)&SIMWINDOWWAVEFORM) == 0)
1437 {
1438 ttyputerr(M_("No simulator waveform window is active"));
1439 return;
1440 }
1441 if (count < 3)
1442 {
1443 ttyputusage(x_("telltool simulation window zoom (in | out | window | cursor)"));
1444 return;
1445 }
1446 l = estrlen(pp = par[2]);
1447
1448 if (namesamen(pp, x_("cursor"), l) == 0)
1449 {
1450 maintime = sim_window_getmaincursor();
1451 extensiontime = sim_window_getextensioncursor();
1452 if (maintime == extensiontime) return;
1453 if (maintime > extensiontime)
1454 {
1455 size = (maintime-extensiontime) / 20.0;
1456 maxtime = maintime + size;
1457 mintime = extensiontime - size;
1458 } else
1459 {
1460 size = (extensiontime-maintime) / 20.0;
1461 maxtime = extensiontime + size;
1462 mintime = maintime - size;
1463 }
1464 sim_window_settimerange(0, mintime, maxtime);
1465 if (sim_window_format == ALS) (void)simals_initialize_simulator(TRUE); else
1466 sim_window_redraw();
1467 return;
1468 }
1469
1470 if (namesamen(pp, x_("in"), l) == 0)
1471 {
1472 if (count < 4) factor = 2.0; else
1473 {
1474 factor = (float)myatoi(par[3]);
1475 if (factor <= 1)
1476 {
1477 ttyputerr(M_("Zoom factor must be integer greater than 1"));
1478 return;
1479 }
1480 }
1481
1482 sim_window_getaveragetimerange(&mintime, &maxtime);
1483 size = (maxtime - mintime) / factor;
1484 sim_window_inittraceloop();
1485 for(j=0; ; j++)
1486 {
1487 tr = sim_window_nexttraceloop();
1488 if (tr == 0) break;
1489 sim_window_gettimerange(tr, &mintime, &maxtime);
1490 mintime = sim_window_getmaincursor() - (size / 2.0);
1491 if (mintime < 0.0) mintime = 0.0;
1492 maxtime = mintime + size;
1493 sim_window_settimerange(tr, mintime, maxtime);
1494 }
1495 sim_window_redraw();
1496 return;
1497 }
1498
1499 if (namesamen(pp, x_("out"), l) == 0)
1500 {
1501 if (count < 4) factor = 2.0; else
1502 {
1503 factor = (float)myatoi(par[3]);
1504 if (factor <= 1)
1505 {
1506 ttyputerr(M_("Zoom factor must be integer greater than 1"));
1507 return;
1508 }
1509 }
1510
1511 sim_window_getaveragetimerange(&mintime, &maxtime);
1512 size = (maxtime - mintime) * factor;
1513 sim_window_inittraceloop();
1514 for(j=0; ; j++)
1515 {
1516 tr = sim_window_nexttraceloop();
1517 if (tr == 0) break;
1518 sim_window_gettimerange(tr, &mintime, &maxtime);
1519 mintime = sim_window_getmaincursor() - (size / 2.0);
1520 if (mintime < 0.0) mintime = 0.0;
1521 maxtime = mintime + size;
1522 sim_window_settimerange(tr, mintime, maxtime);
1523 }
1524 if (sim_window_format == ALS) (void)simals_initialize_simulator(TRUE); else
1525 sim_window_redraw();
1526 return;
1527 }
1528 if (namesamen(pp, x_("all-displayed"), l) == 0)
1529 {
1530 sim_window_gettimeextents(&mintime, &maxtime);
1531 sim_window_settimerange(0, mintime, maxtime);
1532 if (sim_window_format == ALS) (void)simals_initialize_simulator(TRUE); else
1533 sim_window_redraw();
1534 return;
1535 }
1536 if (namesamen(pp, x_("window"), l) == 0)
1537 {
1538 if (count < 4)
1539 {
1540 ttyputusage(x_("telltool simulation window zoom window MIN [MAX]"));
1541 return;
1542 }
1543
1544 mintime = eatof(par[3]);
1545 maxtime = 0.0;
1546 if (count > 4) maxtime = eatof(par[4]);
1547 if (mintime == maxtime)
1548 {
1549 ttyputerr(M_("ERROR: Window size must be greater than 0"));
1550 return;
1551 }
1552 if (mintime > maxtime)
1553 {
1554 time = maxtime;
1555 maxtime = mintime;
1556 mintime = time;
1557 }
1558 sim_window_settimerange(0, mintime, maxtime);
1559 if (sim_window_format == ALS) (void)simals_initialize_simulator(TRUE); else
1560 sim_window_redraw();
1561 return;
1562 }
1563
1564 ttyputbadusage(x_("telltool simulation window zoom"));
1565 return;
1566 }
1567 ttyputbadusage(x_("telltool simulation window"));
1568 return;
1569 }
1570
1571 if (namesamen(pp, x_("als"), l) == 0 && l >= 1)
1572 {
1573 simals_com_comp(count-1, &par[1]);
1574 return;
1575 }
1576
1577 if (namesamen(pp, x_("spice"), l) == 0 && l >= 2)
1578 {
1579 l = estrlen(pp = par[1]);
1580 if (namesamen(pp, x_("level"), l) == 0)
1581 {
1582 if (count >= 3)
1583 {
1584 i = eatoi(par[2]);
1585 if (i <= 0 || i > MAXSPICELEVEL) i = 1;
1586 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_levelkey, i, VINTEGER);
1587 }
1588 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_spice_levelkey);
1589 if (var == NOVARIABLE) i = 1; else i = var->addr;
1590 ttyputverbose(M_("Simulation level set to %ld"), i);
1591 return;
1592 }
1593 if (namesamen(pp, x_("save-output"), l) == 0 && l >= 2)
1594 {
1595 if (count < 3)
1596 {
1597 ttyputerr(M_("Should supply a file name to write"));
1598 par[2] = x_("electric_def.spo");
1599 }
1600 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_listingfilekey, (INTBIG)par[2], VSTRING|VDONTSAVE);
1601 ttyputverbose(M_("Simulation output will go to file %s"), par[2]);
1602 return;
1603 }
1604 if (namesamen(pp, x_("format"), l) == 0)
1605 {
1606 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_spice_statekey);
1607 if (var != NOVARIABLE) spicestate = var->addr; else spicestate = 0;
1608 if (count <= 2)
1609 {
1610 switch (spicestate&SPICETYPE)
1611 {
1612 case SPICE2: ttyputmsg(M_("SPICE decks for SPICE 2")); break;
1613 case SPICE3: ttyputmsg(M_("SPICE decks for SPICE 3")); break;
1614 case SPICEHSPICE: ttyputmsg(M_("SPICE decks for HSPICE")); break;
1615 case SPICEPSPICE: ttyputmsg(M_("SPICE decks for PSPICE")); break;
1616 case SPICEGNUCAP: ttyputmsg(M_("SPICE decks for Gnucap")); break;
1617 case SPICESMARTSPICE: ttyputmsg(M_("SPICE decks for SmartSPICE")); break;
1618
1619 }
1620 return;
1621 }
1622
1623 l = estrlen(pp = par[2]);
1624 if (namesamen(pp, x_("2"), l) == 0)
1625 {
1626 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey,
1627 (spicestate & ~SPICETYPE) | SPICE2, VINTEGER);
1628 return;
1629 }
1630 if (namesamen(pp, x_("3"), l) == 0)
1631 {
1632 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey,
1633 (spicestate & ~SPICETYPE) | SPICE3, VINTEGER);
1634 return;
1635 }
1636 if (namesamen(pp, x_("hspice"), l) == 0)
1637 {
1638 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey,
1639 (spicestate & ~SPICETYPE) | SPICEHSPICE, VINTEGER);
1640 return;
1641 }
1642 if (namesamen(pp, x_("pspice"), l) == 0)
1643 {
1644 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey,
1645 (spicestate & ~SPICETYPE) | SPICEPSPICE, VINTEGER);
1646 return;
1647 }
1648 if (namesamen(pp, x_("gnucap"), l) == 0)
1649 {
1650 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey,
1651 (spicestate & ~SPICETYPE) | SPICEGNUCAP, VINTEGER);
1652 return;
1653 }
1654 if (namesamen(pp, x_("smartspice"), l) == 0)
1655 {
1656 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey,
1657 (spicestate & ~SPICETYPE) | SPICESMARTSPICE, VINTEGER);
1658 return;
1659 }
1660
1661 }
1662 if (namesamen(pp, x_("parse-output"), l) == 0)
1663 {
1664 if (count < 3)
1665 {
1666 ttyputerr(M_("Must supply a SPICE output file to read"));
1667 return;
1668 }
1669 sim_spice_execute(x_(""), par[2], NONODEPROTO);
1670 return;
1671 }
1672 if (namesamen(pp, x_("show-spice-this-cell"), l) == 0 && l >= 2)
1673 {
1674 /* plot the spice deck for this cell */
1675 np = getcurcell();
1676 if (np == NONODEPROTO)
1677 {
1678 ttyputerr(_("No current cell to simulate"));
1679 return;
1680 }
1681 infstr = initinfstr();
1682 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_spice_statekey);
1683 if (var != NOVARIABLE) spicestate = var->addr; else spicestate = 0;
1684 switch (spicestate&SPICETYPE)
1685 {
1686 case SPICEGNUCAP: /* handle ".raw" */
1687 formatinfstr(infstr, x_("%s.raw"), np->protoname);
1688 type = sim_filetypesrawspiceout;
1689 break;
1690 case SPICEHSPICE: /* handle ".tr0" */
1691 formatinfstr(infstr, x_("%s.tr0"), np->protoname);
1692 type = sim_filetypehspiceout;
1693 break;
1694 default: /* handle ".spo" */
1695 formatinfstr(infstr, x_("%s.spo"), np->protoname);
1696 type = sim_filetypespiceout;
1697 break;
1698 }
1699 allocstring(&spiceoutfile, returninfstr(infstr), el_tempcluster);
1700
1701 /* get the default path (where the current library resides) */
1702 infstr = initinfstr();
1703 addstringtoinfstr(infstr, np->lib->libfile);
1704 deflib = returninfstr(infstr);
1705 l = strlen(deflib);
1706 for(i=l-1; i>0; i--) if (deflib[i] == DIRSEP) break;
1707 deflib[i] = 0;
1708
1709 io = xopen(spiceoutfile, type, deflib, &truename);
1710 if (io == 0)
1711 {
1712 ttyputerr(_("Could not find simulation output file: %s"), spiceoutfile);
1713 } else
1714 {
1715 xclose(io);
1716 reallocstring(&spiceoutfile, truename, el_tempcluster);
1717 sim_spice_execute(x_(""), spiceoutfile, np);
1718 }
1719 efree(spiceoutfile);
1720 return;
1721 }
1722 if (namesamen(pp, x_("not"), l) == 0)
1723 {
1724 if (count <= 2)
1725 {
1726 ttyputusage(x_("telltool simulation spice not OPTION"));
1727 return;
1728 }
1729 l = estrlen(pp = par[2]);
1730 if (namesamen(pp, x_("resistance"), l) == 0 || namesamen(pp, x_("capacitances"), l) == 0)
1731 {
1732 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_spice_statekey);
1733 if (var != NOVARIABLE)
1734 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey,
1735 var->addr & ~SPICERESISTANCE, VINTEGER);
1736 ttyputverbose(M_("SPICE decks will not print parasitics"));
1737 return;
1738 }
1739 if (namesamen(pp, x_("plot"), l) == 0)
1740 {
1741 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_spice_statekey);
1742 if (var != NOVARIABLE)
1743 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey,
1744 var->addr & ~SPICEPLOT, VINTEGER);
1745 ttyputverbose(M_("SPICE decks will not do plots"));
1746 return;
1747 }
1748 if (namesamen(pp, x_("global-pwr-gnd"), l) == 0)
1749 {
1750 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_spice_statekey);
1751 if (var != NOVARIABLE)
1752 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey,
1753 var->addr & ~SPICEGLOBALPG, VINTEGER);
1754 ttyputverbose(M_("Does not write global Power and Ground"));
1755 return;
1756 }
1757 if (namesamen(pp, x_("use-nodenames"), l) == 0)
1758 {
1759 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_spice_statekey);
1760 if (var != NOVARIABLE)
1761 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey,
1762 var->addr & ~SPICENODENAMES, VINTEGER);
1763 ttyputverbose(M_("SPICE decks will contain node numbers"));
1764 return;
1765 }
1766 ttyputbadusage(x_("telltool simulation spice not"));
1767 return;
1768 }
1769 if (namesamen(pp, x_("resistance"), l) == 0 || namesamen(pp, x_("capacitances"), l) == 0)
1770 {
1771 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_spice_statekey);
1772 if (var != NOVARIABLE)
1773 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey,
1774 var->addr | SPICERESISTANCE, VINTEGER);
1775 ttyputverbose(M_("SPICE decks will print parasitics"));
1776 return;
1777 }
1778 if (namesamen(pp, x_("plot"), l) == 0)
1779 {
1780 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_spice_statekey);
1781 if (var != NOVARIABLE)
1782 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey,
1783 var->addr | SPICEPLOT, VINTEGER);
1784 ttyputverbose(M_("SPICE decks will do plots"));
1785 return;
1786 }
1787 if (namesamen(pp, x_("output-normal"), l) == 0 && l >= 8)
1788 {
1789 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_spice_statekey);
1790 if (var != NOVARIABLE)
1791 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey,
1792 (var->addr & ~SPICEOUTPUT) | SPICEOUTPUTNORM, VINTEGER);
1793 ttyputverbose(M_("Reads normal SPICE output"));
1794 return;
1795 }
1796 if (namesamen(pp, x_("output-raw"), l) == 0 && l >= 8)
1797 {
1798 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_spice_statekey);
1799 if (var != NOVARIABLE)
1800 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey,
1801 (var->addr & ~SPICEOUTPUT) | SPICEOUTPUTRAW, VINTEGER);
1802 ttyputverbose(M_("Reads SPICE Rawfile output"));
1803 return;
1804 }
1805 if (namesamen(pp, x_("output-smartraw"), l) == 0 && l >= 8)
1806 {
1807 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_spice_statekey);
1808 if (var != NOVARIABLE)
1809 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey,
1810 (var->addr & ~SPICEOUTPUT) | SPICEOUTPUTRAWSMART, VINTEGER);
1811 ttyputverbose(M_("Reads SmartSPICE Rawfile output"));
1812 return;
1813 }
1814 if (namesamen(pp, x_("global-pwr-gnd"), l) == 0)
1815 {
1816 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_spice_statekey);
1817 if (var != NOVARIABLE)
1818 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey,
1819 var->addr | SPICEGLOBALPG, VINTEGER);
1820 ttyputverbose(M_("Writes global Power and Ground"));
1821 return;
1822 }
1823 if (namesamen(pp, x_("use-nodenames"), l) == 0)
1824 {
1825 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_spice_statekey);
1826 if (var != NOVARIABLE)
1827 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey,
1828 var->addr | SPICENODENAMES, VINTEGER);
1829 ttyputverbose(M_("SPICE decks will contain node names"));
1830 return;
1831 }
1832 ttyputbadusage(x_("telltool simulation spice"));
1833 return;
1834 }
1835
1836 if (namesamen(pp, x_("verilog"), l) == 0 && l >= 1)
1837 {
1838 l = estrlen(pp = par[1]);
1839 if (namesamen(pp, x_("use-assign"), l) == 0)
1840 {
1841 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_verilog_statekey);
1842 if (var != NOVARIABLE) verilogstate = var->addr; else
1843 verilogstate = 0;
1844 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_verilog_statekey,
1845 verilogstate | VERILOGUSEASSIGN, VINTEGER);
1846 ttyputverbose(M_("Verilog decks will use the 'assign' construct"));
1847 return;
1848 }
1849 if (namesamen(pp, x_("default-trireg"), l) == 0)
1850 {
1851 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_verilog_statekey);
1852 if (var != NOVARIABLE) verilogstate = var->addr; else
1853 verilogstate = 0;
1854 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_verilog_statekey,
1855 verilogstate | VERILOGUSETRIREG, VINTEGER);
1856 ttyputverbose(M_("Verilog wires will default to 'trireg'"));
1857 return;
1858 }
1859 if (namesamen(pp, x_("parse-output"), l) == 0)
1860 {
1861 if (count < 3)
1862 {
1863 ttyputerr(M_("Must supply a Verilog output file to read"));
1864 return;
1865 }
1866 sim_verparsefile(par[2], NONODEPROTO);
1867 return;
1868 }
1869 if (namesamen(pp, x_("show-verilog-this-cell"), l) == 0)
1870 {
1871 /* plot the spice deck for this cell */
1872 np = getcurcell();
1873 if (np == NONODEPROTO)
1874 {
1875 ttyputerr(_("No current cell to simulate"));
1876 return;
1877 }
1878 infstr = initinfstr();
1879 formatinfstr(infstr, x_("%s.dump"), np->protoname);
1880 allocstring(&spiceoutfile, returninfstr(infstr), el_tempcluster);
1881
1882 /* get the default path (where the current library resides) */
1883 infstr = initinfstr();
1884 addstringtoinfstr(infstr, np->lib->libfile);
1885 deflib = returninfstr(infstr);
1886 l = strlen(deflib);
1887 for(i=l-1; i>0; i--) if (deflib[i] == DIRSEP) break;
1888 deflib[i] = 0;
1889
1890 io = xopen(spiceoutfile, sim_filetypeverilogvcd, deflib, &truename);
1891 if (io == 0)
1892 {
1893 ttyputerr(_("Could not find simulation output file: %s"), spiceoutfile);
1894 } else
1895 {
1896 xclose(io);
1897 reallocstring(&spiceoutfile, truename, el_tempcluster);
1898 sim_verparsefile(spiceoutfile, np);
1899 }
1900 efree(spiceoutfile);
1901 return;
1902 }
1903
1904 if (namesamen(pp, x_("not"), l) == 0)
1905 {
1906 if (count <= 2)
1907 {
1908 ttyputusage(x_("telltool simulation verilog not OPTION"));
1909 return;
1910 }
1911 l = estrlen(pp = par[2]);
1912 if (namesamen(pp, x_("use-assign"), l) == 0)
1913 {
1914 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_verilog_statekey);
1915 if (var != NOVARIABLE) verilogstate = var->addr; else
1916 verilogstate = 0;
1917 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_verilog_statekey,
1918 verilogstate & ~VERILOGUSEASSIGN, VINTEGER);
1919 ttyputverbose(M_("Verilog decks will not use the 'assign' construct"));
1920 return;
1921 }
1922 if (namesamen(pp, x_("default-trireg"), l) == 0)
1923 {
1924 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_verilog_statekey);
1925 if (var != NOVARIABLE) verilogstate = var->addr; else
1926 verilogstate = 0;
1927 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_verilog_statekey,
1928 verilogstate & ~VERILOGUSETRIREG, VINTEGER);
1929 ttyputverbose(M_("Verilog wires will not default to 'trireg'"));
1930 return;
1931 }
1932 ttyputbadusage(x_("telltool simulation verilog not"));
1933 return;
1934 }
1935 ttyputbadusage(x_("telltool simulation verilog"));
1936 return;
1937 }
1938
1939 if (namesamen(pp, x_("fasthenry"), l) == 0 && l >= 1)
1940 {
1941 l = estrlen(pp = par[1]);
1942 if (namesamen(pp, x_("pole"), l) == 0 && l >= 3)
1943 {
1944 if (count <= 2)
1945 {
1946 ttyputusage(x_("telltool simulation fasthenry pole (single | multiple NUMPOLES)"));
1947 return;
1948 }
1949 l = estrlen(pp = par[2]);
1950 if (namesamen(pp, x_("single"), l) == 0)
1951 {
1952 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_fasthenrystatekey);
1953 if (var != NOVARIABLE) options = var->addr; else options = 0;
1954 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenrystatekey, options & ~FHMAKEMULTIPOLECKT, VINTEGER);
1955 return;
1956 }
1957 if (namesamen(pp, x_("multiple"), l) == 0)
1958 {
1959 if (count <= 3)
1960 {
1961 ttyputusage(x_("telltool simulation fasthenry pole multiple NUMPOLES"));
1962 return;
1963 }
1964 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_fasthenrystatekey);
1965 if (var != NOVARIABLE) options = var->addr; else options = 0;
1966 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenrystatekey, options | FHMAKEMULTIPOLECKT, VINTEGER);
1967 value = eatoi(par[3]);
1968 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenrynumpoleskey, value, VINTEGER);
1969 return;
1970 }
1971 ttyputbadusage(x_("telltool simulation fasthenry pole"));
1972 return;
1973 }
1974 if (namesamen(pp, x_("frequency"), l) == 0)
1975 {
1976 if (count <= 2)
1977 {
1978 ttyputusage(x_("telltool simulation fasthenry frequency (single | multiple START END RUNSPERDECADE)"));
1979 return;
1980 }
1981 l = estrlen(pp = par[2]);
1982 if (namesamen(pp, x_("single"), l) == 0)
1983 {
1984 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_fasthenrystatekey);
1985 if (var != NOVARIABLE) options = var->addr; else options = 0;
1986 options |= FHUSESINGLEFREQ;
1987 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenrystatekey, options, VINTEGER);
1988 return;
1989 }
1990 if (namesamen(pp, x_("multiple"), l) == 0)
1991 {
1992 if (count <= 5)
1993 {
1994 ttyputusage(x_("telltool simulation fasthenry frequency multiple START END RUNSPERDECADE"));
1995 return;
1996 }
1997 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_fasthenrystatekey);
1998 if (var != NOVARIABLE) options = var->addr; else options = 0;
1999 options &= ~FHUSESINGLEFREQ;
2000 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenrystatekey, options, VINTEGER);
2001 fvalue = (float)eatof(par[3]);
2002 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenryfreqstartkey, castint(fvalue), VFLOAT);
2003 fvalue = (float)eatof(par[4]);
2004 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenryfreqendkey, castint(fvalue), VFLOAT);
2005 value = eatoi(par[5]);
2006 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenryrunsperdecadekey, value, VINTEGER);
2007 return;
2008 }
2009 ttyputbadusage(x_("telltool simulation fasthenry frequency"));
2010 return;
2011 }
2012 if (namesamen(pp, x_("thickness"), l) == 0)
2013 {
2014 if (count <= 2)
2015 {
2016 ttyputusage(x_("telltool simulation fasthenry thickness DEFTHICKNESS"));
2017 return;
2018 }
2019 value = atola(par[2], 0);
2020 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenrythicknesskey, value, VINTEGER);
2021 return;
2022 }
2023 if (namesamen(pp, x_("width-subdivisions"), l) == 0)
2024 {
2025 if (count <= 2)
2026 {
2027 ttyputusage(x_("telltool simulation fasthenry width-subdivisions DEFWIDTHSUBS"));
2028 return;
2029 }
2030 value = eatoi(par[2]);
2031 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenrywidthsubdivkey, value, VINTEGER);
2032 return;
2033 }
2034 if (namesamen(pp, x_("height-subdivisions"), l) == 0)
2035 {
2036 if (count <= 2)
2037 {
2038 ttyputusage(x_("telltool simulation fasthenry height-subdivisions DEFHEIGHTSUBS"));
2039 return;
2040 }
2041 value = eatoi(par[2]);
2042 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenryheightsubdivkey, value, VINTEGER);
2043 return;
2044 }
2045 if (namesamen(pp, x_("max-segment-length"), l) == 0)
2046 {
2047 if (count <= 2)
2048 {
2049 ttyputusage(x_("telltool simulation fasthenry max-segment-length MAXSEGLENGTH"));
2050 return;
2051 }
2052 value = atola(par[2], 0);
2053 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenryseglimitkey, value, VINTEGER);
2054 return;
2055 }
2056 if (namesamen(pp, x_("execute"), l) == 0)
2057 {
2058 if (count <= 2)
2059 {
2060 ttyputusage(x_("telltool simulation fasthenry execute (none | run | multiple-run)"));
2061 return;
2062 }
2063 l = estrlen(pp = par[2]);
2064 if (namesamen(pp, x_("none"), l) == 0)
2065 {
2066 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_fasthenrystatekey);
2067 if (var != NOVARIABLE) options = var->addr; else options = 0;
2068 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenrystatekey,
2069 (options & ~FHEXECUTETYPE) | FHEXECUTENONE, VINTEGER);
2070 return;
2071 }
2072 if (namesamen(pp, x_("run"), l) == 0)
2073 {
2074 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_fasthenrystatekey);
2075 if (var != NOVARIABLE) options = var->addr; else options = 0;
2076 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenrystatekey,
2077 (options & ~FHEXECUTETYPE) | FHEXECUTERUNFH, VINTEGER);
2078 return;
2079 }
2080 if (namesamen(pp, x_("multiple-run"), l) == 0)
2081 {
2082 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_fasthenrystatekey);
2083 if (var != NOVARIABLE) options = var->addr; else options = 0;
2084 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenrystatekey,
2085 (options & ~FHEXECUTETYPE) | FHEXECUTERUNFHMUL, VINTEGER);
2086 return;
2087 }
2088 ttyputbadusage(x_("telltool simulation fasthenry execute"));
2089 return;
2090 }
2091 if (namesamen(pp, x_("postscript"), l) == 0 && l >= 3)
2092 {
2093 if (count <= 2)
2094 {
2095 ttyputusage(x_("telltool simulation fasthenry postscript (on | off)"));
2096 return;
2097 }
2098 l = estrlen(pp = par[2]);
2099 if (namesamen(pp, x_("on"), l) == 0 && l >= 2)
2100 {
2101 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_fasthenrystatekey);
2102 if (var != NOVARIABLE) options = var->addr; else options = 0;
2103 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenrystatekey,
2104 options | FHMAKEPOSTSCRIPTVIEW, VINTEGER);
2105 return;
2106 }
2107 if (namesamen(pp, x_("off"), l) == 0 && l >= 2)
2108 {
2109 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_fasthenrystatekey);
2110 if (var != NOVARIABLE) options = var->addr; else options = 0;
2111 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenrystatekey,
2112 options & ~FHMAKEPOSTSCRIPTVIEW, VINTEGER);
2113 return;
2114 }
2115 ttyputbadusage(x_("telltool simulation fasthenry postscript"));
2116 return;
2117 }
2118 if (namesamen(pp, x_("spice"), l) == 0)
2119 {
2120 if (count <= 2)
2121 {
2122 ttyputusage(x_("telltool simulation fasthenry spice (on | off)"));
2123 return;
2124 }
2125 l = estrlen(pp = par[2]);
2126 if (namesamen(pp, x_("on"), l) == 0 && l >= 2)
2127 {
2128 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_fasthenrystatekey);
2129 if (var != NOVARIABLE) options = var->addr; else options = 0;
2130 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenrystatekey,
2131 options | FHMAKESPICESUBCKT, VINTEGER);
2132 return;
2133 }
2134 if (namesamen(pp, x_("off"), l) == 0 && l >= 2)
2135 {
2136 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_fasthenrystatekey);
2137 if (var != NOVARIABLE) options = var->addr; else options = 0;
2138 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_fasthenrystatekey,
2139 options & ~FHMAKESPICESUBCKT, VINTEGER);
2140 return;
2141 }
2142 ttyputbadusage(x_("telltool simulation fasthenry spice"));
2143 return;
2144 }
2145 if (namesamen(pp, x_("arc"), l) == 0)
2146 {
2147 ai = (ARCINST *)asktool(us_tool, x_("get-arc"));
2148 if (ai == NOARCINST)
2149 {
2150 ttyputerr(M_("Select an arc first"));
2151 return;
2152 }
2153 if (count <= 2)
2154 {
2155 ttyputusage(x_("telltool simulation fasthenry arc OPTIONS"));
2156 return;
2157 }
2158 l = estrlen(pp = par[2]);
2159 if (namesamen(pp, x_("add"), l) == 0)
2160 {
2161 if (count <= 3)
2162 {
2163 ttyputusage(x_("telltool simulation fasthenry arc add GROUPNAME"));
2164 return;
2165 }
2166 startobjectchange((INTBIG)ai, VARCINST);
2167 setvalkey((INTBIG)ai, VARCINST, sim_fasthenrygroupnamekey, (INTBIG)par[3], VSTRING|VDISPLAY);
2168 endobjectchange((INTBIG)ai, VARCINST);
2169 return;
2170 }
2171 if (namesamen(pp, x_("remove"), l) == 0)
2172 {
2173 if (getvalkey((INTBIG)ai, VARCINST, VSTRING, sim_fasthenrygroupnamekey) != NOVARIABLE)
2174 {
2175 startobjectchange((INTBIG)ai, VARCINST);
2176 (void)delvalkey((INTBIG)ai, VARCINST, sim_fasthenrygroupnamekey);
2177 endobjectchange((INTBIG)ai, VARCINST);
2178 }
2179 return;
2180 }
2181 if (namesamen(pp, x_("thickness"), l) == 0)
2182 {
2183 if (count <= 3)
2184 {
2185 if (getvalkey((INTBIG)ai, VARCINST, VINTEGER, sim_fasthenrythicknesskey) != NOVARIABLE)
2186 {
2187 startobjectchange((INTBIG)ai, VARCINST);
2188 (void)delvalkey((INTBIG)ai, VARCINST, sim_fasthenrythicknesskey);
2189 endobjectchange((INTBIG)ai, VARCINST);
2190 }
2191 } else
2192 {
2193 startobjectchange((INTBIG)ai, VARCINST);
2194 setvalkey((INTBIG)ai, VARCINST, sim_fasthenrythicknesskey, atola(par[3], 0), VINTEGER);
2195 endobjectchange((INTBIG)ai, VARCINST);
2196 }
2197 return;
2198 }
2199 if (namesamen(pp, x_("width-subdivisions"), l) == 0)
2200 {
2201 if (count <= 3)
2202 {
2203 if (getvalkey((INTBIG)ai, VARCINST, VINTEGER, sim_fasthenrywidthsubdivkey) != NOVARIABLE)
2204 {
2205 startobjectchange((INTBIG)ai, VARCINST);
2206 (void)delvalkey((INTBIG)ai, VARCINST, sim_fasthenrywidthsubdivkey);
2207 endobjectchange((INTBIG)ai, VARCINST);
2208 }
2209 } else
2210 {
2211 startobjectchange((INTBIG)ai, VARCINST);
2212 setvalkey((INTBIG)ai, VARCINST, sim_fasthenrywidthsubdivkey, eatoi(par[3]), VINTEGER);
2213 endobjectchange((INTBIG)ai, VARCINST);
2214 }
2215 return;
2216 }
2217 if (namesamen(pp, x_("height-subdivisions"), l) == 0)
2218 {
2219 if (count <= 3)
2220 {
2221 if (getvalkey((INTBIG)ai, VARCINST, VINTEGER, sim_fasthenryheightsubdivkey) != NOVARIABLE)
2222 {
2223 startobjectchange((INTBIG)ai, VARCINST);
2224 (void)delvalkey((INTBIG)ai, VARCINST, sim_fasthenryheightsubdivkey);
2225 endobjectchange((INTBIG)ai, VARCINST);
2226 }
2227 } else
2228 {
2229 startobjectchange((INTBIG)ai, VARCINST);
2230 setvalkey((INTBIG)ai, VARCINST, sim_fasthenryheightsubdivkey, eatoi(par[3]), VINTEGER);
2231 endobjectchange((INTBIG)ai, VARCINST);
2232 }
2233 return;
2234 }
2235 if (namesamen(pp, x_("z-head"), l) == 0 && l >= 3)
2236 {
2237 if (count <= 3)
2238 {
2239 if (getvalkey((INTBIG)ai, VARCINST, VINTEGER, sim_fasthenryzheadkey) != NOVARIABLE)
2240 {
2241 startobjectchange((INTBIG)ai, VARCINST);
2242 (void)delvalkey((INTBIG)ai, VARCINST, sim_fasthenryzheadkey);
2243 endobjectchange((INTBIG)ai, VARCINST);
2244 }
2245 } else
2246 {
2247 startobjectchange((INTBIG)ai, VARCINST);
2248 setvalkey((INTBIG)ai, VARCINST, sim_fasthenryzheadkey, atola(par[3], 0), VINTEGER);
2249 endobjectchange((INTBIG)ai, VARCINST);
2250 }
2251 return;
2252 }
2253 if (namesamen(pp, x_("z-tail"), l) == 0 && l >= 3)
2254 {
2255 if (count <= 3)
2256 {
2257 if (getvalkey((INTBIG)ai, VARCINST, VINTEGER, sim_fasthenryztailkey) != NOVARIABLE)
2258 {
2259 startobjectchange((INTBIG)ai, VARCINST);
2260 (void)delvalkey((INTBIG)ai, VARCINST, sim_fasthenryztailkey);
2261 endobjectchange((INTBIG)ai, VARCINST);
2262 }
2263 } else
2264 {
2265 startobjectchange((INTBIG)ai, VARCINST);
2266 setvalkey((INTBIG)ai, VARCINST, sim_fasthenryztailkey, atola(par[3], 0), VINTEGER);
2267 endobjectchange((INTBIG)ai, VARCINST);
2268 }
2269 return;
2270 }
2271 ttyputbadusage(x_("telltool simulation fasthenry arc"));
2272 return;
2273 }
2274 ttyputbadusage(x_("telltool simulation fasthenry"));
2275 return;
2276 }
2277
2278 /* unknown command */
2279 ttyputbadusage(x_("telltool simulation"));
2280 }
2281
sim_request(CHAR * command,va_list ap)2282 INTBIG sim_request(CHAR *command, va_list ap)
2283 {
2284 REGISTER INTBIG arg1, arg2;
2285 CHAR *lowername;
2286 REGISTER NODEINST *ni;
2287 REGISTER NODEPROTO *np;
2288 REGISTER VARIABLE *var;
2289
2290 if (namesame(command, x_("traverse-up")) == 0)
2291 {
2292 arg1 = va_arg(ap, INTBIG);
2293 np = (NODEPROTO *)arg1;
2294 switch (sim_window_state&SIMENGINECUR)
2295 {
2296 case SIMENGINECURALS:
2297 simals_level_up_command();
2298 break;
2299 case SIMENGINECURVERILOG:
2300 sim_verlevel_up(np);
2301 break;
2302 #if SIMTOOLIRSIM != 0
2303 case SIMENGINECURIRSIM:
2304 irsim_level_up(np);
2305 break;
2306 #endif
2307 }
2308 return(0);
2309 }
2310 if (namesame(command, x_("traverse-down")) == 0)
2311 {
2312 arg1 = va_arg(ap, INTBIG);
2313 arg2 = va_arg(ap, INTBIG);
2314 ni = (NODEINST *)arg1;
2315 np = (NODEPROTO *)arg2;
2316 var = getvalkey((INTBIG)ni, VNODEINST, VSTRING, el_node_name_key);
2317 if (var == NOVARIABLE) return(0);
2318 lowername = (CHAR *)var->addr;
2319 switch (sim_window_state&SIMENGINECUR)
2320 {
2321 case SIMENGINECURALS:
2322 simals_level_set_command(lowername);
2323 break;
2324 case SIMENGINECURVERILOG:
2325 sim_verlevel_set(lowername, np);
2326 break;
2327 case SIMENGINECURSPICE:
2328 break;
2329 #if SIMTOOLIRSIM != 0
2330 case SIMENGINECURIRSIM:
2331 irsim_level_set(lowername, np);
2332 break;
2333 #endif
2334 }
2335 return(0);
2336 }
2337 return(0);
2338 }
2339
sim_slice(void)2340 void sim_slice(void)
2341 {
2342 NODEPROTO *np;
2343
2344 if (sim_circuitchanged && !sim_undoredochange)
2345 {
2346 if (sim_window_isactive(&np) != 0)
2347 {
2348 sim_window_stopsimulation();
2349 ttyputmsg(_("Circuit changed: simulation stopped"));
2350 setactivity(_("Simulation Halted"));
2351 }
2352 }
2353 sim_circuitchanged = FALSE;
2354 sim_undoredochange = FALSE;
2355
2356 /* handle VCR controls in the simulation window */
2357 sim_window_advancetime();
2358 }
2359
sim_startbatch(TOOL * source,BOOLEAN undoredo)2360 void sim_startbatch(TOOL *source, BOOLEAN undoredo)
2361 {
2362 Q_UNUSED( source );
2363 NODEPROTO *np;
2364
2365 sim_undoredochange = undoredo;
2366 sim_window_curactive = sim_window_isactive(&np);
2367 }
2368
sim_modifynodeinst(NODEINST * ni,INTBIG olx,INTBIG oly,INTBIG ohx,INTBIG ohy,INTBIG orot,INTBIG otran)2369 void sim_modifynodeinst(NODEINST *ni, INTBIG olx, INTBIG oly, INTBIG ohx, INTBIG ohy,
2370 INTBIG orot, INTBIG otran)
2371 {
2372 Q_UNUSED( olx );
2373 Q_UNUSED( oly );
2374 Q_UNUSED( ohx );
2375 Q_UNUSED( ohy );
2376 Q_UNUSED( orot );
2377 Q_UNUSED( otran );
2378
2379 if (sim_window_curactive == 0) return;
2380 sim_checktostopsimulation(ni->parent);
2381 }
2382
sim_modifyarcinst(ARCINST * ai,INTBIG oxA,INTBIG oyA,INTBIG oxB,INTBIG oyB,INTBIG owid,INTBIG olen)2383 void sim_modifyarcinst(ARCINST *ai, INTBIG oxA, INTBIG oyA, INTBIG oxB, INTBIG oyB,
2384 INTBIG owid, INTBIG olen)
2385 {
2386 Q_UNUSED( oxA );
2387 Q_UNUSED( oyA );
2388 Q_UNUSED( oxB );
2389 Q_UNUSED( oyB );
2390 Q_UNUSED( owid );
2391 Q_UNUSED( olen );
2392
2393 if (sim_window_curactive == 0) return;
2394 sim_checktostopsimulation(ai->parent);
2395 }
2396
sim_modifyportproto(PORTPROTO * pp,NODEINST * oni,PORTPROTO * opp)2397 void sim_modifyportproto(PORTPROTO *pp, NODEINST *oni, PORTPROTO *opp)
2398 {
2399 Q_UNUSED( oni );
2400 Q_UNUSED( opp );
2401
2402 if (sim_window_curactive == 0) return;
2403 sim_checktostopsimulation(pp->parent);
2404 }
2405
sim_newobject(INTBIG addr,INTBIG type)2406 void sim_newobject(INTBIG addr, INTBIG type)
2407 {
2408 if (sim_window_curactive == 0) return;
2409 switch (type&VTYPE)
2410 {
2411 case VNODEINST: sim_checktostopsimulation(((NODEINST *)addr)->parent); break;
2412 case VARCINST: sim_checktostopsimulation(((ARCINST *)addr)->parent); break;
2413 case VPORTPROTO: sim_checktostopsimulation(((PORTPROTO *)addr)->parent); break;
2414 }
2415 }
2416
sim_killobject(INTBIG addr,INTBIG type)2417 void sim_killobject(INTBIG addr, INTBIG type)
2418 {
2419 if (sim_window_curactive == 0) return;
2420 switch (type&VTYPE)
2421 {
2422 case VNODEINST: sim_checktostopsimulation(((NODEINST *)addr)->parent); break;
2423 case VARCINST: sim_checktostopsimulation(((ARCINST *)addr)->parent); break;
2424 case VPORTPROTO: sim_checktostopsimulation(((PORTPROTO *)addr)->parent); break;
2425 case VNODEPROTO: sim_checktostopsimulation((NODEPROTO *)addr); break;
2426 }
2427 }
2428
sim_newvariable(INTBIG addr,INTBIG type,INTBIG key,INTBIG newtype)2429 void sim_newvariable(INTBIG addr, INTBIG type, INTBIG key, INTBIG newtype)
2430 {
2431 REGISTER CHAR *name;
2432 REGISTER INTBIG i;
2433 REGISTER ARCINST *ai;
2434 REGISTER NODEINST *ni;
2435 REGISTER VARIABLE *var;
2436
2437 if ((newtype&VCREF) != 0)
2438 {
2439 /* detect change to "ai->userbits" to see if arc negation changed */
2440 if (sim_window_curactive == 0) return;
2441 if ((type&VTYPE) != VARCINST) return;
2442 name = changedvariablename(type, key, newtype);
2443 if (namesame(name, x_("userbits")) != 0) return;
2444
2445 ai = (ARCINST *)addr;
2446 if (ai != sim_modifyarc) return;
2447 if (((INTBIG)(ai->userbits&ISNEGATED)) != (sim_modifyarcbits&ISNEGATED))
2448 sim_checktostopsimulation(ai->parent);
2449 } else
2450 {
2451 /* detect change to cached window state */
2452 if ((type&VTYPE) == VTOOL && (TOOL *)addr == sim_tool)
2453 {
2454 for(i=0; sim_variablemirror[i].key != 0; i++)
2455 {
2456 if (key == *sim_variablemirror[i].key)
2457 {
2458 var = getvalkey(addr, type, -1, key);
2459 if (var != NOVARIABLE) *sim_variablemirror[i].value = var->addr;
2460 return;
2461 }
2462 }
2463 }
2464
2465 /* other changes only valid if simulation is running */
2466 if (sim_window_curactive == 0) return;
2467
2468 /* detect change to arc's name */
2469 if ((type&VTYPE) == VARCINST && key == el_arc_name_key)
2470 {
2471 ai = (ARCINST *)addr;
2472 sim_checktostopsimulation(ai->parent);
2473 }
2474
2475 /* detect change to node's name */
2476 if ((type&VTYPE) == VNODEINST && key == el_node_name_key)
2477 {
2478 ni = (NODEINST *)addr;
2479 sim_checktostopsimulation(ni->parent);
2480 }
2481 }
2482 }
2483
sim_killvariable(INTBIG addr,INTBIG type,INTBIG key,INTBIG oldaddr,INTBIG oldtype,UINTBIG * olddescript)2484 void sim_killvariable(INTBIG addr, INTBIG type, INTBIG key, INTBIG oldaddr, INTBIG oldtype,
2485 UINTBIG *olddescript)
2486 {
2487 REGISTER CHAR *name;
2488 Q_UNUSED( oldaddr );
2489 Q_UNUSED( olddescript );
2490
2491 if ((oldtype&VCREF) != 0)
2492 {
2493 /* detect change to "ai->userbits" and save former value */
2494 if ((type&VTYPE) != VARCINST) return;
2495 name = changedvariablename(type, key, oldtype);
2496 if (namesame(name, x_("userbits")) != 0) return;
2497
2498 sim_modifyarc = (ARCINST *)addr;
2499 sim_modifyarcbits = sim_modifyarc->userbits;
2500 }
2501 }
2502
sim_modifyvariable(INTBIG addr,INTBIG type,INTBIG key,INTBIG vartype,INTBIG aindex,INTBIG oldvalue)2503 void sim_modifyvariable(INTBIG addr, INTBIG type, INTBIG key, INTBIG vartype,
2504 INTBIG aindex, INTBIG oldvalue)
2505 {
2506 Q_UNUSED( vartype );
2507 Q_UNUSED( aindex );
2508 Q_UNUSED( oldvalue );
2509
2510 if (sim_window_curactive == 0) return;
2511 if (type != VNODEPROTO) return;
2512 if (key != el_cell_message_key) return;
2513 sim_checktostopsimulation((NODEPROTO *)addr);
2514 }
2515
sim_insertvariable(INTBIG addr,INTBIG type,INTBIG key,INTBIG vartype,INTBIG index)2516 void sim_insertvariable(INTBIG addr, INTBIG type, INTBIG key, INTBIG vartype, INTBIG index)
2517 {
2518 Q_UNUSED( vartype );
2519 Q_UNUSED( index );
2520
2521 if (sim_window_curactive == 0) return;
2522 if (type != VNODEPROTO) return;
2523 if (key != el_cell_message_key) return;
2524 sim_checktostopsimulation((NODEPROTO *)addr);
2525 }
2526
sim_deletevariable(INTBIG addr,INTBIG type,INTBIG key,INTBIG vartype,INTBIG index,INTBIG oldvalue)2527 void sim_deletevariable(INTBIG addr, INTBIG type, INTBIG key, INTBIG vartype, INTBIG index,
2528 INTBIG oldvalue)
2529 {
2530 Q_UNUSED( vartype );
2531 Q_UNUSED( index );
2532 Q_UNUSED( oldvalue );
2533
2534 if (sim_window_curactive == 0) return;
2535 if (type != VNODEPROTO) return;
2536 if (key != el_cell_message_key) return;
2537 sim_checktostopsimulation((NODEPROTO *)addr);
2538 }
2539
sim_readlibrary(LIBRARY * lib)2540 void sim_readlibrary(LIBRARY *lib)
2541 {
2542 REGISTER VARIABLE *var;
2543 REGISTER INTBIG i;
2544 Q_UNUSED( lib );
2545
2546 /* recache mirrored variables now that the library may have overridden them */
2547 for(i=0; sim_variablemirror[i].key != 0; i++)
2548 {
2549 var = getvalkey((INTBIG)sim_tool, VTOOL, -1, *sim_variablemirror[i].key);
2550 if (var != NOVARIABLE)
2551 {
2552 *sim_variablemirror[i].value = var->addr;
2553 }
2554 }
2555 }
2556
2557 /****************************** SUPPORT ******************************/
2558
sim_window_setstate(INTBIG newstate)2559 void sim_window_setstate(INTBIG newstate)
2560 {
2561 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_window_statekey, newstate, VINTEGER);
2562 sim_window_state = newstate;
2563 }
2564
sim_checktostopsimulation(NODEPROTO * np)2565 void sim_checktostopsimulation(NODEPROTO *np)
2566 {
2567 NODEPROTO *onp;
2568
2569 if (np->primindex != 0) return;
2570 (void)sim_window_isactive(&onp);
2571 if (onp != np)
2572 {
2573 /* cells not the same, but see if the modified one is VHDL or netlist */
2574 if (!insamecellgrp(onp, np)) return;
2575 if (np->cellview != el_vhdlview && np->cellview != el_netlistalsview)
2576 return;
2577 }
2578 sim_circuitchanged = TRUE;
2579 }
2580
2581 /*
2582 * Routine to initialize the accumulation of bus signals. Subsequent routines
2583 * call "sim_addbussignal()" to add a signal to the bus. When done, call
2584 * "sim_getbussignals()" to get the total and the array.
2585 */
sim_initbussignals(void)2586 void sim_initbussignals(void)
2587 {
2588 sim_bussignalcount = 0;
2589 }
2590
2591 /*
2592 * Routine to add signal "signal" to the list of bus signals.
2593 */
sim_addbussignal(INTBIG signal)2594 void sim_addbussignal(INTBIG signal)
2595 {
2596 REGISTER INTBIG i, newtotal, *newsignals;
2597
2598 if (sim_bussignalcount >= sim_bussignaltotal)
2599 {
2600 newtotal = sim_bussignaltotal * 2;
2601 if (sim_bussignalcount >= newtotal) newtotal = sim_bussignalcount+20;
2602 newsignals = (INTBIG *)emalloc(newtotal * SIZEOFINTBIG, sim_tool->cluster);
2603 if (newsignals == 0) return;
2604 for(i=0; i<sim_bussignalcount; i++)
2605 newsignals[i] = sim_bussignals[i];
2606 if (sim_bussignaltotal > 0) efree((CHAR *)sim_bussignals);
2607 sim_bussignals = newsignals;
2608 sim_bussignaltotal = newtotal;
2609 }
2610 sim_bussignals[sim_bussignalcount++] = signal;
2611 }
2612
2613 /*
2614 * Routine to return the bus signal array in "signallist" and return its size.
2615 */
sim_getbussignals(INTBIG ** signallist)2616 INTBIG sim_getbussignals(INTBIG **signallist)
2617 {
2618 *signallist = sim_bussignals;
2619 return(sim_bussignalcount);
2620 }
2621
2622 /*
2623 * Routine to read-out a list of signal names in a waveform window "simwin".
2624 * Calls "addbranch()" to create a branch of the tree, "addleaf()" to add a leaf.
2625 * Both routines take the name and the parent node (0 if at the top)
2626 * and both routines return their node object.
2627 * The name of a node object can be obtained with "nodename()".
2628 */
sim_reportsignals(WINDOWPART * simwin,void * (* addbranch)(CHAR *,void *),void * (* findbranch)(CHAR *,void *),void * (* addleaf)(CHAR *,void *),CHAR * (* nodename)(void *))2629 void sim_reportsignals(WINDOWPART *simwin, void *(*addbranch)(CHAR*, void*),
2630 void *(*findbranch)(CHAR*, void*), void *(*addleaf)(CHAR*, void*),CHAR *(*nodename)(void*))
2631 {
2632 switch (sim_window_state&SIMENGINECUR)
2633 {
2634 case SIMENGINECURALS:
2635 simals_reportsignals(simwin, addbranch, findbranch, addleaf, nodename);
2636 break;
2637 case SIMENGINECURVERILOG:
2638 sim_verreportsignals(simwin, addbranch, findbranch, addleaf, nodename);
2639 break;
2640 case SIMENGINECURSPICE:
2641 sim_spicereportsignals(simwin, addbranch, findbranch, addleaf, nodename);
2642 break;
2643 #if SIMTOOLIRSIM != 0
2644 case SIMENGINECURIRSIM:
2645 irsim_reportsignals(simwin, addbranch, findbranch, addleaf, nodename);
2646 break;
2647 #endif
2648 }
2649 }
2650
2651 /*
2652 * Routine to add signal "sig" to the waveform window, overlaid if "overlay" is TRUE.
2653 */
sim_addsignal(WINDOWPART * simwin,CHAR * sig,BOOLEAN overlay)2654 void sim_addsignal(WINDOWPART *simwin, CHAR *sig, BOOLEAN overlay)
2655 {
2656 switch (sim_window_state&SIMENGINECUR)
2657 {
2658 case SIMENGINECURALS:
2659 break;
2660 case SIMENGINECURVERILOG:
2661 sim_veraddhighlightednet(sig);
2662 break;
2663 case SIMENGINECURSPICE:
2664 sim_spice_addhighlightednet(sig, overlay);
2665 break;
2666 #if SIMTOOLIRSIM != 0
2667 case SIMENGINECURIRSIM:
2668 irsim_adddisplayedsignal(sig);
2669 break;
2670 #endif
2671 }
2672 }
2673
sim_signalseparator(void)2674 CHAR *sim_signalseparator(void)
2675 {
2676 REGISTER CHAR *sepstr;
2677
2678 switch (sim_window_state&SIMENGINECUR)
2679 {
2680 case SIMENGINECURALS: sepstr = x_("."); break;
2681 case SIMENGINECURVERILOG: sepstr = x_("."); break;
2682 case SIMENGINECURSPICE: sepstr = x_("."); break;
2683 #if SIMTOOLIRSIM != 0
2684 case SIMENGINECURIRSIM: sepstr = x_("/"); break;
2685 #endif
2686 }
2687 return(sepstr);
2688 }
2689
2690 /****************************** DIALOG ******************************/
2691
2692 /* Simulation Options */
2693 static DIALOGITEM sim_optionsdialogitems[] =
2694 {
2695 /* 1 */ {0, {312,484,336,548}, BUTTON, N_("OK")},
2696 /* 2 */ {0, {312,384,336,448}, BUTTON, N_("Cancel")},
2697 /* 3 */ {0, {124,4,140,201}, CHECK, N_("Resimulate each change")},
2698 /* 4 */ {0, {148,4,164,201}, CHECK, N_("Auto advance time")},
2699 /* 5 */ {0, {172,4,188,201}, CHECK, N_("Multistate display")},
2700 /* 6 */ {0, {52,4,68,201}, CHECK, N_("Show waveform window")},
2701 /* 7 */ {0, {228,292,244,417}, MESSAGE, N_("Maximum events:")},
2702 /* 8 */ {0, {228,420,244,501}, EDITTEXT, x_("")},
2703 /* 9 */ {0, {28,4,44,161}, MESSAGE, N_("Base for bus values:")},
2704 /* 10 */ {0, {28,164,44,217}, POPUP, x_("")},
2705 /* 11 */ {0, {76,16,92,201}, MESSAGE, N_("Place waveform window")},
2706 /* 12 */ {0, {96,60,112,200}, POPUP, x_("")},
2707 /* 13 */ {0, {4,4,20,129}, MESSAGE, N_("Simulation engine:")},
2708 /* 14 */ {0, {4,132,20,276}, POPUP, x_("")},
2709 /* 15 */ {0, {204,4,220,89}, MESSAGE, N_("IRSIM:")},
2710 /* 16 */ {0, {204,284,220,368}, MESSAGE, N_("ALS:")},
2711 /* 17 */ {0, {244,28,260,101}, RADIO, N_("Quick")},
2712 /* 18 */ {0, {244,104,260,177}, RADIO, N_("Local")},
2713 /* 19 */ {0, {244,180,260,253}, RADIO, N_("Full")},
2714 /* 20 */ {0, {196,4,197,565}, DIVIDELINE, x_("")},
2715 /* 21 */ {0, {268,16,284,129}, MESSAGE, N_("Parameter file:")},
2716 /* 22 */ {0, {288,28,320,273}, EDITTEXT, x_("")},
2717 /* 23 */ {0, {224,16,240,153}, MESSAGE, N_("Parasitics:")},
2718 /* 24 */ {0, {268,172,284,229}, BUTTON, N_("Set")},
2719 /* 25 */ {0, {4,280,345,281}, DIVIDELINE, x_("")},
2720 /* 26 */ {0, {329,16,345,213}, CHECK, N_("Show commands")},
2721 /* 27 */ {0, {32,288,48,441}, MESSAGE, N_("Low:")},
2722 /* 28 */ {0, {32,444,48,565}, POPUP, x_("")},
2723 /* 29 */ {0, {52,288,68,441}, MESSAGE, N_("High:")},
2724 /* 30 */ {0, {52,444,68,565}, POPUP, x_("")},
2725 /* 31 */ {0, {72,288,88,441}, MESSAGE, N_("Undefined (X):")},
2726 /* 32 */ {0, {72,444,88,565}, POPUP, x_("")},
2727 /* 33 */ {0, {92,288,108,441}, MESSAGE, N_("Floating (Z):")},
2728 /* 34 */ {0, {92,444,108,565}, POPUP, x_("")},
2729 /* 35 */ {0, {112,288,128,441}, MESSAGE, N_("Strength 0 (off):")},
2730 /* 36 */ {0, {112,444,128,565}, POPUP, x_("")},
2731 /* 37 */ {0, {132,288,148,441}, MESSAGE, N_("Strength 1 (node):")},
2732 /* 38 */ {0, {132,444,148,565}, POPUP, x_("")},
2733 /* 39 */ {0, {152,288,168,441}, MESSAGE, N_("Strength 2 (gate):")},
2734 /* 40 */ {0, {152,444,168,565}, POPUP, x_("")},
2735 /* 41 */ {0, {172,288,188,441}, MESSAGE, N_("Strength 3 (power):")},
2736 /* 42 */ {0, {172,444,188,565}, POPUP, x_("")},
2737 /* 43 */ {0, {8,288,24,565}, MESSAGE, N_("Waveform window colors:")}
2738 };
2739 static DIALOG sim_optionsdialog = {{50,75,404,650}, N_("Simulation Options"), 0, 43, sim_optionsdialogitems, 0, 0};
2740
2741 /* special items for the "Simulation Options" dialog: */
2742 #define DSMO_RESIMULATE 3 /* Resimulate each change (check) */
2743 #define DSMO_AUTOADVANCE 4 /* Auto advance time (check) */
2744 #define DSMO_MULTISTATE 5 /* Multistate display (check) */
2745 #define DSMO_WAVEFORMWIND 6 /* Show waveform window (check) */
2746 #define DSMO_MAXEVENTS 8 /* Maximum events (edit text) */
2747 #define DSMO_BUSBASE 10 /* Base for busses (popup) */
2748 #define DSMO_WAVEFORMLOC 12 /* Place waveform window (popup) */
2749 #define DSMO_SIMENGINE 14 /* Simulation engine to use (popup) */
2750 #define DSMO_IRSIMPARAQUI 17 /* IRSIM: Quick parasitics (radio) */
2751 #define DSMO_IRSIMPARALOC 18 /* IRSIM: Local parasitics (radio) */
2752 #define DSMO_IRSIMPARAFULL 19 /* IRSIM: Full parasitics (radio) */
2753 #define DSMO_IRSIMPARMFILE 22 /* IRSIM: Parameter file (edit text) */
2754 #define DSMO_IRSIMSETPFILE 24 /* IRSIM: Set Parameter file (button) */
2755 #define DSMO_IRSIMSHOWCMDS 26 /* IRSIM: Show command (check) */
2756 #define DSMO_COLORLOW 28 /* Color for low (popup) */
2757 #define DSMO_COLORHIGH 30 /* Color for high (popup) */
2758 #define DSMO_COLORX 32 /* Color for X (popup) */
2759 #define DSMO_COLORZ 34 /* Color for Z (popup) */
2760 #define DSMO_COLORSTR0 36 /* Color for strength 0 (off) (popup) */
2761 #define DSMO_COLORSTR1 38 /* Color for strength 1 (node) (popup) */
2762 #define DSMO_COLORSTR2 40 /* Color for strength 2 (gate) (popup) */
2763 #define DSMO_COLORSTR3 42 /* Color for strength 3 (power) (popup) */
2764
2765 static INTBIG sim_window_colorvaluelist[20] =
2766 {
2767 WHITE, /* white */
2768 BLACK, /* black */
2769 RED, /* red */
2770 BLUE, /* blue */
2771 GREEN, /* green */
2772 CYAN, /* cyan */
2773 MAGENTA, /* magenta */
2774 YELLOW, /* yellow */
2775 GRAY, /* gray */
2776 ORANGE, /* orange */
2777 PURPLE, /* purple */
2778 BROWN, /* brown */
2779 LGRAY, /* light gray */
2780 DGRAY, /* dark gray */
2781 LRED, /* light red */
2782 DRED, /* dark red */
2783 LGREEN, /* light green */
2784 DGREEN, /* dark green */
2785 LBLUE, /* light blue */
2786 DBLUE /* dark blue */
2787 };
2788
sim_optionsdlog(void)2789 void sim_optionsdlog(void)
2790 {
2791 INTBIG itemHit, newtracesize, i;
2792 REGISTER VARIABLE *var;
2793 CHAR line[20], *newlang[20], *iniparamfile, *pt, *colorname, *colorsymbol;
2794 REGISTER INTBIG noupdate, newnoupdate, newwindowstate, irsimstate,
2795 newirsimstate, oldplease;
2796 REGISTER TRAKPTR newtrakroot;
2797 static CHAR *busbase[4] = {x_("2"), x_("8"), x_("10"), x_("16")};
2798 static CHAR *placement[3] = {N_("Cascade"), N_("Tile Horizontally"), N_("Tile Vertically")};
2799 static CHAR *engine[2] = {N_("ALS"), N_("IRSIM")};
2800 REGISTER void *infstr, *dia;
2801
2802 dia = DiaInitDialog(&sim_optionsdialog);
2803 if (dia == 0) return;
2804 for(i=0; i<3; i++) newlang[i] = TRANSLATE(placement[i]);
2805 DiaSetPopup(dia, DSMO_WAVEFORMLOC, 3, newlang);
2806 #if SIMTOOLIRSIM == 0
2807 engine[1] = N_("IRSIM (not installed)");
2808 #endif
2809 for(i=0; i<2; i++) newlang[i] = TRANSLATE(engine[i]);
2810 DiaSetPopup(dia, DSMO_SIMENGINE, 2, newlang);
2811 var = getval((INTBIG)sim_tool, VTOOL, VINTEGER, x_("SIM_als_no_update"));
2812 if (var == NOVARIABLE) noupdate = 0; else noupdate = var->addr;
2813 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_irsim_statekey);
2814 if (var == NOVARIABLE) irsimstate = DEFIRSIMSTATE; else irsimstate = var->addr;
2815 if (noupdate == 0) DiaSetControl(dia, DSMO_RESIMULATE, 1);
2816 if ((sim_window_state&ADVANCETIME) != 0) DiaSetControl(dia, DSMO_AUTOADVANCE, 1);
2817 if ((sim_window_state&FULLSTATE) != 0) DiaSetControl(dia, DSMO_MULTISTATE, 1);
2818 if ((sim_window_state&SHOWWAVEFORM) != 0) DiaSetControl(dia, DSMO_WAVEFORMWIND, 1);
2819 if ((irsimstate&IRSIMSHOWCOMMANDS) != 0) DiaSetControl(dia, DSMO_IRSIMSHOWCMDS, 1);
2820 DiaSetPopup(dia, DSMO_BUSBASE, 4, busbase);
2821 switch (sim_window_state&SIMENGINE)
2822 {
2823 case SIMENGINEALS: DiaSetPopupEntry(dia, DSMO_SIMENGINE, 0); break;
2824 case SIMENGINEIRSIM: DiaSetPopupEntry(dia, DSMO_SIMENGINE, 1); break;
2825 }
2826 switch (irsimstate&IRSIMPARASITICS)
2827 {
2828 case IRSIMPARAQUICK: DiaSetControl(dia, DSMO_IRSIMPARAQUI, 1); break;
2829 case IRSIMPARALOCAL: DiaSetControl(dia, DSMO_IRSIMPARALOC, 1); break;
2830 case IRSIMPARAFULL: DiaSetControl(dia, DSMO_IRSIMPARAFULL, 1); break;
2831 }
2832 switch (sim_window_state&BUSBASEBITS)
2833 {
2834 case BUSBASE2: DiaSetPopupEntry(dia, DSMO_BUSBASE, 0); break;
2835 case BUSBASE8: DiaSetPopupEntry(dia, DSMO_BUSBASE, 1); break;
2836 case BUSBASE10: DiaSetPopupEntry(dia, DSMO_BUSBASE, 2); break;
2837 case BUSBASE16: DiaSetPopupEntry(dia, DSMO_BUSBASE, 3); break;
2838 }
2839 switch (sim_window_state&WAVEPLACE)
2840 {
2841 case WAVEPLACECAS: DiaSetPopupEntry(dia, DSMO_WAVEFORMLOC, 0); break;
2842 case WAVEPLACETHOR: DiaSetPopupEntry(dia, DSMO_WAVEFORMLOC, 1); break;
2843 case WAVEPLACETVER: DiaSetPopupEntry(dia, DSMO_WAVEFORMLOC, 2); break;
2844 }
2845 if (simals_trace_size == 0)
2846 {
2847 var = getval((INTBIG)sim_tool, VTOOL, VINTEGER, x_("SIM_als_num_events"));
2848 if (var == NOVARIABLE) simals_trace_size = DEFAULT_TRACE_SIZE; else
2849 simals_trace_size = var->addr;
2850 }
2851 esnprintf(line, 20, x_("%ld"), simals_trace_size);
2852 DiaSetText(dia, DSMO_MAXEVENTS, line);
2853 infstr = initinfstr();
2854 var = getval((INTBIG)sim_tool, VTOOL, VSTRING, x_("SIM_irsim_parameter_file"));
2855 if (var == NOVARIABLE)
2856 formatinfstr(infstr, x_("%s%s"), el_libdir, DEFIRSIMPARAMFILE); else
2857 addstringtoinfstr(infstr, (CHAR *)var->addr);
2858 (void)allocstring(&iniparamfile, returninfstr(infstr), el_tempcluster);
2859 DiaSetText(dia, DSMO_IRSIMPARMFILE, iniparamfile);
2860 for(i=0; i<20; i++)
2861 {
2862 (void)ecolorname(sim_window_colorvaluelist[i], &colorname, &colorsymbol);
2863 newlang[i] = TRANSLATE(colorname);
2864 }
2865 sim_optionssetcolorindia(dia, DSMO_COLORLOW, LOGIC_LOW, newlang);
2866 sim_optionssetcolorindia(dia, DSMO_COLORHIGH, LOGIC_HIGH, newlang);
2867 sim_optionssetcolorindia(dia, DSMO_COLORX, LOGIC_X, newlang);
2868 sim_optionssetcolorindia(dia, DSMO_COLORZ, LOGIC_Z, newlang);
2869 sim_optionssetcolorindia(dia, DSMO_COLORSTR0, OFF_STRENGTH, newlang);
2870 sim_optionssetcolorindia(dia, DSMO_COLORSTR1, NODE_STRENGTH, newlang);
2871 sim_optionssetcolorindia(dia, DSMO_COLORSTR2, GATE_STRENGTH, newlang);
2872 sim_optionssetcolorindia(dia, DSMO_COLORSTR3, VDD_STRENGTH, newlang);
2873
2874 /* loop until done */
2875 for(;;)
2876 {
2877 itemHit = DiaNextHit(dia);
2878 if (itemHit == OK || itemHit == CANCEL) break;
2879 if (itemHit == DSMO_RESIMULATE || itemHit == DSMO_AUTOADVANCE ||
2880 itemHit == DSMO_MULTISTATE || itemHit == DSMO_WAVEFORMWIND ||
2881 itemHit == DSMO_IRSIMSHOWCMDS)
2882 {
2883 DiaSetControl(dia, itemHit, 1 - DiaGetControl(dia, itemHit));
2884 continue;
2885 }
2886 if (itemHit == DSMO_IRSIMPARAQUI || itemHit == DSMO_IRSIMPARALOC ||
2887 itemHit == DSMO_IRSIMPARAFULL)
2888 {
2889 DiaSetControl(dia, DSMO_IRSIMPARAQUI, 0);
2890 DiaSetControl(dia, DSMO_IRSIMPARALOC, 0);
2891 DiaSetControl(dia, DSMO_IRSIMPARAFULL, 0);
2892 DiaSetControl(dia, itemHit, 1);
2893 continue;
2894 }
2895 if (itemHit == DSMO_IRSIMSETPFILE)
2896 {
2897 oldplease = el_pleasestop;
2898 infstr = initinfstr();
2899 addstringtoinfstr(infstr, x_("irsimparam/"));
2900 addstringtoinfstr(infstr, _("IRSIM Parameter File"));
2901 i = ttygetparam(returninfstr(infstr), &us_colorreadp, 1, newlang);
2902 el_pleasestop = oldplease;
2903 if (i != 0 && newlang[0][0] != 0) DiaSetText(dia, DSMO_IRSIMPARMFILE, newlang[0]);
2904 continue;
2905 }
2906 }
2907
2908 if (itemHit != CANCEL)
2909 {
2910 if (DiaGetControl(dia, DSMO_RESIMULATE) != 0) newnoupdate = 0; else
2911 newnoupdate = 1;
2912 newwindowstate = 0;
2913 if (DiaGetControl(dia, DSMO_AUTOADVANCE) != 0) newwindowstate |= ADVANCETIME;
2914 if (DiaGetControl(dia, DSMO_MULTISTATE) != 0) newwindowstate |= FULLSTATE;
2915 if (DiaGetControl(dia, DSMO_WAVEFORMWIND) != 0) newwindowstate |= SHOWWAVEFORM;
2916 switch (DiaGetPopupEntry(dia, DSMO_BUSBASE))
2917 {
2918 case 0: newwindowstate |= BUSBASE2; break;
2919 case 1: newwindowstate |= BUSBASE8; break;
2920 case 2: newwindowstate |= BUSBASE10; break;
2921 case 3: newwindowstate |= BUSBASE16; break;
2922 }
2923 switch (DiaGetPopupEntry(dia, DSMO_WAVEFORMLOC))
2924 {
2925 case 0: newwindowstate |= WAVEPLACECAS; break;
2926 case 1: newwindowstate |= WAVEPLACETHOR; break;
2927 case 2: newwindowstate |= WAVEPLACETVER; break;
2928 }
2929 switch (DiaGetPopupEntry(dia, DSMO_SIMENGINE))
2930 {
2931 case 0: newwindowstate |= SIMENGINEALS; break;
2932 case 1: newwindowstate |= SIMENGINEIRSIM; break;
2933 }
2934 if (newnoupdate != noupdate)
2935 (void)setval((INTBIG)sim_tool, VTOOL, x_("SIM_als_no_update"),
2936 newnoupdate, VINTEGER);
2937 if (newwindowstate != sim_window_state)
2938 sim_window_setstate(newwindowstate);
2939
2940 newirsimstate = 0;
2941 if (DiaGetControl(dia, DSMO_IRSIMPARALOC) != 0) newirsimstate |= IRSIMPARALOCAL; else
2942 if (DiaGetControl(dia, DSMO_IRSIMPARAFULL) != 0) newirsimstate |= IRSIMPARAFULL;
2943 if (DiaGetControl(dia, DSMO_IRSIMSHOWCMDS) != 0) newirsimstate |= IRSIMSHOWCOMMANDS;
2944 if (newirsimstate != irsimstate)
2945 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_irsim_statekey,
2946 newirsimstate, VINTEGER);
2947 pt = DiaGetText(dia, DSMO_IRSIMPARMFILE);
2948 if (estrcmp(pt, iniparamfile) != 0)
2949 (void)setval((INTBIG)sim_tool, VTOOL, x_("SIM_irsim_parameter_file"),
2950 (INTBIG)pt, VSTRING);
2951 newtracesize = eatoi(DiaGetText(dia, DSMO_MAXEVENTS));
2952 if (newtracesize != simals_trace_size)
2953 {
2954 newtrakroot = (TRAKPTR)simals_alloc_mem((INTBIG)(newtracesize * sizeof(TRAK)));
2955 if (newtrakroot != 0)
2956 {
2957 if (simals_trakroot != 0) efree((CHAR *)simals_trakroot);
2958 simals_trakroot = newtrakroot;
2959 simals_trace_size = newtracesize;
2960 (void)setval((INTBIG)sim_tool, VTOOL, x_("SIM_als_num_events"),
2961 newtracesize, VINTEGER);
2962 }
2963 }
2964 sim_optionsgetcolorfromdia(dia, DSMO_COLORLOW, LOGIC_LOW);
2965 sim_optionsgetcolorfromdia(dia, DSMO_COLORHIGH, LOGIC_HIGH);
2966 sim_optionsgetcolorfromdia(dia, DSMO_COLORX, LOGIC_X);
2967 sim_optionsgetcolorfromdia(dia, DSMO_COLORZ, LOGIC_Z);
2968 sim_optionsgetcolorfromdia(dia, DSMO_COLORSTR0, OFF_STRENGTH);
2969 sim_optionsgetcolorfromdia(dia, DSMO_COLORSTR1, NODE_STRENGTH);
2970 sim_optionsgetcolorfromdia(dia, DSMO_COLORSTR2, GATE_STRENGTH);
2971 sim_optionsgetcolorfromdia(dia, DSMO_COLORSTR3, VDD_STRENGTH);
2972 }
2973 efree((CHAR *)iniparamfile);
2974 DiaDoneDialog(dia);
2975 }
2976
sim_optionssetcolorindia(void * dia,INTBIG entry,INTBIG signal,char ** newlang)2977 void sim_optionssetcolorindia(void *dia, INTBIG entry, INTBIG signal, char **newlang)
2978 {
2979 REGISTER INTBIG i, index;
2980
2981 DiaSetPopup(dia, entry, 20, newlang);
2982 index = sim_window_getdisplaycolor(signal);
2983 for(i=0; i<20; i++) if (index == sim_window_colorvaluelist[i]) break;
2984 if (i < 20) DiaSetPopupEntry(dia, entry, i);
2985 }
2986
sim_optionsgetcolorfromdia(void * dia,INTBIG entry,INTBIG signal)2987 void sim_optionsgetcolorfromdia(void *dia, INTBIG entry, INTBIG signal)
2988 {
2989 REGISTER INTBIG i;
2990
2991 i = DiaGetPopupEntry(dia, entry);
2992 sim_window_setdisplaycolor(signal, sim_window_colorvaluelist[i]);
2993 }
2994
2995 /* ALS Clock */
2996 static DIALOGITEM sim_alsclockdialogitems[] =
2997 {
2998 /* 1 */ {0, {8,320,32,384}, BUTTON, N_("OK")},
2999 /* 2 */ {0, {40,320,64,384}, BUTTON, N_("Cancel")},
3000 /* 3 */ {0, {16,8,32,101}, RADIO, N_("Frequency:")},
3001 /* 4 */ {0, {40,8,56,101}, RADIO, N_("Period:")},
3002 /* 5 */ {0, {80,8,96,101}, RADIO, N_("Custom:")},
3003 /* 6 */ {0, {28,208,44,283}, EDITTEXT, x_("")},
3004 /* 7 */ {0, {28,112,44,199}, MESSAGE, N_("Freq/Period:")},
3005 /* 8 */ {0, {112,236,128,384}, RADIO, N_("Normal (gate) strength")},
3006 /* 9 */ {0, {236,232,252,369}, RADIO, N_("Undefined Phase")},
3007 /* 10 */ {0, {112,8,128,151}, MESSAGE, N_("Random Distribution:")},
3008 /* 11 */ {0, {112,160,128,223}, EDITTEXT, x_("")},
3009 /* 12 */ {0, {136,236,152,384}, RADIO, N_("Strong (VDD) strength")},
3010 /* 13 */ {0, {88,236,104,384}, RADIO, N_("Weak (node) strength")},
3011 /* 14 */ {0, {212,232,228,328}, RADIO, N_("High Phase")},
3012 /* 15 */ {0, {292,272,308,363}, BUTTON, N_("Delete Phase")},
3013 /* 16 */ {0, {164,8,279,221}, SCROLL|INACTIVE, x_("")},
3014 /* 17 */ {0, {164,224,180,288}, MESSAGE, N_("Duration:")},
3015 /* 18 */ {0, {264,272,280,363}, BUTTON, N_("Add Phase")},
3016 /* 19 */ {0, {292,8,308,197}, MESSAGE, N_("Phase Cycles (0 for infinite):")},
3017 /* 20 */ {0, {292,200,308,247}, EDITTEXT, x_("")},
3018 /* 21 */ {0, {164,296,180,369}, EDITTEXT, x_("")},
3019 /* 22 */ {0, {148,8,164,99}, MESSAGE, N_("Phase List:")},
3020 /* 23 */ {0, {188,232,204,327}, RADIO, N_("Low Phase")},
3021 /* 24 */ {0, {72,8,73,384}, DIVIDELINE, x_("")}
3022 };
3023 static DIALOG sim_alsclockdialog = {{50,75,367,468}, N_("Clock Specification"), 0, 24, sim_alsclockdialogitems, 0, 0};
3024
3025 /* special items for the "als clock" dialog: */
3026 #define DALC_FREQUENCY 3 /* Frequency (radio) */
3027 #define DALC_PERIOD 4 /* Period (radio) */
3028 #define DALC_CUSTOM 5 /* Custom (radio) */
3029 #define DALC_FREQPERIOD 6 /* Frequency/Period (edit text) */
3030 #define DALC_FREQPERIOD_L 7 /* Frequency/Period label (stat text) */
3031 #define DALC_STRENGTHNORM 8 /* Normal strength (radio) */
3032 #define DALC_PHASEUNDEF 9 /* Undefined phase (radio) */
3033 #define DALC_DISTRIBUTION_L 10 /* Random distribution label (stat text) */
3034 #define DALC_DISTRIBUTION 11 /* Random distribution (edit text) */
3035 #define DALC_STRENGTHSTRONG 12 /* Strong strength (radio) */
3036 #define DALC_STRENGTHWEAK 13 /* Weak strength (radio) */
3037 #define DALC_PHASEHIGH 14 /* High phase (radio) */
3038 #define DALC_DELPHASE 15 /* Delete a phase (button) */
3039 #define DALC_PHASELIST 16 /* List of phases (scroll) */
3040 #define DALC_DURATION_L 17 /* Duration label (stat text) */
3041 #define DALC_ADDPHASE 18 /* Add a phase (button) */
3042 #define DALC_CYCLES_L 19 /* Number of cycles label (stat text) */
3043 #define DALC_CYCLES 20 /* Number of cycles (edit text) */
3044 #define DALC_DURATION 21 /* Duration (edit text) */
3045 #define DALC_PHASELIST_L 22 /* Phases list label (stat text) */
3046 #define DALC_PHASELOW 23 /* Low phase (radio) */
3047
3048 #define MAXPHASES 20
sim_alsclockdlog(CHAR * paramstart[])3049 INTBIG sim_alsclockdlog(CHAR *paramstart[])
3050 {
3051 INTBIG itemHit, i, j;
3052 INTBIG retval;
3053 CHAR *line;
3054 float durval[MAXPHASES];
3055 INTBIG levval[MAXPHASES], phases;
3056 static CHAR *retdur[MAXPHASES];
3057 static INTBIG first = 0;
3058 REGISTER void *dia;
3059
3060 /* display the ALS clock dialog box */
3061 dia = DiaInitDialog(&sim_alsclockdialog);
3062 if (dia == 0) return(0);
3063 DiaInitTextDialog(dia, DALC_PHASELIST, DiaNullDlogList, DiaNullDlogItem, DiaNullDlogDone, -1, 0);
3064
3065 /* setup complex clock specification */
3066 DiaSetText(dia, DALC_DISTRIBUTION, x_("0.0")); /* random */
3067 DiaSetControl(dia, DALC_STRENGTHNORM, 1); /* gate strength */
3068 DiaSetControl(dia, DALC_PHASEHIGH, 1); /* level */
3069 DiaSetText(dia, DALC_CYCLES, x_("0")); /* infinite cycles */
3070
3071 /* now disable complex clock specification */
3072 DiaSetControl(dia, DALC_FREQUENCY, 1); /* frequency */
3073 DiaDimItem(dia, DALC_DISTRIBUTION_L); /* random */
3074 DiaDimItem(dia, DALC_DISTRIBUTION);
3075 DiaNoEditControl(dia, DALC_DISTRIBUTION);
3076 DiaDimItem(dia, DALC_STRENGTHWEAK); /* strength */
3077 DiaDimItem(dia, DALC_STRENGTHNORM);
3078 DiaDimItem(dia, DALC_STRENGTHSTRONG);
3079 DiaDimItem(dia, DALC_PHASELOW); /* level */
3080 DiaDimItem(dia, DALC_PHASEHIGH);
3081 DiaDimItem(dia, DALC_PHASEUNDEF);
3082 DiaDimItem(dia, DALC_DURATION_L); /* duration */
3083 DiaDimItem(dia, DALC_DURATION);
3084 DiaNoEditControl(dia, DALC_DURATION);
3085 DiaDimItem(dia, DALC_ADDPHASE); /* add/delete */
3086 DiaDimItem(dia, DALC_DELPHASE);
3087 DiaDimItem(dia, DALC_PHASELIST_L); /* list header */
3088 DiaDimItem(dia, DALC_CYCLES_L); /* cycles */
3089 DiaDimItem(dia, DALC_CYCLES);
3090 DiaNoEditControl(dia, DALC_CYCLES);
3091 DiaUnDimItem(dia, DALC_FREQPERIOD_L); /* freq/per */
3092 DiaUnDimItem(dia, DALC_FREQPERIOD);
3093 DiaEditControl(dia, DALC_FREQPERIOD);
3094
3095 /* loop until done */
3096 phases = 0;
3097 for(;;)
3098 {
3099 itemHit = DiaNextHit(dia);
3100 if (itemHit == OK || itemHit == CANCEL) break;
3101 if (itemHit == DALC_FREQUENCY || itemHit == DALC_PERIOD || itemHit == DALC_CUSTOM)
3102 {
3103 DiaSetControl(dia, DALC_FREQUENCY, 0);
3104 DiaSetControl(dia, DALC_PERIOD, 0);
3105 DiaSetControl(dia, DALC_CUSTOM, 0);
3106 DiaSetControl(dia, itemHit, 1);
3107 if (itemHit == DALC_CUSTOM)
3108 {
3109 DiaUnDimItem(dia, DALC_DISTRIBUTION_L); /* random */
3110 DiaUnDimItem(dia, DALC_DISTRIBUTION);
3111 DiaEditControl(dia, DALC_DISTRIBUTION);
3112 DiaUnDimItem(dia, DALC_STRENGTHWEAK); /* strength */
3113 DiaUnDimItem(dia, DALC_STRENGTHNORM);
3114 DiaUnDimItem(dia, DALC_STRENGTHSTRONG);
3115 DiaUnDimItem(dia, DALC_PHASELOW); /* level */
3116 DiaUnDimItem(dia, DALC_PHASEHIGH);
3117 DiaUnDimItem(dia, DALC_PHASEUNDEF);
3118 DiaUnDimItem(dia, DALC_DURATION_L); /* duration */
3119 DiaUnDimItem(dia, DALC_DURATION);
3120 DiaEditControl(dia, DALC_DURATION);
3121 DiaUnDimItem(dia, DALC_ADDPHASE); /* add/delete */
3122 DiaUnDimItem(dia, DALC_DELPHASE);
3123 DiaUnDimItem(dia, DALC_PHASELIST_L); /* list header */
3124 DiaUnDimItem(dia, DALC_CYCLES_L); /* cycles */
3125 DiaUnDimItem(dia, DALC_CYCLES);
3126 DiaEditControl(dia, DALC_CYCLES);
3127 DiaDimItem(dia, DALC_FREQPERIOD_L); /* freq/per */
3128 DiaDimItem(dia, DALC_FREQPERIOD);
3129 DiaNoEditControl(dia, DALC_FREQPERIOD);
3130 } else
3131 {
3132 DiaDimItem(dia, DALC_DISTRIBUTION_L); /* random */
3133 DiaDimItem(dia, DALC_DISTRIBUTION);
3134 DiaNoEditControl(dia, DALC_DISTRIBUTION);
3135 DiaDimItem(dia, DALC_STRENGTHWEAK); /* strength */
3136 DiaDimItem(dia, DALC_STRENGTHNORM);
3137 DiaDimItem(dia, DALC_STRENGTHSTRONG);
3138 DiaDimItem(dia, DALC_PHASELOW); /* level */
3139 DiaDimItem(dia, DALC_PHASEHIGH);
3140 DiaDimItem(dia, DALC_PHASEUNDEF);
3141 DiaDimItem(dia, DALC_DURATION_L); /* duration */
3142 DiaDimItem(dia, DALC_DURATION);
3143 DiaNoEditControl(dia, DALC_DURATION);
3144 DiaDimItem(dia, DALC_ADDPHASE); /* add/delete */
3145 DiaDimItem(dia, DALC_DELPHASE);
3146 DiaDimItem(dia, DALC_PHASELIST_L); /* list header */
3147 DiaDimItem(dia, DALC_CYCLES_L); /* cycles */
3148 DiaDimItem(dia, DALC_CYCLES);
3149 DiaNoEditControl(dia, DALC_CYCLES);
3150 DiaUnDimItem(dia, DALC_FREQPERIOD_L); /* freq/per */
3151 DiaUnDimItem(dia, DALC_FREQPERIOD);
3152 DiaEditControl(dia, DALC_FREQPERIOD);
3153 }
3154 continue;
3155 }
3156 if (itemHit == DALC_STRENGTHWEAK || itemHit == DALC_STRENGTHNORM ||
3157 itemHit == DALC_STRENGTHSTRONG)
3158 {
3159 DiaSetControl(dia, DALC_STRENGTHWEAK, 0);
3160 DiaSetControl(dia, DALC_STRENGTHNORM, 0);
3161 DiaSetControl(dia, DALC_STRENGTHSTRONG, 0);
3162 DiaSetControl(dia, itemHit, 1);
3163 continue;
3164 }
3165 if (itemHit == DALC_PHASELOW || itemHit == DALC_PHASEHIGH ||
3166 itemHit == DALC_PHASEUNDEF)
3167 {
3168 DiaSetControl(dia, DALC_PHASELOW, 0);
3169 DiaSetControl(dia, DALC_PHASEHIGH, 0);
3170 DiaSetControl(dia, DALC_PHASEUNDEF, 0);
3171 DiaSetControl(dia, itemHit, 1);
3172 continue;
3173 }
3174 if (itemHit == DALC_ADDPHASE)
3175 {
3176 /* add phase */
3177 if (phases >= MAXPHASES) continue;
3178 line = DiaGetText(dia, DALC_DURATION);
3179 durval[phases] = (float)eatof(line);
3180 if (DiaGetControl(dia, DALC_PHASELOW) != 0) levval[phases] = 0; else
3181 if (DiaGetControl(dia, DALC_PHASEHIGH) != 0) levval[phases] = 1; else
3182 levval[phases] = 2;
3183 phases++;
3184 sim_writephases(durval, levval, phases, dia);
3185 continue;
3186 }
3187 if (itemHit == DALC_DELPHASE)
3188 {
3189 /* delete phase */
3190 if (phases <= 0) continue;
3191 j = DiaGetCurLine(dia, DALC_PHASELIST);
3192 for(i=j; i<phases; i++)
3193 {
3194 durval[i] = durval[i+1];
3195 levval[i] = levval[i+1];
3196 }
3197 phases--;
3198 sim_writephases(durval, levval, phases, dia);
3199 continue;
3200 }
3201 }
3202 retval = 0;
3203 if (itemHit == OK && DiaGetControl(dia, DALC_FREQUENCY) != 0)
3204 {
3205 paramstart[0] = x_("frequency");
3206 paramstart[1] = us_putintoinfstr(DiaGetText(dia, DALC_FREQPERIOD));
3207 retval = 2;
3208 } else if (itemHit == OK && DiaGetControl(dia, DALC_PERIOD) != 0)
3209 {
3210 paramstart[0] = x_("period");
3211 paramstart[1] = us_putintoinfstr(DiaGetText(dia, DALC_FREQPERIOD));
3212 retval = 2;
3213 } else if (itemHit == OK && DiaGetControl(dia, DALC_CUSTOM) != 0)
3214 {
3215 paramstart[0] = x_("custom");
3216 paramstart[1] = us_putintoinfstr(DiaGetText(dia, DALC_DISTRIBUTION));
3217 if (DiaGetControl(dia, DALC_STRENGTHWEAK) != 0) paramstart[2] = x_("1"); else
3218 if (DiaGetControl(dia, DALC_STRENGTHNORM) != 0) paramstart[2] = x_("2"); else
3219 paramstart[2] = x_("3");
3220 paramstart[3] = us_putintoinfstr(DiaGetText(dia, DALC_CYCLES));
3221 retval = 4;
3222 if (first == 0) for(i=0; i<MAXPHASES; i++) retdur[i] = 0;
3223 first++;
3224 for(i=0; i<phases; i++)
3225 {
3226 if (retdur[i] != 0) efree(retdur[i]);
3227 retdur[i] = (CHAR *)emalloc(50 * SIZEOFCHAR, sim_tool->cluster);
3228 if (retdur[i] == 0) break;
3229 (void)esnprintf(retdur[i], 50, x_("%e"), durval[i]);
3230 paramstart[retval++] = (CHAR *)(levval[i]==0 ? x_("low") : (levval[i]==1 ? x_("high") : x_("undefined")));
3231 paramstart[retval++] = retdur[i];
3232 }
3233 }
3234 DiaDoneDialog(dia);
3235 return(retval);
3236 }
3237
sim_writephases(float durval[],INTBIG levval[],INTBIG phases,void * dia)3238 void sim_writephases(float durval[], INTBIG levval[], INTBIG phases, void *dia)
3239 {
3240 INTBIG i;
3241 CHAR lne[50];
3242
3243 DiaLoadTextDialog(dia, DALC_PHASELIST, DiaNullDlogList, DiaNullDlogItem, DiaNullDlogDone, -1);
3244 for(i=0; i<phases; i++)
3245 {
3246 (void)esnprintf(lne, 50, _("%s for %e"),
3247 (levval[i]==0 ? _("low") : (levval[i]==1 ? _("high") : _("undefined"))), durval[i]);
3248 DiaStuffLine(dia, DALC_PHASELIST, lne);
3249 }
3250 if (phases <= 0) DiaSelectLine(dia, DALC_PHASELIST, -1); else DiaSelectLine(dia, DALC_PHASELIST, 0);
3251 }
3252
3253 /* SPICE Options */
3254 static DIALOGITEM sim_spiceoptdialogitems[] =
3255 {
3256 /* 1 */ {0, {48,420,72,480}, BUTTON, N_("OK")},
3257 /* 2 */ {0, {8,420,32,480}, BUTTON, N_("Cancel")},
3258 /* 3 */ {0, {104,8,120,224}, POPUP, x_("")},
3259 /* 4 */ {0, {8,120,24,223}, POPUP, x_("")},
3260 /* 5 */ {0, {588,216,604,375}, RADIO, N_("Use Model from File:")},
3261 /* 6 */ {0, {564,216,580,426}, RADIO, N_("Derive Model from Circuitry")},
3262 /* 7 */ {0, {32,120,48,164}, POPUP, x_("1")},
3263 /* 8 */ {0, {588,384,604,451}, BUTTON, N_("Browse")},
3264 /* 9 */ {0, {612,224,644,480}, EDITTEXT, x_("")},
3265 /* 10 */ {0, {32,240,48,372}, CHECK, N_("Use Node Names")},
3266 /* 11 */ {0, {8,240,24,359}, CHECK, N_("Use Parasitics")},
3267 /* 12 */ {0, {8,8,24,117}, MESSAGE, N_("SPICE Engine:")},
3268 /* 13 */ {0, {32,8,48,117}, MESSAGE, N_("SPICE Level:")},
3269 /* 14 */ {0, {352,8,368,192}, RADIO, N_("Use Built-in Header Cards")},
3270 /* 15 */ {0, {400,8,416,204}, RADIO, N_("Use Header Cards from File:")},
3271 /* 16 */ {0, {400,208,432,472}, EDITTEXT, x_("")},
3272 /* 17 */ {0, {448,8,464,132}, RADIO, N_("No Trailer Cards")},
3273 /* 18 */ {0, {496,8,512,204}, RADIO, N_("Include Trailer from File:")},
3274 /* 19 */ {0, {496,208,528,472}, EDITTEXT, x_("")},
3275 /* 20 */ {0, {208,8,224,281}, MESSAGE, x_("")},
3276 /* 21 */ {0, {416,36,432,204}, BUTTON, N_("Browse Header Card File")},
3277 /* 22 */ {0, {512,36,528,204}, BUTTON, N_("Browse Trailer Card File")},
3278 /* 23 */ {0, {564,8,644,206}, SCROLL, x_("")},
3279 /* 24 */ {0, {544,8,560,80}, MESSAGE, N_("For Cell:")},
3280 /* 25 */ {0, {352,196,368,480}, BUTTON, N_("Edit Built-in Headers for Technology/Level")},
3281 /* 26 */ {0, {200,8,201,480}, DIVIDELINE, x_("")},
3282 /* 27 */ {0, {536,8,537,480}, DIVIDELINE, x_("")},
3283 /* 28 */ {0, {232,72,312,266}, SCROLL, x_("")},
3284 /* 29 */ {0, {232,8,248,68}, MESSAGE, N_("Layer:")},
3285 /* 30 */ {0, {232,272,248,364}, MESSAGE, N_("Resistance:")},
3286 /* 31 */ {0, {256,272,272,364}, MESSAGE, N_("Capacitance:")},
3287 /* 32 */ {0, {280,272,296,364}, MESSAGE, N_("Edge Cap:")},
3288 /* 33 */ {0, {232,372,248,472}, EDITTEXT, x_("")},
3289 /* 34 */ {0, {256,372,272,472}, EDITTEXT, x_("")},
3290 /* 35 */ {0, {280,372,296,472}, EDITTEXT, x_("")},
3291 /* 36 */ {0, {320,8,336,124}, MESSAGE, N_("Min. Resistance:")},
3292 /* 37 */ {0, {320,128,336,216}, EDITTEXT, x_("")},
3293 /* 38 */ {0, {320,240,336,380}, MESSAGE, N_("Min. Capacitance:")},
3294 /* 39 */ {0, {320,384,336,472}, EDITTEXT, x_("")},
3295 /* 40 */ {0, {56,120,72,224}, POPUP, x_("")},
3296 /* 41 */ {0, {56,240,72,408}, CHECK, N_("Force Global VDD/GND")},
3297 /* 42 */ {0, {176,8,192,176}, MESSAGE, N_("SPICE primitive set:")},
3298 /* 43 */ {0, {176,180,192,408}, POPUP, x_("")},
3299 /* 44 */ {0, {128,60,144,480}, MESSAGE, x_("")},
3300 /* 45 */ {0, {128,8,144,56}, MESSAGE, N_("Run:")},
3301 /* 46 */ {0, {152,60,168,480}, EDITTEXT, x_("")},
3302 /* 47 */ {0, {152,8,168,56}, MESSAGE, N_("With:")},
3303 /* 48 */ {0, {80,240,96,408}, CHECK, N_("Use Cell Parameters")},
3304 /* 49 */ {0, {376,8,392,288}, RADIO, N_("Use Header Cards with extension:")},
3305 /* 50 */ {0, {376,296,392,392}, EDITTEXT, x_("")},
3306 /* 51 */ {0, {472,8,488,288}, RADIO, N_("Use Trailer Cards with extension:")},
3307 /* 52 */ {0, {472,296,488,392}, EDITTEXT, x_("")},
3308 /* 53 */ {0, {344,8,345,480}, DIVIDELINE, x_("")},
3309 /* 54 */ {0, {104,240,120,456}, CHECK, N_("Write Trans Sizes in Lambda")},
3310 /* 55 */ {0, {56,8,72,117}, MESSAGE, N_("Output format:")}
3311 };
3312 static DIALOG sim_spiceoptdialog = {{50,75,703,565}, N_("SPICE Options"), 0, 55, sim_spiceoptdialogitems, 0, 0};
3313
3314 /* special items for the "SPICE options" dialog: */
3315 #define DSPO_AFTERWRITING 3 /* Action after writing deck (popup) */
3316 #define DSPO_SPICETYPE 4 /* Spice type (2, 3, H, P) (popup) */
3317 #define DSPO_MODELSFROMFILE 5 /* Use models from file (radio) */
3318 #define DSPO_MODELSFROMCIRC 6 /* Derive models from circuitry (radio) */
3319 #define DSPO_SPICELEVEL 7 /* Spice level (popup) */
3320 #define DSPO_SETMODELFILE 8 /* Set model file (button) */
3321 #define DSPO_MODELFILE 9 /* Model file (edit text) */
3322 #define DSPO_NODENAMES 10 /* Use node names (check) */
3323 #define DSPO_PARASITICS 11 /* Use parasitics (check) */
3324 #define DSPO_USEOWNHEADERS 14 /* Use built-in header cards (radio) */
3325 #define DSPO_USEFILEHEADERS 15 /* Use header cards from file (radio) */
3326 #define DSPO_HEADERFILE 16 /* Header card file (edit text) */
3327 #define DSPO_NOTRAILERS 17 /* No trailer cards (radio) */
3328 #define DSPO_FILETRAILERS 18 /* Trailer cards from file (radio) */
3329 #define DSPO_TRAILERFILE 19 /* Trailer card file (edit text) */
3330 #define DSPO_TECHNAME 20 /* Technology name (stat text) */
3331 #define DSPO_SETHEADERFILE 21 /* Set header card file (button) */
3332 #define DSPO_SETTRAILERFILE 22 /* Set trailer card file (button) */
3333 #define DSPO_CELLLIST 23 /* Cell list (scroll) */
3334 #define DSPO_EDITHEADERS 25 /* Edit built-in header cards (button) */
3335 #define DSPO_LAYERLIST 28 /* Layer list (scroll) */
3336 #define DSPO_LAYERRESISTANCE 33 /* Layer resistance (edit text) */
3337 #define DSPO_LAYERCAPACITANCE 34 /* Layer capacitance (edit text) */
3338 #define DSPO_LAYERECAPACITANCE 35 /* Layer edge capacitance (edit text) */
3339 #define DSPO_MINRESISTANCE 37 /* Minimum resistance (edit text) */
3340 #define DSPO_MINCAPACITANCE 39 /* Minimum capacitance (edit text) */
3341 #define DSPO_OUTPUTFORMAT 40 /* Form of output (popup) */
3342 #define DSPO_GLOBALPG 41 /* Use global Power and Ground (check) */
3343 #define DSPO_PRIMS 43 /* Name of SPICE primitive set (popup) */
3344 #define DSPO_RUNCOMMAND 44 /* SPICE command to execute (stat text) */
3345 #define DSPO_RUNCOMMAND_L 45 /* SPICE command to execute label (stat text) */
3346 #define DSPO_RUNARGS 46 /* SPICE command arguments (edit text) */
3347 #define DSPO_RUNARGS_L 47 /* SPICE command arguments label (stat text) */
3348 #define DSPO_USECELLPARAMS 48 /* Use Cell Parameters (check) */
3349 #define DSPO_USEEXTHEADERS 49 /* Use header cards with extension (button) */
3350 #define DSPO_EXTHEADEREXT 50 /* Extension to use for header cards (edit text) */
3351 #define DSPO_EXTTRAILERFILE 51 /* Use trailer cards with extension (button) */
3352 #define DSPO_EXTTRAILEREXT 52 /* Extension to use for trailer cards (edit text) */
3353 #define DSPO_WRITELAMBDA 54 /* Write transistors sizes in lambdas */
3354
sim_spicedlog(void)3355 void sim_spicedlog(void)
3356 {
3357 REGISTER INTBIG itemHit, i, j, k, l, spice_state, newspice_state, oldplease,
3358 level, execute, spicepartcount;
3359 INTBIG dummy;
3360 BOOLEAN reschanged, capchanged, ecapchanged, minreschanged, mincapchanged, canexecute;
3361 CHAR *subparams[3], *pt, header[200], *dummyfile[1], floatconv[30], *newlang[6],
3362 **filelist, **spicepartlist, *runargs;
3363 static CHAR *formatnames[6] = {N_("Spice 2"), N_("Spice 3"), N_("HSpice"), N_("PSpice"),
3364 N_("Gnucap"), N_("SmartSpice")};
3365 static CHAR *outputformats[3] = {N_("Standard"), N_("Raw"), N_("Raw/Smart")};
3366 static CHAR *levelnames[3] = {x_("1"), x_("2"), x_("3")};
3367 static CHAR *executenames[5] = {N_("Don't Run SPICE"), N_("Run SPICE"), N_("Run SPICE Quietly"),
3368 N_("Run SPICE, Read Output"), N_("Run SPICE Quietly, Read Output")};
3369 static CHAR qual[50];
3370 float *res, *cap, *ecap, minres, mincap, v;
3371 REGISTER VARIABLE *var, *varres, *varcap, *varecap;
3372 REGISTER NODEPROTO *np;
3373 REGISTER WINDOWPART *w;
3374 REGISTER TECHNOLOGY *curtech;
3375 REGISTER EDITOR *ed;
3376 REGISTER void *infstr, *dia;
3377
3378 /* Display the SPICE options dialog box */
3379 dia = DiaInitDialog(&sim_spiceoptdialog);
3380 if (dia == 0) return;
3381 for(i=0; i<5; i++) newlang[i] = TRANSLATE(executenames[i]);
3382 DiaSetPopup(dia, DSPO_AFTERWRITING, 5, newlang);
3383 for(i=0; i<6; i++) newlang[i] = TRANSLATE(formatnames[i]);
3384 DiaSetPopup(dia, DSPO_SPICETYPE, 6, newlang);
3385 for(i=0; i<3; i++) newlang[i] = TRANSLATE(levelnames[i]);
3386 DiaSetPopup(dia, DSPO_SPICELEVEL, 3, newlang);
3387 for(i=0; i<3; i++) newlang[i] = TRANSLATE(outputformats[i]);
3388 DiaSetPopup(dia, DSPO_OUTPUTFORMAT, 3, newlang);
3389
3390 /* see which technology to describe */
3391 curtech = defschematictechnology(el_curtech);
3392
3393 /* state of the execute flag */
3394 canexecute = graphicshas(CANRUNPROCESS);
3395 execute = 3;
3396 if (canexecute)
3397 {
3398 DiaUnDimItem(dia, DSPO_AFTERWRITING);
3399 DiaUnDimItem(dia, DSPO_RUNCOMMAND);
3400 DiaUnDimItem(dia, DSPO_RUNCOMMAND_L);
3401 DiaUnDimItem(dia, DSPO_RUNARGS);
3402 DiaUnDimItem(dia, DSPO_RUNARGS_L);
3403 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_dontrunkey);
3404 if (var != NOVARIABLE)
3405 {
3406 switch (var->addr)
3407 {
3408 case SIMRUNNO: execute = 0; break;
3409 case SIMRUNYES: execute = 1; break;
3410 case SIMRUNYESQ: execute = 2; break;
3411 case SIMRUNYESPARSE: execute = 3; break;
3412 case SIMRUNYESQPARSE: execute = 4; break;
3413 }
3414 }
3415 DiaSetPopupEntry(dia, DSPO_AFTERWRITING, execute);
3416 pt = egetenv(x_("ELECTRIC_SPICELOC"));
3417 if (pt == NULL) pt = SPICELOC;
3418 DiaSetText(dia, DSPO_RUNCOMMAND, pt);
3419 var = getvalkey((INTBIG)sim_tool, VTOOL, VSTRING, sim_spice_runargskey);
3420 if (var == NOVARIABLE) runargs = x_("%.spi"); else runargs = (CHAR *)var->addr;
3421 DiaSetText(dia, DSPO_RUNARGS, runargs);
3422 } else
3423 {
3424 DiaDimItem(dia, DSPO_AFTERWRITING);
3425 DiaDimItem(dia, DSPO_RUNCOMMAND);
3426 DiaDimItem(dia, DSPO_RUNCOMMAND_L);
3427 DiaDimItem(dia, DSPO_RUNARGS);
3428 DiaDimItem(dia, DSPO_RUNARGS_L);
3429 }
3430
3431 /* get the spice level */
3432 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_spice_levelkey);
3433 if (var == NOVARIABLE) level = 1; else level = var->addr;
3434 DiaSetPopupEntry(dia, DSPO_SPICELEVEL, level-1);
3435
3436 /* get miscellaneous state */
3437 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_spice_statekey);
3438 if (var != NOVARIABLE) spice_state = var->addr; else spice_state = 0;
3439 if ((spice_state&SPICENODENAMES) != 0) DiaSetControl(dia, DSPO_NODENAMES, 1);
3440 if ((spice_state&SPICERESISTANCE) != 0) DiaSetControl(dia, DSPO_PARASITICS, 1);
3441 if ((spice_state&SPICEGLOBALPG) != 0) DiaSetControl(dia, DSPO_GLOBALPG, 1);
3442 if ((spice_state&SPICECELLPARAM) != 0) DiaSetControl(dia, DSPO_USECELLPARAMS, 1);
3443 if ((spice_state&SPICEUSELAMBDAS) != 0) DiaSetControl(dia, DSPO_WRITELAMBDA, 1);
3444 switch (spice_state & SPICETYPE)
3445 {
3446 case SPICE2:
3447 DiaSetPopupEntry(dia, DSPO_SPICETYPE, 0);
3448 DiaSetControl(dia, DSPO_NODENAMES, 0);
3449 DiaDimItem(dia, DSPO_NODENAMES);
3450 DiaSetControl(dia, DSPO_GLOBALPG, 0);
3451 DiaDimItem(dia, DSPO_GLOBALPG);
3452 break;
3453 case SPICE3:
3454 DiaSetPopupEntry(dia, DSPO_SPICETYPE, 1);
3455 DiaUnDimItem(dia, DSPO_NODENAMES);
3456 DiaSetControl(dia, DSPO_GLOBALPG, 0);
3457 DiaDimItem(dia, DSPO_GLOBALPG);
3458 break;
3459 case SPICEHSPICE:
3460 DiaSetPopupEntry(dia, DSPO_SPICETYPE, 2);
3461 DiaUnDimItem(dia, DSPO_NODENAMES);
3462 DiaUnDimItem(dia, DSPO_GLOBALPG);
3463 break;
3464 case SPICEPSPICE:
3465 DiaSetPopupEntry(dia, DSPO_SPICETYPE, 3);
3466 DiaUnDimItem(dia, DSPO_NODENAMES);
3467 DiaUnDimItem(dia, DSPO_GLOBALPG);
3468 break;
3469 case SPICEGNUCAP:
3470 DiaSetPopupEntry(dia, DSPO_SPICETYPE, 4);
3471 DiaSetControl(dia, DSPO_NODENAMES, 0);
3472 DiaDimItem(dia, DSPO_NODENAMES);
3473 DiaSetControl(dia, DSPO_GLOBALPG, 0);
3474 DiaDimItem(dia, DSPO_GLOBALPG);
3475 break;
3476 case SPICESMARTSPICE:
3477 DiaSetPopupEntry(dia, DSPO_SPICETYPE, 5);
3478 DiaUnDimItem(dia, DSPO_NODENAMES);
3479 DiaUnDimItem(dia, DSPO_GLOBALPG);
3480 break;
3481 }
3482
3483 /* get the output format */
3484 switch (spice_state&SPICEOUTPUT)
3485 {
3486 case SPICEOUTPUTNORM: DiaSetPopupEntry(dia, DSPO_OUTPUTFORMAT, 0); break;
3487 case SPICEOUTPUTRAW: DiaSetPopupEntry(dia, DSPO_OUTPUTFORMAT, 1); break;
3488 case SPICEOUTPUTRAWSMART: DiaSetPopupEntry(dia, DSPO_OUTPUTFORMAT, 2); break;
3489 }
3490
3491 /* get model header cards */
3492 DiaDimItem(dia, DSPO_HEADERFILE);
3493 DiaDimItem(dia, DSPO_EXTHEADEREXT);
3494 infstr = initinfstr();
3495 formatinfstr(infstr, _("For technology: %s"), curtech->techname);
3496 DiaSetText(dia, DSPO_TECHNAME, returninfstr(infstr));
3497 var = getval((INTBIG)curtech, VTECHNOLOGY, VSTRING, x_("SIM_spice_model_file"));
3498 if (var == NOVARIABLE) DiaSetControl(dia, DSPO_USEOWNHEADERS, 1); else
3499 {
3500 pt = (CHAR *)var->addr;
3501 if (estrncmp(pt, x_(":::::"), 5) == 0)
3502 {
3503 DiaUnDimItem(dia, DSPO_EXTHEADEREXT);
3504 DiaSetText(dia, DSPO_EXTHEADEREXT, &pt[5]);
3505 DiaSetControl(dia, DSPO_USEEXTHEADERS, 1);
3506 } else
3507 {
3508 DiaUnDimItem(dia, DSPO_HEADERFILE);
3509 DiaSetText(dia, DSPO_HEADERFILE, pt);
3510 DiaSetControl(dia, DSPO_USEFILEHEADERS, 1);
3511 }
3512 }
3513
3514 /* get trailer cards */
3515 DiaDimItem(dia, DSPO_TRAILERFILE);
3516 DiaDimItem(dia, DSPO_EXTTRAILEREXT);
3517 var = getval((INTBIG)curtech, VTECHNOLOGY, VSTRING, x_("SIM_spice_trailer_file"));
3518 if (var == NOVARIABLE) DiaSetControl(dia, DSPO_NOTRAILERS, 1); else
3519 {
3520 pt = (CHAR *)var->addr;
3521 if (estrncmp(pt, x_(":::::"), 5) == 0)
3522 {
3523 DiaUnDimItem(dia, DSPO_EXTTRAILEREXT);
3524 DiaSetText(dia, DSPO_EXTTRAILEREXT, &pt[5]);
3525 DiaSetControl(dia, DSPO_EXTTRAILERFILE, 1);
3526 } else
3527 {
3528 DiaUnDimItem(dia, DSPO_TRAILERFILE);
3529 DiaSetText(dia, DSPO_TRAILERFILE, pt);
3530 DiaSetControl(dia, DSPO_FILETRAILERS, 1);
3531 }
3532 }
3533
3534 /* list of cells for model description files */
3535 DiaInitTextDialog(dia, DSPO_CELLLIST, topofcells, nextcells, DiaNullDlogDone,
3536 0, SCSELMOUSE|SCSELKEY|SCREPORT);
3537 for(np = el_curlib->firstnodeproto; np != NONODEPROTO; np = np->nextnodeproto)
3538 {
3539 np->temp1 = 0;
3540 var = getval((INTBIG)np, VNODEPROTO, VSTRING, x_("SIM_spice_behave_file"));
3541 if (var != NOVARIABLE)
3542 (void)allocstring((CHAR **)&np->temp1, (CHAR *)var->addr, el_tempcluster);
3543 }
3544 pt = DiaGetScrollLine(dia, DSPO_CELLLIST, DiaGetCurLine(dia, DSPO_CELLLIST));
3545 DiaSetControl(dia, DSPO_MODELSFROMCIRC, 1);
3546 DiaSetControl(dia, DSPO_MODELSFROMFILE, 0);
3547 DiaDimItem(dia, DSPO_MODELFILE);
3548 np = getnodeproto(pt);
3549 if (np != NONODEPROTO)
3550 {
3551 var = getval((INTBIG)np, VNODEPROTO, VSTRING, x_("SIM_spice_behave_file"));
3552 if (var != NOVARIABLE)
3553 {
3554 DiaSetControl(dia, DSPO_MODELSFROMCIRC, 0);
3555 DiaSetControl(dia, DSPO_MODELSFROMFILE, 1);
3556 DiaUnDimItem(dia, DSPO_MODELFILE);
3557 DiaSetText(dia, DSPO_MODELFILE, (CHAR *)var->addr);
3558 }
3559 }
3560
3561 /* setup the SPICE primitives */
3562 j = filesindirectory(el_libdir, &filelist);
3563 spicepartcount = 0;
3564 for(i=0; i<j; i++)
3565 {
3566 pt = filelist[i];
3567 l = estrlen(pt);
3568 if (namesamen(pt, x_("spiceparts"), 10) != 0) continue;
3569 if (namesame(&pt[l-4], x_(".mac")) != 0) continue;
3570 spicepartcount++;
3571 }
3572 if (spicepartcount > 0)
3573 {
3574 k = 0;
3575 spicepartlist = (CHAR **)emalloc(spicepartcount * (sizeof (CHAR *)), el_tempcluster);
3576 if (spicepartlist == 0) return;
3577 spicepartcount = 0;
3578 for(i=0; i<j; i++)
3579 {
3580 pt = filelist[i];
3581 l = estrlen(pt);
3582 if (namesamen(pt, x_("spiceparts"), 10) != 0) continue;
3583 if (namesame(&pt[l-4], x_(".mac")) != 0) continue;
3584 (void)allocstring(&spicepartlist[spicepartcount], pt, el_tempcluster);
3585 spicepartlist[spicepartcount][l-4] = 0;
3586 if (namesame(spicepartlist[spicepartcount], sim_spice_parts) == 0)
3587 k = spicepartcount;
3588 spicepartcount++;
3589 }
3590 DiaSetPopup(dia, DSPO_PRIMS, spicepartcount, spicepartlist);
3591 DiaSetPopupEntry(dia, DSPO_PRIMS, k);
3592 }
3593
3594 /* list of layers in this technology, with resistance, capacitance, etc. */
3595 DiaInitTextDialog(dia, DSPO_LAYERLIST, DiaNullDlogList, DiaNullDlogItem, DiaNullDlogDone,
3596 -1, SCSELMOUSE|SCREPORT);
3597 varres = getval((INTBIG)curtech, VTECHNOLOGY, VFLOAT|VISARRAY, x_("SIM_spice_resistance"));
3598 varcap = getval((INTBIG)curtech, VTECHNOLOGY, VFLOAT|VISARRAY, x_("SIM_spice_capacitance"));
3599 varecap = getval((INTBIG)curtech, VTECHNOLOGY, VFLOAT|VISARRAY, x_("SIM_spice_edge_capacitance"));
3600 res = (float *)emalloc(curtech->layercount * (sizeof (float)), el_tempcluster);
3601 cap = (float *)emalloc(curtech->layercount * (sizeof (float)), el_tempcluster);
3602 ecap = (float *)emalloc(curtech->layercount * (sizeof (float)), el_tempcluster);
3603 for(i=0; i<curtech->layercount; i++)
3604 {
3605 DiaStuffLine(dia, DSPO_LAYERLIST, layername(curtech, i));
3606 res[i] = cap[i] = ecap[i] = 0.0;
3607 if (varres != NOVARIABLE && i < getlength(varres))
3608 res[i] = ((float *)varres->addr)[i];
3609 if (varcap != NOVARIABLE && i < getlength(varcap))
3610 cap[i] = ((float *)varcap->addr)[i];
3611 if (varecap != NOVARIABLE && i < getlength(varecap))
3612 ecap[i] = ((float *)varecap->addr)[i];
3613 }
3614 DiaSelectLine(dia, DSPO_LAYERLIST, 0);
3615 esnprintf(floatconv, 30, x_("%g"), res[0]); DiaSetText(dia, DSPO_LAYERRESISTANCE, floatconv);
3616 esnprintf(floatconv, 30, x_("%g"), cap[0]); DiaSetText(dia, DSPO_LAYERCAPACITANCE, floatconv);
3617 esnprintf(floatconv, 30, x_("%g"), ecap[0]); DiaSetText(dia, DSPO_LAYERECAPACITANCE, floatconv);
3618 reschanged = capchanged = ecapchanged = minreschanged = mincapchanged = FALSE;
3619
3620 /* get minimum resistance and capacitances */
3621 var = getval((INTBIG)curtech, VTECHNOLOGY, VFLOAT, x_("SIM_spice_min_resistance"));
3622 if (var == NOVARIABLE) minres = 0.0; else
3623 minres = castfloat(var->addr);
3624 esnprintf(floatconv, 30, x_("%g"), minres); DiaSetText(dia, DSPO_MINRESISTANCE, floatconv);
3625 var = getval((INTBIG)curtech, VTECHNOLOGY, VFLOAT, x_("SIM_spice_min_capacitance"));
3626 if (var == NOVARIABLE) mincap = 0.0; else
3627 mincap = castfloat(var->addr);
3628 esnprintf(floatconv, 30, x_("%g"), mincap); DiaSetText(dia, DSPO_MINCAPACITANCE, floatconv);
3629
3630 for(;;)
3631 {
3632 itemHit = DiaNextHit(dia);
3633 if (itemHit == OK || itemHit == CANCEL || itemHit == DSPO_EDITHEADERS) break;
3634
3635 if (itemHit == DSPO_SPICETYPE)
3636 {
3637 /* file format button */
3638 i = DiaGetPopupEntry(dia, DSPO_SPICETYPE);
3639 if (i != 0/*Spice2*/ && i != 4/*Gnucap*/) DiaUnDimItem(dia, DSPO_NODENAMES); else
3640 {
3641 DiaSetControl(dia, DSPO_NODENAMES, 0);
3642 DiaDimItem(dia, DSPO_NODENAMES);
3643 }
3644 if (i != 0/*Spice2*/ && i != 1/*Spice3*/ && i != 4/*Gnucap*/) DiaUnDimItem(dia, DSPO_GLOBALPG); else
3645 {
3646 DiaSetControl(dia, DSPO_GLOBALPG, 0);
3647 DiaDimItem(dia, DSPO_GLOBALPG);
3648 }
3649 continue;
3650 }
3651
3652 if (itemHit == DSPO_NODENAMES || itemHit == DSPO_PARASITICS ||
3653 itemHit == DSPO_GLOBALPG ||
3654 itemHit == DSPO_USECELLPARAMS || itemHit == DSPO_WRITELAMBDA)
3655 {
3656 /* check boxes */
3657 DiaSetControl(dia, itemHit, 1-DiaGetControl(dia, itemHit));
3658 continue;
3659 }
3660
3661 if (itemHit == DSPO_USEOWNHEADERS || itemHit == DSPO_USEFILEHEADERS ||
3662 itemHit == DSPO_USEEXTHEADERS)
3663 {
3664 /* header model cards button */
3665 DiaSetControl(dia, DSPO_USEOWNHEADERS, 0);
3666 DiaSetControl(dia, DSPO_USEFILEHEADERS, 0);
3667 DiaSetControl(dia, DSPO_USEEXTHEADERS, 0);
3668 DiaSetControl(dia, itemHit, 1);
3669 DiaDimItem(dia, DSPO_HEADERFILE);
3670 DiaDimItem(dia, DSPO_EXTHEADEREXT);
3671 if (itemHit == DSPO_USEFILEHEADERS)
3672 {
3673 DiaUnDimItem(dia, DSPO_HEADERFILE);
3674 } else if (itemHit == DSPO_USEEXTHEADERS)
3675 {
3676 DiaUnDimItem(dia, DSPO_EXTHEADEREXT);
3677 }
3678 continue;
3679 }
3680
3681 if (itemHit == DSPO_SETHEADERFILE)
3682 {
3683 /* select model cards */
3684 oldplease = el_pleasestop;
3685 infstr = initinfstr();
3686 addstringtoinfstr(infstr, x_("spice/"));
3687 addstringtoinfstr(infstr, _("SPICE Model File"));
3688 i = ttygetparam(returninfstr(infstr), &us_colorreadp, 1, subparams);
3689 el_pleasestop = oldplease;
3690 if (i != 0 && subparams[0][0] != 0)
3691 {
3692 DiaDimItem(dia, DSPO_EXTHEADEREXT);
3693 DiaUnDimItem(dia, DSPO_HEADERFILE);
3694 DiaSetText(dia, DSPO_HEADERFILE, subparams[0]);
3695 DiaSetControl(dia, DSPO_USEOWNHEADERS, 0);
3696 DiaSetControl(dia, DSPO_USEFILEHEADERS, 1);
3697 DiaSetControl(dia, DSPO_USEEXTHEADERS, 0);
3698 }
3699 continue;
3700 }
3701
3702 if (itemHit == DSPO_NOTRAILERS || itemHit == DSPO_FILETRAILERS ||
3703 itemHit == DSPO_EXTTRAILERFILE)
3704 {
3705 /* trailer cards button */
3706 DiaSetControl(dia, DSPO_NOTRAILERS, 0);
3707 DiaSetControl(dia, DSPO_FILETRAILERS, 0);
3708 DiaSetControl(dia, DSPO_EXTTRAILERFILE, 0);
3709 DiaSetControl(dia, itemHit, 1);
3710 DiaDimItem(dia, DSPO_TRAILERFILE);
3711 DiaDimItem(dia, DSPO_EXTTRAILEREXT);
3712 if (itemHit == DSPO_FILETRAILERS)
3713 {
3714 DiaUnDimItem(dia, DSPO_TRAILERFILE);
3715 } else if (itemHit == DSPO_EXTTRAILERFILE)
3716 {
3717 DiaUnDimItem(dia, DSPO_EXTTRAILEREXT);
3718 }
3719 continue;
3720 }
3721
3722 if (itemHit == DSPO_SETTRAILERFILE)
3723 {
3724 /* select trailer cards */
3725 oldplease = el_pleasestop;
3726 infstr = initinfstr();
3727 addstringtoinfstr(infstr, x_("spice/"));
3728 addstringtoinfstr(infstr, _("SPICE Trailer File"));
3729 i = ttygetparam(returninfstr(infstr), &us_colorreadp, 1, subparams);
3730 el_pleasestop = oldplease;
3731 if (i != 0 && subparams[0][0] != 0)
3732 {
3733 DiaUnDimItem(dia, DSPO_TRAILERFILE);
3734 DiaSetText(dia, DSPO_TRAILERFILE, subparams[0]);
3735 DiaDimItem(dia, DSPO_EXTTRAILEREXT);
3736 DiaSetControl(dia, DSPO_NOTRAILERS, 0);
3737 DiaSetControl(dia, DSPO_FILETRAILERS, 1);
3738 DiaSetControl(dia, DSPO_EXTTRAILERFILE, 0);
3739 }
3740 continue;
3741 }
3742
3743 if (itemHit == DSPO_LAYERLIST)
3744 {
3745 /* selection of layers */
3746 i = DiaGetCurLine(dia, DSPO_LAYERLIST);
3747 if (i < 0 || i >= curtech->layercount) continue;
3748 esnprintf(floatconv, 30, x_("%g"), res[i]); DiaSetText(dia, DSPO_LAYERRESISTANCE, floatconv);
3749 esnprintf(floatconv, 30, x_("%g"), cap[i]); DiaSetText(dia, DSPO_LAYERCAPACITANCE, floatconv);
3750 esnprintf(floatconv, 30, x_("%g"), ecap[i]); DiaSetText(dia, DSPO_LAYERECAPACITANCE, floatconv);
3751 continue;
3752 }
3753
3754 if (itemHit == DSPO_LAYERRESISTANCE)
3755 {
3756 i = DiaGetCurLine(dia, DSPO_LAYERLIST);
3757 if (i < 0 || i >= curtech->layercount) continue;
3758 v = (float)eatof(DiaGetText(dia, DSPO_LAYERRESISTANCE));
3759 if (!floatsequal(res[i], v)) reschanged = TRUE;
3760 res[i] = v;
3761 continue;
3762 }
3763 if (itemHit == DSPO_LAYERCAPACITANCE)
3764 {
3765 i = DiaGetCurLine(dia, DSPO_LAYERLIST);
3766 if (i < 0 || i >= curtech->layercount) continue;
3767 v = (float)eatof(DiaGetText(dia, DSPO_LAYERCAPACITANCE));
3768 if (!floatsequal(cap[i], v)) capchanged = TRUE;
3769 cap[i] = v;
3770 continue;
3771 }
3772 if (itemHit == DSPO_LAYERECAPACITANCE)
3773 {
3774 i = DiaGetCurLine(dia, DSPO_LAYERLIST);
3775 if (i < 0 || i >= curtech->layercount) continue;
3776 v = (float)eatof(DiaGetText(dia, DSPO_LAYERECAPACITANCE));
3777 if (!floatsequal(ecap[i], v)) ecapchanged = TRUE;
3778 ecap[i] = v;
3779 continue;
3780 }
3781 if (itemHit == DSPO_MINRESISTANCE)
3782 {
3783 v = (float)eatof(DiaGetText(dia, DSPO_MINRESISTANCE));
3784 if (!floatsequal(v, minres)) minreschanged = TRUE;
3785 continue;
3786 }
3787 if (itemHit == DSPO_MINCAPACITANCE)
3788 {
3789 v = (float)eatof(DiaGetText(dia, DSPO_MINCAPACITANCE));
3790 if (!floatsequal(v, mincap)) mincapchanged = TRUE;
3791 continue;
3792 }
3793
3794 if (itemHit == DSPO_CELLLIST)
3795 {
3796 /* selection of cells */
3797 DiaSetControl(dia, DSPO_MODELSFROMCIRC, 1);
3798 DiaSetControl(dia, DSPO_MODELSFROMFILE, 0);
3799 DiaSetText(dia, DSPO_MODELFILE, x_(""));
3800 pt = DiaGetScrollLine(dia, DSPO_CELLLIST, DiaGetCurLine(dia, DSPO_CELLLIST));
3801 np = getnodeproto(pt);
3802 if (np != NONODEPROTO && np->temp1 != 0)
3803 {
3804 DiaSetControl(dia, DSPO_MODELSFROMCIRC, 0);
3805 DiaSetControl(dia, DSPO_MODELSFROMFILE, 1);
3806 DiaSetText(dia, DSPO_MODELFILE, (CHAR *)np->temp1);
3807 }
3808 continue;
3809 }
3810
3811 if (itemHit == DSPO_MODELFILE)
3812 {
3813 /* changing a cell's model file */
3814 pt = DiaGetScrollLine(dia, DSPO_CELLLIST, DiaGetCurLine(dia, DSPO_CELLLIST));
3815 np = getnodeproto(pt);
3816 if (np != NONODEPROTO)
3817 {
3818 if (np->temp1 != 0) efree((CHAR *)np->temp1);
3819 (void)allocstring((CHAR **)&np->temp1, DiaGetText(dia, DSPO_MODELFILE), el_tempcluster);
3820 }
3821 continue;
3822 }
3823
3824 if (itemHit == DSPO_MODELSFROMCIRC || itemHit == DSPO_MODELSFROMFILE)
3825 {
3826 /* model for cell */
3827 pt = DiaGetScrollLine(dia, DSPO_CELLLIST, DiaGetCurLine(dia, DSPO_CELLLIST));
3828 np = getnodeproto(pt);
3829 DiaSetControl(dia, DSPO_MODELSFROMCIRC, 0);
3830 DiaSetControl(dia, DSPO_MODELSFROMFILE, 0);
3831 DiaSetControl(dia, itemHit, 1);
3832 if (itemHit == DSPO_MODELSFROMFILE)
3833 {
3834 DiaUnDimItem(dia, DSPO_MODELFILE);
3835 if (np != NONODEPROTO)
3836 {
3837 infstr = initinfstr();
3838 formatinfstr(infstr, x_("%s.spi"), np->protoname);
3839 pt = returninfstr(infstr);
3840 if (np->temp1 != 0) efree((CHAR *)np->temp1);
3841 (void)allocstring((CHAR **)&np->temp1, pt, el_tempcluster);
3842 DiaSetText(dia, DSPO_MODELFILE, pt);
3843 }
3844 } else
3845 {
3846 DiaSetText(dia, DSPO_MODELFILE, x_(""));
3847 DiaDimItem(dia, DSPO_MODELFILE);
3848 if (np != NONODEPROTO)
3849 {
3850 if (np->temp1 != 0) efree((CHAR *)np->temp1);
3851 np->temp1 = 0;
3852 }
3853 }
3854 continue;
3855 }
3856
3857 if (itemHit == DSPO_SETMODELFILE)
3858 {
3859 /* set model for cell */
3860 pt = DiaGetScrollLine(dia, DSPO_CELLLIST, DiaGetCurLine(dia, DSPO_CELLLIST));
3861 np = getnodeproto(pt);
3862 if (np == NONODEPROTO) continue;
3863 oldplease = el_pleasestop;
3864 infstr = initinfstr();
3865 addstringtoinfstr(infstr, x_("spice/"));
3866 addstringtoinfstr(infstr, _("Cell's Model File"));
3867 i = ttygetparam(returninfstr(infstr), &us_colorreadp, 1, subparams);
3868 el_pleasestop = oldplease;
3869 if (i != 0 && subparams[0][0] != 0)
3870 {
3871 DiaUnDimItem(dia, DSPO_MODELFILE);
3872 DiaSetText(dia, DSPO_MODELFILE, subparams[0]);
3873 if (np->temp1 != 0) efree((CHAR *)np->temp1);
3874 (void)allocstring((CHAR **)&np->temp1, subparams[0], el_tempcluster);
3875 DiaSetControl(dia, DSPO_MODELSFROMCIRC, 0);
3876 DiaSetControl(dia, DSPO_MODELSFROMFILE, 1);
3877 }
3878 continue;
3879 }
3880 }
3881
3882 if (itemHit != CANCEL) /* now update the values */
3883 {
3884 if (canexecute)
3885 {
3886 i = DiaGetPopupEntry(dia, DSPO_AFTERWRITING);
3887 if (i != execute)
3888 {
3889 switch (i)
3890 {
3891 case 0: execute = SIMRUNNO; break;
3892 case 1: execute = SIMRUNYES; break;
3893 case 2: execute = SIMRUNYESQ; break;
3894 case 3: execute = SIMRUNYESPARSE; break;
3895 case 4: execute = SIMRUNYESQPARSE; break;
3896 }
3897 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_dontrunkey, execute, VINTEGER);
3898 }
3899 pt = DiaGetText(dia, DSPO_RUNARGS);
3900 if (estrcmp(runargs, pt) != 0)
3901 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_runargskey,
3902 (INTBIG)pt, VSTRING);
3903 }
3904
3905 i = DiaGetPopupEntry(dia, DSPO_SPICELEVEL) + 1;
3906 if (i != level)
3907 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_levelkey, i, VINTEGER);
3908
3909 newspice_state = 0;
3910 if (DiaGetControl(dia, DSPO_NODENAMES) != 0) newspice_state |= SPICENODENAMES;
3911 if (DiaGetControl(dia, DSPO_PARASITICS) != 0) newspice_state |= SPICERESISTANCE;
3912 if (DiaGetControl(dia, DSPO_GLOBALPG) != 0) newspice_state |= SPICEGLOBALPG;
3913 if (DiaGetControl(dia, DSPO_USECELLPARAMS) != 0) newspice_state |= SPICECELLPARAM;
3914 if (DiaGetControl(dia, DSPO_WRITELAMBDA) != 0) newspice_state |= SPICEUSELAMBDAS;
3915 switch (DiaGetPopupEntry(dia, DSPO_SPICETYPE))
3916 {
3917 case 0: newspice_state |= SPICE2; break;
3918 case 1: newspice_state |= SPICE3; break;
3919 case 2: newspice_state |= SPICEHSPICE; break;
3920 case 3: newspice_state |= SPICEPSPICE; break;
3921 case 4: newspice_state |= SPICEGNUCAP; break;
3922 case 5: newspice_state |= SPICESMARTSPICE; break;
3923 }
3924 switch (DiaGetPopupEntry(dia, DSPO_OUTPUTFORMAT))
3925 {
3926 case 0: newspice_state |= SPICEOUTPUTNORM; break;
3927 case 1: newspice_state |= SPICEOUTPUTRAW; break;
3928 case 2: newspice_state |= SPICEOUTPUTRAWSMART; break;
3929 }
3930 if (newspice_state != spice_state)
3931 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_statekey, newspice_state, VINTEGER);
3932
3933 i = DiaGetPopupEntry(dia, DSPO_PRIMS);
3934 if (namesame(sim_spice_parts, spicepartlist[i]) != 0)
3935 {
3936 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_spice_partskey,
3937 (INTBIG)spicepartlist[i], VSTRING);
3938 }
3939
3940 var = getval((INTBIG)curtech, VTECHNOLOGY, VSTRING, x_("SIM_spice_model_file"));
3941 if (DiaGetControl(dia, DSPO_USEFILEHEADERS) != 0)
3942 {
3943 /* set model cards */
3944 pt = DiaGetText(dia, DSPO_HEADERFILE);
3945 if (var == NOVARIABLE || estrcmp(pt, (CHAR *)var->addr) != 0)
3946 {
3947 (void)setval((INTBIG)curtech, VTECHNOLOGY, x_("SIM_spice_model_file"),
3948 (INTBIG)pt, VSTRING);
3949 }
3950 } else if (DiaGetControl(dia, DSPO_USEEXTHEADERS) != 0)
3951 {
3952 /* set model extension */
3953 infstr = initinfstr();
3954 formatinfstr(infstr, x_(":::::%s"), DiaGetText(dia, DSPO_EXTHEADEREXT));
3955 pt = returninfstr(infstr);
3956 if (var == NOVARIABLE || estrcmp(pt, (CHAR *)var->addr) != 0)
3957 {
3958 (void)setval((INTBIG)curtech, VTECHNOLOGY, x_("SIM_spice_model_file"),
3959 (INTBIG)pt, VSTRING);
3960 }
3961 } else
3962 {
3963 /* remove model cards */
3964 if (var != NOVARIABLE)
3965 (void)delval((INTBIG)curtech, VTECHNOLOGY, x_("SIM_spice_model_file"));
3966 }
3967
3968 var = getval((INTBIG)curtech, VTECHNOLOGY, VSTRING, x_("SIM_spice_trailer_file"));
3969 if (DiaGetControl(dia, DSPO_FILETRAILERS) != 0)
3970 {
3971 /* set trailer cards */
3972 pt = DiaGetText(dia, DSPO_TRAILERFILE);
3973 if (var == NOVARIABLE || estrcmp(pt, (CHAR *)var->addr) != 0)
3974 {
3975 (void)setval((INTBIG)curtech, VTECHNOLOGY, x_("SIM_spice_trailer_file"),
3976 (INTBIG)pt, VSTRING);
3977 }
3978 } else if (DiaGetControl(dia, DSPO_EXTTRAILERFILE) != 0)
3979 {
3980 /* set trailer extension */
3981 infstr = initinfstr();
3982 formatinfstr(infstr, x_(":::::%s"), DiaGetText(dia, DSPO_EXTTRAILEREXT));
3983 pt = returninfstr(infstr);
3984 if (var == NOVARIABLE || estrcmp(pt, (CHAR *)var->addr) != 0)
3985 {
3986 (void)setval((INTBIG)curtech, VTECHNOLOGY, x_("SIM_spice_trailer_file"),
3987 (INTBIG)pt, VSTRING);
3988 }
3989 } else
3990 {
3991 /* remove trailer cards */
3992 if (var != NOVARIABLE)
3993 (void)delval((INTBIG)curtech, VTECHNOLOGY, x_("SIM_spice_trailer_file"));
3994 }
3995 for(np = el_curlib->firstnodeproto; np != NONODEPROTO; np = np->nextnodeproto)
3996 {
3997 var = getval((INTBIG)np, VNODEPROTO, VSTRING, x_("SIM_spice_behave_file"));
3998 if (var != NOVARIABLE)
3999 {
4000 if (np->temp1 == 0)
4001 (void)delval((INTBIG)np, VNODEPROTO, x_("SIM_spice_behave_file")); else
4002 {
4003 if (estrcmp((CHAR *)np->temp1, (CHAR *)var->addr) != 0)
4004 (void)setval((INTBIG)np, VNODEPROTO, x_("SIM_spice_behave_file"), (INTBIG)np->temp1, VSTRING);
4005 }
4006 } else if (np->temp1 != 0)
4007 (void)setval((INTBIG)np, VNODEPROTO, x_("SIM_spice_behave_file"), (INTBIG)np->temp1, VSTRING);
4008 if (np->temp1 != 0) efree((CHAR *)np->temp1);
4009 }
4010
4011 /* update layer resistance, capacitance, etc. */
4012 if (reschanged)
4013 setval((INTBIG)curtech, VTECHNOLOGY, x_("SIM_spice_resistance"),
4014 (INTBIG)res, VFLOAT|VISARRAY|(curtech->layercount << VLENGTHSH));
4015 if (capchanged)
4016 setval((INTBIG)curtech, VTECHNOLOGY, x_("SIM_spice_capacitance"),
4017 (INTBIG)cap, VFLOAT|VISARRAY|(curtech->layercount << VLENGTHSH));
4018 if (ecapchanged)
4019 setval((INTBIG)curtech, VTECHNOLOGY, x_("SIM_spice_edge_capacitance"),
4020 (INTBIG)ecap, VFLOAT|VISARRAY|(curtech->layercount << VLENGTHSH));
4021
4022 /* update minimum resistance and capacitance */
4023 if (minreschanged)
4024 {
4025 v = (float)eatof(DiaGetText(dia, DSPO_MINRESISTANCE));
4026 setval((INTBIG)curtech, VTECHNOLOGY, x_("SIM_spice_min_resistance"),
4027 castint(v), VFLOAT);
4028 }
4029 if (mincapchanged)
4030 {
4031 v = (float)eatof(DiaGetText(dia, DSPO_MINCAPACITANCE));
4032 setval((INTBIG)curtech, VTECHNOLOGY, x_("SIM_spice_min_capacitance"),
4033 castint(v), VFLOAT);
4034 }
4035 }
4036 DiaDoneDialog(dia);
4037 efree((CHAR *)res);
4038 efree((CHAR *)cap);
4039 efree((CHAR *)ecap);
4040 if (spicepartcount > 0)
4041 {
4042 for(i=0; i<spicepartcount; i++) efree((CHAR *)spicepartlist[i]);
4043 efree((CHAR *)spicepartlist);
4044 }
4045 if (itemHit == DSPO_EDITHEADERS)
4046 {
4047 /* now edit the model cards */
4048 esnprintf(qual, 50, x_("SIM_spice_header_level%ld"), level);
4049 esnprintf(header, 200, _("Level %ld SPICE Model cards for %s"), level, curtech->techname);
4050
4051 var = getval((INTBIG)curtech, VTECHNOLOGY, -1, qual);
4052 if (var == NOVARIABLE)
4053 {
4054 dummyfile[0] = x_("");
4055 var = setval((INTBIG)curtech, VTECHNOLOGY, qual, (INTBIG)dummyfile,
4056 VSTRING|VISARRAY|(1<<VLENGTHSH));
4057 if (var == NOVARIABLE)
4058 {
4059 ttyputerr(_("Cannot create %s on the technology"), qual);
4060 return;
4061 }
4062 } else
4063 var->type &= ~VDONTSAVE;
4064
4065 /* get a new window, put an editor in it */
4066 w = us_wantnewwindow(0);
4067 if (w == NOWINDOWPART) return;
4068 if (us_makeeditor(w, header, &dummy, &dummy) == NOWINDOWPART) return;
4069 ed = w->editor;
4070 ed->editobjqual = qual;
4071 ed->editobjaddr = (CHAR *)curtech;
4072 ed->editobjtype = VTECHNOLOGY;
4073 ed->editobjvar = var;
4074 us_suspendgraphics(w);
4075
4076 l = getlength(var);
4077 for(j=0; j<l; j++)
4078 {
4079 infstr = initinfstr();
4080 addstringtoinfstr(infstr, describevariable(var, j, -1));
4081 us_addline(w, j, returninfstr(infstr));
4082 }
4083 us_resumegraphics(w);
4084 w->changehandler = us_varchanges;
4085 }
4086 }
4087
4088 /* Verilog Options */
4089 static DIALOGITEM sim_verilogoptdialogitems[] =
4090 {
4091 /* 1 */ {0, {144,396,168,454}, BUTTON, N_("OK")},
4092 /* 2 */ {0, {144,268,168,326}, BUTTON, N_("Cancel")},
4093 /* 3 */ {0, {80,216,96,375}, RADIO, N_("Use Model from File:")},
4094 /* 4 */ {0, {56,216,72,426}, RADIO, N_("Derive Model from Circuitry")},
4095 /* 5 */ {0, {80,392,96,463}, BUTTON, N_("Browse")},
4096 /* 6 */ {0, {104,224,136,480}, EDITTEXT, x_("")},
4097 /* 7 */ {0, {8,256,24,428}, CHECK, N_("Use ASSIGN Construct")},
4098 /* 8 */ {0, {28,8,168,206}, SCROLL, x_("")},
4099 /* 9 */ {0, {8,8,24,72}, MESSAGE, N_("Library:")},
4100 /* 10 */ {0, {8,76,24,206}, POPUP, x_("")},
4101 /* 11 */ {0, {32,256,48,428}, CHECK, N_("Default wire is Trireg")}
4102 };
4103 static DIALOG sim_verilogoptdialog = {{50,75,227,564}, N_("Verilog Options"), 0, 11, sim_verilogoptdialogitems, 0, 0};
4104
4105 /* special items for the "Verilog options" dialog: */
4106 #define DVEO_USEMODELFILE 3 /* Use model from file (radio) */
4107 #define DVEO_USEMODELCIRC 4 /* Use model from circuitry (radio) */
4108 #define DVEO_SETMODELFILE 5 /* Set model file (button) */
4109 #define DVEO_MODELFILE 6 /* Model file (edit text) */
4110 #define DVEO_USEASSIGN 7 /* Use 'assign' construct (check) */
4111 #define DVEO_CELLLIST 8 /* Cell list (scroll) */
4112 #define DVEO_LIBRARYPOPUP 10 /* Library list (popup) */
4113 #define DVEO_USETRIREG 11 /* Default wire is Trireg (check) */
4114
4115 /*
4116 * special case for the "Verilog options" dialog
4117 */
sim_verilogdlog(void)4118 void sim_verilogdlog(void)
4119 {
4120 INTBIG itemHit, i, verilog_state, libcount, oldplease;
4121 CHAR *subparams[3], *pt, **liblist;
4122 REGISTER VARIABLE *var;
4123 REGISTER NODEPROTO *np;
4124 REGISTER LIBRARY *lib;
4125 REGISTER void *infstr, *dia;
4126
4127 /* Display the Verilog options dialog box */
4128 dia = DiaInitDialog(&sim_verilogoptdialog);
4129 if (dia == 0) return;
4130
4131 /* load up list of libraries */
4132 for(lib = el_curlib, libcount = 0; lib != NOLIBRARY; lib = lib->nextlibrary)
4133 libcount++;
4134 liblist = (CHAR **)emalloc(libcount * (sizeof (CHAR *)), el_tempcluster);
4135 if (liblist == 0) return;
4136 for(lib = el_curlib, libcount = 0; lib != NOLIBRARY; lib = lib->nextlibrary)
4137 {
4138 if ((lib->userbits&HIDDENLIBRARY) != 0) continue;
4139 liblist[libcount] = lib->libname;
4140 libcount++;
4141 }
4142 esort(liblist, libcount, sizeof (CHAR *), sort_stringascending);
4143 DiaSetPopup(dia, DVEO_LIBRARYPOPUP, libcount, liblist);
4144 for(i=0; i<libcount; i++)
4145 if (estrcmp(el_curlib->libname, liblist[i]) == 0) break;
4146 if (i < libcount) DiaSetPopupEntry(dia, DVEO_LIBRARYPOPUP, i);
4147
4148 /* get miscellaneous state */
4149 var = getvalkey((INTBIG)sim_tool, VTOOL, VINTEGER, sim_verilog_statekey);
4150 if (var != NOVARIABLE) verilog_state = var->addr; else verilog_state = 0;
4151 if ((verilog_state&VERILOGUSEASSIGN) != 0) DiaSetControl(dia, DVEO_USEASSIGN, 1);
4152 if ((verilog_state&VERILOGUSETRIREG) != 0) DiaSetControl(dia, DVEO_USETRIREG, 1);
4153
4154 /* cache behavior file links */
4155 for(lib = el_curlib; lib != NOLIBRARY; lib = lib->nextlibrary)
4156 for(np = lib->firstnodeproto; np != NONODEPROTO; np = np->nextnodeproto)
4157 {
4158 np->temp1 = 0;
4159 var = getval((INTBIG)np, VNODEPROTO, VSTRING, x_("SIM_verilog_behave_file"));
4160 if (var != NOVARIABLE)
4161 (void)allocstring((CHAR **)&np->temp1, (CHAR *)var->addr, el_tempcluster);
4162 }
4163
4164 /* make list of cells in this library */
4165 sim_curlib = el_curlib;
4166 DiaInitTextDialog(dia, DVEO_CELLLIST, sim_topofcells, sim_nextcells, DiaNullDlogDone,
4167 0, SCSELMOUSE|SCSELKEY|SCREPORT);
4168 sim_verdiasetcellinfo(sim_curlib, dia);
4169
4170 for(;;)
4171 {
4172 itemHit = DiaNextHit(dia);
4173 if (itemHit == OK || itemHit == CANCEL) break;
4174
4175 if (itemHit == DVEO_USEASSIGN || itemHit == DVEO_USETRIREG)
4176 {
4177 DiaSetControl(dia, itemHit, 1-DiaGetControl(dia, itemHit));
4178 continue;
4179 }
4180
4181 if (itemHit == DVEO_LIBRARYPOPUP)
4182 {
4183 i = DiaGetPopupEntry(dia, DVEO_LIBRARYPOPUP);
4184 if (i < 0 || i >= libcount) continue;
4185 sim_curlib = getlibrary(liblist[i]);
4186 if (sim_curlib == NOLIBRARY) continue;
4187 DiaLoadTextDialog(dia, DVEO_CELLLIST, sim_topofcells, sim_nextcells, DiaNullDlogDone, 0);
4188 sim_verdiasetcellinfo(sim_curlib, dia);
4189 continue;
4190 }
4191
4192 if (itemHit == DVEO_CELLLIST)
4193 {
4194 /* selection of cells */
4195 sim_verdiasetcellinfo(sim_curlib, dia);
4196 continue;
4197 }
4198
4199 if (itemHit == DVEO_USEMODELFILE || itemHit == DVEO_USEMODELCIRC)
4200 {
4201 /* model for cell */
4202 DiaSetControl(dia, DVEO_USEMODELFILE, 0);
4203 DiaSetControl(dia, DVEO_USEMODELCIRC, 0);
4204 DiaSetControl(dia, itemHit, 1);
4205 pt = DiaGetScrollLine(dia, DVEO_CELLLIST, DiaGetCurLine(dia, DVEO_CELLLIST));
4206 lib = el_curlib; el_curlib = sim_curlib;
4207 np = getnodeproto(pt);
4208 el_curlib = lib;
4209 if (itemHit == DVEO_USEMODELFILE)
4210 {
4211 DiaUnDimItem(dia, DVEO_MODELFILE);
4212 if (np != NONODEPROTO)
4213 {
4214 infstr = initinfstr();
4215 formatinfstr(infstr, x_("%s.v"), np->protoname);
4216 pt = returninfstr(infstr);
4217 DiaSetText(dia, DVEO_MODELFILE, pt);
4218 if (np->temp1 != 0) efree((CHAR *)np->temp1);
4219 (void)allocstring((CHAR **)&np->temp1, pt, el_tempcluster);
4220 }
4221 } else
4222 {
4223 DiaSetText(dia, DVEO_MODELFILE, x_(""));
4224 DiaDimItem(dia, DVEO_MODELFILE);
4225 if (np != NONODEPROTO)
4226 {
4227 if (np->temp1 != 0) efree((CHAR *)np->temp1);
4228 np->temp1 = 0;
4229 }
4230 }
4231 continue;
4232 }
4233
4234 if (itemHit == DVEO_SETMODELFILE)
4235 {
4236 /* set model for cell */
4237 pt = DiaGetScrollLine(dia, DVEO_CELLLIST, DiaGetCurLine(dia, DVEO_CELLLIST));
4238 lib = el_curlib; el_curlib = sim_curlib;
4239 np = getnodeproto(pt);
4240 el_curlib = lib;
4241 if (np == NONODEPROTO) continue;
4242 oldplease = el_pleasestop;
4243 infstr = initinfstr();
4244 addstringtoinfstr(infstr, x_("verilog/"));
4245 addstringtoinfstr(infstr, _("Cell's Model File"));
4246 i = ttygetparam(returninfstr(infstr), &us_colorreadp, 1, subparams);
4247 el_pleasestop = oldplease;
4248 if (i != 0 && subparams[0][0] != 0)
4249 {
4250 DiaUnDimItem(dia, DVEO_MODELFILE);
4251 DiaSetText(dia, DVEO_MODELFILE, subparams[0]);
4252 if (np->temp1 != 0) efree((CHAR *)np->temp1);
4253 (void)allocstring((CHAR **)&np->temp1, subparams[0], el_tempcluster);
4254 DiaSetControl(dia, DVEO_USEMODELCIRC, 0);
4255 DiaSetControl(dia, DVEO_USEMODELFILE, 1);
4256 }
4257 continue;
4258 }
4259 if (itemHit == DVEO_MODELFILE)
4260 {
4261 pt = DiaGetScrollLine(dia, DVEO_CELLLIST, DiaGetCurLine(dia, DVEO_CELLLIST));
4262 lib = el_curlib; el_curlib = sim_curlib;
4263 np = getnodeproto(pt);
4264 el_curlib = lib;
4265 if (np == NONODEPROTO) continue;
4266 if (np->temp1 != 0) efree((CHAR *)np->temp1);
4267 (void)allocstring((CHAR **)&np->temp1, DiaGetText(dia, DVEO_MODELFILE), el_tempcluster);
4268 continue;
4269 }
4270 }
4271
4272 if (itemHit != CANCEL) /* now update the values */
4273 {
4274 i = 0;
4275 if (DiaGetControl(dia, DVEO_USEASSIGN) != 0) i |= VERILOGUSEASSIGN;
4276 if (DiaGetControl(dia, DVEO_USETRIREG) != 0) i |= VERILOGUSETRIREG;
4277 if (i != verilog_state)
4278 (void)setvalkey((INTBIG)sim_tool, VTOOL, sim_verilog_statekey, i, VINTEGER);
4279
4280 for(lib = el_curlib; lib != NOLIBRARY; lib = lib->nextlibrary)
4281 for(np = lib->firstnodeproto; np != NONODEPROTO; np = np->nextnodeproto)
4282 {
4283 var = getval((INTBIG)np, VNODEPROTO, VSTRING, x_("SIM_verilog_behave_file"));
4284 if (var != NOVARIABLE)
4285 {
4286 if (np->temp1 == 0)
4287 (void)delval((INTBIG)np, VNODEPROTO, x_("SIM_verilog_behave_file")); else
4288 {
4289 if (estrcmp((CHAR *)np->temp1, (CHAR *)var->addr) != 0)
4290 (void)setval((INTBIG)np, VNODEPROTO, x_("SIM_verilog_behave_file"),
4291 (INTBIG)np->temp1, VSTRING);
4292 }
4293 } else if (np->temp1 != 0)
4294 (void)setval((INTBIG)np, VNODEPROTO, x_("SIM_verilog_behave_file"),
4295 (INTBIG)np->temp1, VSTRING);
4296 }
4297 }
4298 for(lib = el_curlib; lib != NOLIBRARY; lib = lib->nextlibrary)
4299 for(np = lib->firstnodeproto; np != NONODEPROTO; np = np->nextnodeproto)
4300 if (np->temp1 != 0) efree((CHAR *)np->temp1);
4301 efree((CHAR *)liblist);
4302 DiaDoneDialog(dia);
4303 }
4304
4305 /*
4306 * Helper routine to set information about the currently selected cell in the
4307 * "Verilog Options" dialog.
4308 */
sim_verdiasetcellinfo(LIBRARY * curlib,void * dia)4309 void sim_verdiasetcellinfo(LIBRARY *curlib, void *dia)
4310 {
4311 REGISTER NODEPROTO *np;
4312 REGISTER LIBRARY *savelib;
4313 REGISTER CHAR *pt;
4314
4315 DiaSetControl(dia, DVEO_USEMODELCIRC, 1);
4316 DiaSetControl(dia, DVEO_USEMODELFILE, 0);
4317 DiaSetText(dia, DVEO_MODELFILE, x_(""));
4318 DiaDimItem(dia, DVEO_MODELFILE);
4319 pt = DiaGetScrollLine(dia, DVEO_CELLLIST, DiaGetCurLine(dia, DVEO_CELLLIST));
4320 savelib = el_curlib; el_curlib = curlib;
4321 np = getnodeproto(pt);
4322 el_curlib = savelib;
4323 if (np != NONODEPROTO && np->temp1 != 0)
4324 {
4325 DiaSetControl(dia, DVEO_USEMODELCIRC, 0);
4326 DiaSetControl(dia, DVEO_USEMODELFILE, 1);
4327 DiaUnDimItem(dia, DVEO_MODELFILE);
4328 DiaSetText(dia, DVEO_MODELFILE, (CHAR *)np->temp1);
4329 }
4330 }
4331
4332 /*
4333 * Helper routines for listing all cells in library "sim_curlib".
4334 */
sim_topofcells(CHAR ** c)4335 BOOLEAN sim_topofcells(CHAR **c)
4336 {
4337 Q_UNUSED( c );
4338 sim_oldcellprotos = sim_curlib->firstnodeproto;
4339 return(TRUE);
4340 }
sim_nextcells(void)4341 CHAR *sim_nextcells(void)
4342 {
4343 REGISTER NODEPROTO *thisnp;
4344 REGISTER CHAR *ret;
4345
4346 ret = 0;
4347 if (sim_oldcellprotos != NONODEPROTO)
4348 {
4349 thisnp = sim_oldcellprotos;
4350 sim_oldcellprotos = sim_oldcellprotos->nextnodeproto;
4351 ret = nldescribenodeproto(thisnp);
4352 }
4353 return(ret);
4354 }
4355
4356 #endif /* SIMTOOL */
4357