1 /* $OpenBSD: ohci.c,v 1.165 2022/04/12 19:41:11 naddy Exp $ */
2 /* $NetBSD: ohci.c,v 1.139 2003/02/22 05:24:16 tsutsui Exp $ */
3 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */
4
5 /*
6 * Copyright (c) 1998 The NetBSD Foundation, Inc.
7 * All rights reserved.
8 *
9 * This code is derived from software contributed to The NetBSD Foundation
10 * by Lennart Augustsson (lennart@augustsson.net) at
11 * Carlstedt Research & Technology.
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 * POSSIBILITY OF SUCH DAMAGE.
33 */
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/malloc.h>
38 #include <sys/device.h>
39 #include <sys/queue.h>
40 #include <sys/timeout.h>
41 #include <sys/pool.h>
42 #include <sys/endian.h>
43
44 #include <machine/bus.h>
45
46 #include <dev/usb/usb.h>
47 #include <dev/usb/usbdi.h>
48 #include <dev/usb/usbdivar.h>
49 #include <dev/usb/usb_mem.h>
50
51 #include <dev/usb/ohcireg.h>
52 #include <dev/usb/ohcivar.h>
53
54 struct cfdriver ohci_cd = {
55 NULL, "ohci", DV_DULL, CD_SKIPHIBERNATE
56 };
57
58 #ifdef OHCI_DEBUG
59 #define DPRINTF(x) do { if (ohcidebug) printf x; } while (0)
60 #define DPRINTFN(n,x) do { if (ohcidebug>(n)) printf x; } while (0)
61 int ohcidebug = 0;
62 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
63 #else
64 #define DPRINTF(x)
65 #define DPRINTFN(n,x)
66 #endif
67
68 struct pool *ohcixfer;
69
70 struct ohci_pipe;
71
72 struct ohci_soft_ed *ohci_alloc_sed(struct ohci_softc *);
73 void ohci_free_sed(struct ohci_softc *, struct ohci_soft_ed *);
74
75 struct ohci_soft_td *ohci_alloc_std(struct ohci_softc *);
76 void ohci_free_std(struct ohci_softc *, struct ohci_soft_td *);
77
78 struct ohci_soft_itd *ohci_alloc_sitd(struct ohci_softc *);
79 void ohci_free_sitd(struct ohci_softc *, struct ohci_soft_itd *);
80
81 #if 0
82 void ohci_free_std_chain(struct ohci_softc *, struct ohci_soft_td *,
83 struct ohci_soft_td *);
84 #endif
85 usbd_status ohci_alloc_std_chain(struct ohci_softc *, u_int,
86 struct usbd_xfer *, struct ohci_soft_td *,
87 struct ohci_soft_td **);
88
89 usbd_status ohci_open(struct usbd_pipe *);
90 int ohci_setaddr(struct usbd_device *, int);
91 void ohci_poll(struct usbd_bus *);
92 void ohci_softintr(void *);
93 void ohci_add_done(struct ohci_softc *, ohci_physaddr_t);
94 void ohci_rhsc(struct ohci_softc *, struct usbd_xfer *);
95
96 usbd_status ohci_device_request(struct usbd_xfer *xfer);
97 void ohci_add_ed(struct ohci_soft_ed *, struct ohci_soft_ed *);
98 void ohci_rem_ed(struct ohci_soft_ed *, struct ohci_soft_ed *);
99 void ohci_hash_add_td(struct ohci_softc *, struct ohci_soft_td *);
100 struct ohci_soft_td *ohci_hash_find_td(struct ohci_softc *, ohci_physaddr_t);
101 void ohci_hash_add_itd(struct ohci_softc *, struct ohci_soft_itd *);
102 void ohci_hash_rem_itd(struct ohci_softc *, struct ohci_soft_itd *);
103 struct ohci_soft_itd *ohci_hash_find_itd(struct ohci_softc *, ohci_physaddr_t);
104
105 usbd_status ohci_setup_isoc(struct usbd_pipe *pipe);
106 void ohci_device_isoc_enter(struct usbd_xfer *);
107
108 struct usbd_xfer *ohci_allocx(struct usbd_bus *);
109 void ohci_freex(struct usbd_bus *, struct usbd_xfer *);
110
111 usbd_status ohci_root_ctrl_transfer(struct usbd_xfer *);
112 usbd_status ohci_root_ctrl_start(struct usbd_xfer *);
113 void ohci_root_ctrl_abort(struct usbd_xfer *);
114 void ohci_root_ctrl_close(struct usbd_pipe *);
115 void ohci_root_ctrl_done(struct usbd_xfer *);
116
117 usbd_status ohci_root_intr_transfer(struct usbd_xfer *);
118 usbd_status ohci_root_intr_start(struct usbd_xfer *);
119 void ohci_root_intr_abort(struct usbd_xfer *);
120 void ohci_root_intr_close(struct usbd_pipe *);
121 void ohci_root_intr_done(struct usbd_xfer *);
122
123 usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *);
124 usbd_status ohci_device_ctrl_start(struct usbd_xfer *);
125 void ohci_device_ctrl_abort(struct usbd_xfer *);
126 void ohci_device_ctrl_close(struct usbd_pipe *);
127 void ohci_device_ctrl_done(struct usbd_xfer *);
128
129 usbd_status ohci_device_bulk_transfer(struct usbd_xfer *);
130 usbd_status ohci_device_bulk_start(struct usbd_xfer *);
131 void ohci_device_bulk_abort(struct usbd_xfer *);
132 void ohci_device_bulk_close(struct usbd_pipe *);
133 void ohci_device_bulk_done(struct usbd_xfer *);
134
135 usbd_status ohci_device_intr_transfer(struct usbd_xfer *);
136 usbd_status ohci_device_intr_start(struct usbd_xfer *);
137 void ohci_device_intr_abort(struct usbd_xfer *);
138 void ohci_device_intr_close(struct usbd_pipe *);
139 void ohci_device_intr_done(struct usbd_xfer *);
140
141 usbd_status ohci_device_isoc_transfer(struct usbd_xfer *);
142 usbd_status ohci_device_isoc_start(struct usbd_xfer *);
143 void ohci_device_isoc_abort(struct usbd_xfer *);
144 void ohci_device_isoc_close(struct usbd_pipe *);
145 void ohci_device_isoc_done(struct usbd_xfer *);
146
147 usbd_status ohci_device_setintr(struct ohci_softc *sc,
148 struct ohci_pipe *pipe, int ival);
149
150 void ohci_timeout(void *);
151 void ohci_timeout_task(void *);
152 void ohci_rhsc_able(struct ohci_softc *, int);
153 void ohci_rhsc_enable(void *);
154
155 void ohci_close_pipe(struct usbd_pipe *, struct ohci_soft_ed *);
156 void ohci_abort_xfer(struct usbd_xfer *, usbd_status);
157
158 void ohci_device_clear_toggle(struct usbd_pipe *pipe);
159
160 #ifdef OHCI_DEBUG
161 void ohci_dumpregs(struct ohci_softc *);
162 void ohci_dump_tds(struct ohci_soft_td *);
163 void ohci_dump_td(struct ohci_soft_td *);
164 void ohci_dump_ed(struct ohci_soft_ed *);
165 void ohci_dump_itd(struct ohci_soft_itd *);
166 void ohci_dump_itds(struct ohci_soft_itd *);
167 #endif
168
169 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
170 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
171 #define OWRITE1(sc, r, x) \
172 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
173 #define OWRITE2(sc, r, x) \
174 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
175 #define OWRITE4(sc, r, x) \
176 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
177
178 __unused static __inline u_int8_t
OREAD1(struct ohci_softc * sc,bus_size_t r)179 OREAD1(struct ohci_softc *sc, bus_size_t r)
180 {
181 OBARR(sc);
182 return bus_space_read_1(sc->iot, sc->ioh, r);
183 }
184
185 __unused static __inline u_int16_t
OREAD2(struct ohci_softc * sc,bus_size_t r)186 OREAD2(struct ohci_softc *sc, bus_size_t r)
187 {
188 OBARR(sc);
189 return bus_space_read_2(sc->iot, sc->ioh, r);
190 }
191
192 __unused static __inline u_int32_t
OREAD4(struct ohci_softc * sc,bus_size_t r)193 OREAD4(struct ohci_softc *sc, bus_size_t r)
194 {
195 OBARR(sc);
196 return bus_space_read_4(sc->iot, sc->ioh, r);
197 }
198
199 /* Reverse the bits in a value 0 .. 31 */
200 const u_int8_t revbits[OHCI_NO_INTRS] =
201 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
202 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
203 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
204 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
205
206 struct ohci_pipe {
207 struct usbd_pipe pipe;
208 struct ohci_soft_ed *sed;
209 union {
210 struct ohci_soft_td *td;
211 struct ohci_soft_itd *itd;
212 } tail;
213 union {
214 /* Control pipe */
215 struct {
216 struct usb_dma reqdma;
217 } ctl;
218 /* Interrupt pipe */
219 struct {
220 int nslots;
221 int pos;
222 } intr;
223 /* Iso pipe */
224 struct iso {
225 int next, inuse;
226 } iso;
227 } u;
228 };
229
230 #define OHCI_INTR_ENDPT 1
231
232 const struct usbd_bus_methods ohci_bus_methods = {
233 .open_pipe = ohci_open,
234 .dev_setaddr = ohci_setaddr,
235 .soft_intr = ohci_softintr,
236 .do_poll = ohci_poll,
237 .allocx = ohci_allocx,
238 .freex = ohci_freex,
239 };
240
241 const struct usbd_pipe_methods ohci_root_ctrl_methods = {
242 .transfer = ohci_root_ctrl_transfer,
243 .start = ohci_root_ctrl_start,
244 .abort = ohci_root_ctrl_abort,
245 .close = ohci_root_ctrl_close,
246 .done = ohci_root_ctrl_done,
247 };
248
249 const struct usbd_pipe_methods ohci_root_intr_methods = {
250 .transfer = ohci_root_intr_transfer,
251 .start = ohci_root_intr_start,
252 .abort = ohci_root_intr_abort,
253 .close = ohci_root_intr_close,
254 .done = ohci_root_intr_done,
255 };
256
257 const struct usbd_pipe_methods ohci_device_ctrl_methods = {
258 .transfer = ohci_device_ctrl_transfer,
259 .start = ohci_device_ctrl_start,
260 .abort = ohci_device_ctrl_abort,
261 .close = ohci_device_ctrl_close,
262 .done = ohci_device_ctrl_done,
263 };
264
265 const struct usbd_pipe_methods ohci_device_intr_methods = {
266 .transfer = ohci_device_intr_transfer,
267 .start = ohci_device_intr_start,
268 .abort = ohci_device_intr_abort,
269 .close = ohci_device_intr_close,
270 .cleartoggle = ohci_device_clear_toggle,
271 .done = ohci_device_intr_done,
272 };
273
274 const struct usbd_pipe_methods ohci_device_bulk_methods = {
275 .transfer = ohci_device_bulk_transfer,
276 .start = ohci_device_bulk_start,
277 .abort = ohci_device_bulk_abort,
278 .close = ohci_device_bulk_close,
279 .cleartoggle = ohci_device_clear_toggle,
280 .done = ohci_device_bulk_done,
281 };
282
283 const struct usbd_pipe_methods ohci_device_isoc_methods = {
284 .transfer = ohci_device_isoc_transfer,
285 .start = ohci_device_isoc_start,
286 .abort = ohci_device_isoc_abort,
287 .close = ohci_device_isoc_close,
288 .done = ohci_device_isoc_done,
289 };
290
291 int
ohci_activate(struct device * self,int act)292 ohci_activate(struct device *self, int act)
293 {
294 struct ohci_softc *sc = (struct ohci_softc *)self;
295 u_int32_t reg;
296 int rv = 0;
297
298 switch (act) {
299 case DVACT_SUSPEND:
300 rv = config_activate_children(self, act);
301 sc->sc_bus.use_polling++;
302 reg = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
303 if (sc->sc_control == 0) {
304 /*
305 * Preserve register values, in case that APM BIOS
306 * does not recover them.
307 */
308 sc->sc_control = reg;
309 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
310 sc->sc_ival = OHCI_GET_IVAL(OREAD4(sc,
311 OHCI_FM_INTERVAL));
312 }
313 reg |= OHCI_HCFS_SUSPEND;
314 OWRITE4(sc, OHCI_CONTROL, reg);
315 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
316 sc->sc_bus.use_polling--;
317 break;
318 case DVACT_RESUME:
319 sc->sc_bus.use_polling++;
320
321 /* Some broken BIOSes do not recover these values */
322 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
323 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
324 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
325 if (sc->sc_intre)
326 OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
327 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
328 if (sc->sc_control)
329 reg = sc->sc_control;
330 else
331 reg = OREAD4(sc, OHCI_CONTROL);
332 reg |= OHCI_HCFS_RESUME;
333 OWRITE4(sc, OHCI_CONTROL, reg);
334 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
335 reg = (reg & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
336 OWRITE4(sc, OHCI_CONTROL, reg);
337
338 reg = (OREAD4(sc, OHCI_FM_REMAINING) & OHCI_FIT) ^ OHCI_FIT;
339 reg |= OHCI_FSMPS(sc->sc_ival) | sc->sc_ival;
340 OWRITE4(sc, OHCI_FM_INTERVAL, reg);
341 OWRITE4(sc, OHCI_PERIODIC_START, OHCI_PERIODIC(sc->sc_ival));
342
343 /* Fiddle the No OverCurrent Protection to avoid a chip bug */
344 reg = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
345 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, reg | OHCI_NOCP);
346 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
347 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
348 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, reg);
349
350 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
351 sc->sc_control = sc->sc_intre = sc->sc_ival = 0;
352 sc->sc_bus.use_polling--;
353 rv = config_activate_children(self, act);
354 break;
355 case DVACT_POWERDOWN:
356 rv = config_activate_children(self, act);
357 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
358 break;
359 default:
360 rv = config_activate_children(self, act);
361 break;
362 }
363 return (rv);
364 }
365
366 int
ohci_detach(struct device * self,int flags)367 ohci_detach(struct device *self, int flags)
368 {
369 struct ohci_softc *sc = (struct ohci_softc *)self;
370 int rv;
371
372 rv = config_detach_children(self, flags);
373 if (rv != 0)
374 return (rv);
375
376 timeout_del(&sc->sc_tmo_rhsc);
377
378 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
379
380 /* free data structures XXX */
381
382 return (rv);
383 }
384
385 struct ohci_soft_ed *
ohci_alloc_sed(struct ohci_softc * sc)386 ohci_alloc_sed(struct ohci_softc *sc)
387 {
388 struct ohci_soft_ed *sed = NULL;
389 usbd_status err;
390 int i, offs;
391 struct usb_dma dma;
392 int s;
393
394 s = splusb();
395 if (sc->sc_freeeds == NULL) {
396 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
397 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
398 OHCI_ED_ALIGN, USB_DMA_COHERENT, &dma);
399 if (err)
400 goto out;
401 for (i = 0; i < OHCI_SED_CHUNK; i++) {
402 offs = i * OHCI_SED_SIZE;
403 sed = KERNADDR(&dma, offs);
404 sed->physaddr = DMAADDR(&dma, offs);
405 sed->next = sc->sc_freeeds;
406 sc->sc_freeeds = sed;
407 }
408 }
409 sed = sc->sc_freeeds;
410 sc->sc_freeeds = sed->next;
411 memset(&sed->ed, 0, sizeof(struct ohci_ed));
412 sed->next = NULL;
413
414 out:
415 splx(s);
416 return (sed);
417 }
418
419 void
ohci_free_sed(struct ohci_softc * sc,struct ohci_soft_ed * sed)420 ohci_free_sed(struct ohci_softc *sc, struct ohci_soft_ed *sed)
421 {
422 int s;
423
424 s = splusb();
425 sed->next = sc->sc_freeeds;
426 sc->sc_freeeds = sed;
427 splx(s);
428 }
429
430 struct ohci_soft_td *
ohci_alloc_std(struct ohci_softc * sc)431 ohci_alloc_std(struct ohci_softc *sc)
432 {
433 struct ohci_soft_td *std = NULL;
434 usbd_status err;
435 int i, offs;
436 struct usb_dma dma;
437 int s;
438
439 s = splusb();
440 if (sc->sc_freetds == NULL) {
441 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
442 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
443 OHCI_TD_ALIGN, USB_DMA_COHERENT, &dma);
444 if (err)
445 goto out;
446 for (i = 0; i < OHCI_STD_CHUNK; i++) {
447 offs = i * OHCI_STD_SIZE;
448 std = KERNADDR(&dma, offs);
449 std->physaddr = DMAADDR(&dma, offs);
450 std->nexttd = sc->sc_freetds;
451 sc->sc_freetds = std;
452 }
453 }
454
455 std = sc->sc_freetds;
456 sc->sc_freetds = std->nexttd;
457 memset(&std->td, 0, sizeof(struct ohci_td));
458 std->nexttd = NULL;
459 std->xfer = NULL;
460 ohci_hash_add_td(sc, std);
461
462 out:
463 splx(s);
464 return (std);
465 }
466
467 void
ohci_free_std(struct ohci_softc * sc,struct ohci_soft_td * std)468 ohci_free_std(struct ohci_softc *sc, struct ohci_soft_td *std)
469 {
470 int s;
471
472 s = splusb();
473 LIST_REMOVE(std, hnext);
474 std->nexttd = sc->sc_freetds;
475 sc->sc_freetds = std;
476 splx(s);
477 }
478
479 usbd_status
ohci_alloc_std_chain(struct ohci_softc * sc,u_int alen,struct usbd_xfer * xfer,struct ohci_soft_td * sp,struct ohci_soft_td ** ep)480 ohci_alloc_std_chain(struct ohci_softc *sc, u_int alen, struct usbd_xfer *xfer,
481 struct ohci_soft_td *sp, struct ohci_soft_td **ep)
482 {
483 struct ohci_soft_td *next, *cur, *end;
484 ohci_physaddr_t dataphys, dataphysend;
485 u_int32_t tdflags;
486 u_int len, curlen;
487 int mps;
488 int rd = usbd_xfer_isread(xfer);
489 struct usb_dma *dma = &xfer->dmabuf;
490 u_int16_t flags = xfer->flags;
491
492 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%u\n", alen));
493
494 usb_syncmem(&xfer->dmabuf, 0, xfer->length,
495 usbd_xfer_isread(xfer) ?
496 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
497
498 len = alen;
499 cur = sp;
500 end = NULL;
501
502 dataphys = DMAADDR(dma, 0);
503 dataphysend = OHCI_PAGE(dataphys + len - 1);
504 tdflags = htole32(
505 (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
506 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
507 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
508 mps = UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize);
509
510 while (len > 0) {
511 next = ohci_alloc_std(sc);
512 if (next == NULL)
513 goto nomem;
514
515 /* The OHCI hardware can handle at most one page crossing. */
516 if (OHCI_PAGE(dataphys) == dataphysend ||
517 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
518 /* we can handle it in this TD */
519 curlen = len;
520 } else {
521 /* must use multiple TDs, fill as much as possible. */
522 curlen = 2 * OHCI_PAGE_SIZE -
523 (dataphys & (OHCI_PAGE_SIZE-1));
524 /* the length must be a multiple of the max size */
525 curlen -= curlen % mps;
526 #ifdef DIAGNOSTIC
527 if (curlen == 0)
528 panic("ohci_alloc_std: curlen == 0");
529 #endif
530 }
531 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
532 "dataphysend=0x%08x len=%u curlen=%u\n",
533 dataphys, dataphysend,
534 len, curlen));
535 len -= curlen;
536
537 cur->td.td_flags = tdflags;
538 cur->td.td_cbp = htole32(dataphys);
539 cur->nexttd = next;
540 cur->td.td_nexttd = htole32(next->physaddr);
541 cur->td.td_be = htole32(dataphys + curlen - 1);
542 cur->len = curlen;
543 cur->flags = OHCI_ADD_LEN;
544 cur->xfer = xfer;
545 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
546 dataphys, dataphys + curlen - 1));
547 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
548 dataphys += curlen;
549 end = cur;
550 cur = next;
551 }
552 if (!rd && ((flags & USBD_FORCE_SHORT_XFER) || alen == 0) &&
553 alen % mps == 0) {
554 /* Force a 0 length transfer at the end. */
555
556 next = ohci_alloc_std(sc);
557 if (next == NULL)
558 goto nomem;
559
560 cur->td.td_flags = tdflags;
561 cur->td.td_cbp = 0; /* indicate 0 length packet */
562 cur->nexttd = next;
563 cur->td.td_nexttd = htole32(next->physaddr);
564 cur->td.td_be = ~0;
565 cur->len = 0;
566 cur->flags = 0;
567 cur->xfer = xfer;
568 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
569 end = cur;
570 }
571 *ep = end;
572
573 return (USBD_NORMAL_COMPLETION);
574
575 nomem:
576 /* XXX free chain */
577 return (USBD_NOMEM);
578 }
579
580 #if 0
581 void
582 ohci_free_std_chain(struct ohci_softc *sc, struct ohci_soft_td *std,
583 struct ohci_soft_td *stdend)
584 {
585 struct ohci_soft_td *p;
586
587 for (; std != stdend; std = p) {
588 p = std->nexttd;
589 ohci_free_std(sc, std);
590 }
591 }
592 #endif
593
594 struct ohci_soft_itd *
ohci_alloc_sitd(struct ohci_softc * sc)595 ohci_alloc_sitd(struct ohci_softc *sc)
596 {
597 struct ohci_soft_itd *sitd;
598 usbd_status err;
599 int i, s, offs;
600 struct usb_dma dma;
601
602 if (sc->sc_freeitds == NULL) {
603 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
604 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
605 OHCI_ITD_ALIGN, USB_DMA_COHERENT, &dma);
606 if (err)
607 return (NULL);
608 s = splusb();
609 for(i = 0; i < OHCI_SITD_CHUNK; i++) {
610 offs = i * OHCI_SITD_SIZE;
611 sitd = KERNADDR(&dma, offs);
612 sitd->physaddr = DMAADDR(&dma, offs);
613 sitd->nextitd = sc->sc_freeitds;
614 sc->sc_freeitds = sitd;
615 }
616 splx(s);
617 }
618
619 s = splusb();
620 sitd = sc->sc_freeitds;
621 sc->sc_freeitds = sitd->nextitd;
622 memset(&sitd->itd, 0, sizeof(struct ohci_itd));
623 sitd->nextitd = NULL;
624 sitd->xfer = NULL;
625 ohci_hash_add_itd(sc, sitd);
626 splx(s);
627
628 #ifdef DIAGNOSTIC
629 sitd->isdone = 0;
630 #endif
631
632 return (sitd);
633 }
634
635 void
ohci_free_sitd(struct ohci_softc * sc,struct ohci_soft_itd * sitd)636 ohci_free_sitd(struct ohci_softc *sc, struct ohci_soft_itd *sitd)
637 {
638 int s;
639
640 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
641
642 #ifdef DIAGNOSTIC
643 if (!sitd->isdone) {
644 panic("ohci_free_sitd: sitd=%p not done", sitd);
645 return;
646 }
647 /* Warn double free */
648 sitd->isdone = 0;
649 #endif
650
651 s = splusb();
652 ohci_hash_rem_itd(sc, sitd);
653 sitd->nextitd = sc->sc_freeitds;
654 sc->sc_freeitds = sitd;
655 splx(s);
656 }
657
658 usbd_status
ohci_checkrev(struct ohci_softc * sc)659 ohci_checkrev(struct ohci_softc *sc)
660 {
661 u_int32_t rev;
662
663 rev = OREAD4(sc, OHCI_REVISION);
664 printf("version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
665 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
666
667 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
668 printf("%s: unsupported OHCI revision\n",
669 sc->sc_bus.bdev.dv_xname);
670 sc->sc_bus.usbrev = USBREV_UNKNOWN;
671 return (USBD_INVAL);
672 }
673 sc->sc_bus.usbrev = USBREV_1_0;
674
675 return (USBD_NORMAL_COMPLETION);
676 }
677
678 usbd_status
ohci_handover(struct ohci_softc * sc)679 ohci_handover(struct ohci_softc *sc)
680 {
681 u_int32_t s, ctl;
682 int i;
683
684 ctl = OREAD4(sc, OHCI_CONTROL);
685 if (ctl & OHCI_IR) {
686 /* SMM active, request change */
687 DPRINTF(("ohci_handover: SMM active, request owner change\n"));
688 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
689 (OHCI_OC | OHCI_MIE))
690 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
691 s = OREAD4(sc, OHCI_COMMAND_STATUS);
692 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
693 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
694 usb_delay_ms(&sc->sc_bus, 1);
695 ctl = OREAD4(sc, OHCI_CONTROL);
696 }
697 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
698 if (ctl & OHCI_IR) {
699 printf("%s: SMM does not respond, will reset\n",
700 sc->sc_bus.bdev.dv_xname);
701 }
702 }
703
704 return (USBD_NORMAL_COMPLETION);
705 }
706
707 usbd_status
ohci_init(struct ohci_softc * sc)708 ohci_init(struct ohci_softc *sc)
709 {
710 struct ohci_soft_ed *sed, *psed;
711 usbd_status err;
712 int i;
713 u_int32_t ctl, rwc, ival, hcr, fm, per, desca, descb;
714
715 DPRINTF(("ohci_init: start\n"));
716
717 for (i = 0; i < OHCI_HASH_SIZE; i++)
718 LIST_INIT(&sc->sc_hash_tds[i]);
719 for (i = 0; i < OHCI_HASH_SIZE; i++)
720 LIST_INIT(&sc->sc_hash_itds[i]);
721
722 if (ohcixfer == NULL) {
723 ohcixfer = malloc(sizeof(struct pool), M_USBHC, M_NOWAIT);
724 if (ohcixfer == NULL) {
725 printf("%s: unable to allocate pool descriptor\n",
726 sc->sc_bus.bdev.dv_xname);
727 return (ENOMEM);
728 }
729 pool_init(ohcixfer, sizeof(struct ohci_xfer), 0, IPL_SOFTUSB,
730 0, "ohcixfer", NULL);
731 }
732
733 /* XXX determine alignment by R/W */
734 /* Allocate the HCCA area. */
735 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, OHCI_HCCA_ALIGN,
736 USB_DMA_COHERENT, &sc->sc_hccadma);
737 if (err)
738 return (err);
739 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
740 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
741
742 sc->sc_eintrs = OHCI_NORMAL_INTRS;
743
744 /* Allocate dummy ED that starts the control list. */
745 sc->sc_ctrl_head = ohci_alloc_sed(sc);
746 if (sc->sc_ctrl_head == NULL) {
747 err = USBD_NOMEM;
748 goto bad1;
749 }
750 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
751
752 /* Allocate dummy ED that starts the bulk list. */
753 sc->sc_bulk_head = ohci_alloc_sed(sc);
754 if (sc->sc_bulk_head == NULL) {
755 err = USBD_NOMEM;
756 goto bad2;
757 }
758 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
759
760 /* Allocate dummy ED that starts the isochronous list. */
761 sc->sc_isoc_head = ohci_alloc_sed(sc);
762 if (sc->sc_isoc_head == NULL) {
763 err = USBD_NOMEM;
764 goto bad3;
765 }
766 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
767
768 /* Allocate all the dummy EDs that make up the interrupt tree. */
769 for (i = 0; i < OHCI_NO_EDS; i++) {
770 sed = ohci_alloc_sed(sc);
771 if (sed == NULL) {
772 while (--i >= 0)
773 ohci_free_sed(sc, sc->sc_eds[i]);
774 err = USBD_NOMEM;
775 goto bad4;
776 }
777 /* All ED fields are set to 0. */
778 sc->sc_eds[i] = sed;
779 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
780 if (i != 0)
781 psed = sc->sc_eds[(i-1) / 2];
782 else
783 psed= sc->sc_isoc_head;
784 sed->next = psed;
785 sed->ed.ed_nexted = htole32(psed->physaddr);
786 }
787 /*
788 * Fill HCCA interrupt table. The bit reversal is to get
789 * the tree set up properly to spread the interrupts.
790 */
791 for (i = 0; i < OHCI_NO_INTRS; i++)
792 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
793 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
794
795 #ifdef OHCI_DEBUG
796 if (ohcidebug > 15) {
797 for (i = 0; i < OHCI_NO_EDS; i++) {
798 printf("ed#%d ", i);
799 ohci_dump_ed(sc->sc_eds[i]);
800 }
801 printf("iso ");
802 ohci_dump_ed(sc->sc_isoc_head);
803 }
804 #endif
805 /* Preserve values programmed by SMM/BIOS but lost over reset. */
806 ctl = OREAD4(sc, OHCI_CONTROL);
807 rwc = ctl & OHCI_RWC;
808 fm = OREAD4(sc, OHCI_FM_INTERVAL);
809 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
810 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
811
812 /* Determine in what context we are running. */
813 if (ctl & OHCI_IR) {
814 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
815 goto reset;
816 #if 0
817 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
818 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
819 /* BIOS started controller. */
820 DPRINTF(("ohci_init: BIOS active\n"));
821 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
822 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
823 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
824 }
825 #endif
826 } else {
827 DPRINTF(("ohci_init: cold started\n"));
828 reset:
829 /* Controller was cold started. */
830 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
831 }
832
833 /*
834 * This reset should not be necessary according to the OHCI spec, but
835 * without it some controllers do not start.
836 */
837 DPRINTF(("%s: resetting\n", sc->sc_bus.bdev.dv_xname));
838 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
839 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
840
841 /* We now own the host controller and the bus has been reset. */
842
843 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
844 /* Nominal time for a reset is 10 us. */
845 for (i = 0; i < 10; i++) {
846 delay(10);
847 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
848 if (!hcr)
849 break;
850 }
851 if (hcr) {
852 printf("%s: reset timeout\n", sc->sc_bus.bdev.dv_xname);
853 err = USBD_IOERROR;
854 goto bad5;
855 }
856 #ifdef OHCI_DEBUG
857 if (ohcidebug > 15)
858 ohci_dumpregs(sc);
859 #endif
860
861 /* The controller is now in SUSPEND state, we have 2ms to finish. */
862
863 /* Set up HC registers. */
864 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
865 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
866 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
867 /* disable all interrupts and then switch on all desired interrupts */
868 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
869 /* switch on desired functional features */
870 ctl = OREAD4(sc, OHCI_CONTROL);
871 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
872 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
873 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
874 /* And finally start it! */
875 OWRITE4(sc, OHCI_CONTROL, ctl);
876
877 /*
878 * The controller is now OPERATIONAL. Set a some final
879 * registers that should be set earlier, but that the
880 * controller ignores when in the SUSPEND state.
881 */
882 ival = OHCI_GET_IVAL(fm);
883 fm = (OREAD4(sc, OHCI_FM_REMAINING) & OHCI_FIT) ^ OHCI_FIT;
884 fm |= OHCI_FSMPS(ival) | ival;
885 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
886 per = OHCI_PERIODIC(ival); /* 90% periodic */
887 OWRITE4(sc, OHCI_PERIODIC_START, per);
888
889 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
890 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
891 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
892 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
893 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
894 OWRITE4(sc, OHCI_RH_DESCRIPTOR_B, descb);
895 usb_delay_ms(&sc->sc_bus, OHCI_GET_POTPGT(desca) * UHD_PWRON_FACTOR);
896
897 /*
898 * The AMD756 requires a delay before re-reading the register,
899 * otherwise it will occasionally report 0 ports.
900 */
901 sc->sc_noport = 0;
902 for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
903 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
904 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
905 }
906
907 #ifdef OHCI_DEBUG
908 if (ohcidebug > 5)
909 ohci_dumpregs(sc);
910 #endif
911
912 /* Set up the bus struct. */
913 sc->sc_bus.methods = &ohci_bus_methods;
914 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
915
916 sc->sc_control = sc->sc_intre = 0;
917
918 timeout_set(&sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
919
920 /* Finally, turn on interrupts. */
921 DPRINTFN(1,("ohci_init: enabling\n"));
922 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
923
924 return (USBD_NORMAL_COMPLETION);
925
926 bad5:
927 for (i = 0; i < OHCI_NO_EDS; i++)
928 ohci_free_sed(sc, sc->sc_eds[i]);
929 bad4:
930 ohci_free_sed(sc, sc->sc_isoc_head);
931 bad3:
932 ohci_free_sed(sc, sc->sc_bulk_head);
933 bad2:
934 ohci_free_sed(sc, sc->sc_ctrl_head);
935 bad1:
936 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
937 return (err);
938 }
939
940 struct usbd_xfer *
ohci_allocx(struct usbd_bus * bus)941 ohci_allocx(struct usbd_bus *bus)
942 {
943 return (pool_get(ohcixfer, PR_NOWAIT | PR_ZERO));
944 }
945
946 void
ohci_freex(struct usbd_bus * bus,struct usbd_xfer * xfer)947 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer)
948 {
949 pool_put(ohcixfer, xfer);
950 }
951
952 #ifdef OHCI_DEBUG
953 void
ohci_dumpregs(struct ohci_softc * sc)954 ohci_dumpregs(struct ohci_softc *sc)
955 {
956 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
957 OREAD4(sc, OHCI_REVISION),
958 OREAD4(sc, OHCI_CONTROL),
959 OREAD4(sc, OHCI_COMMAND_STATUS)));
960 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
961 OREAD4(sc, OHCI_INTERRUPT_STATUS),
962 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
963 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
964 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
965 OREAD4(sc, OHCI_HCCA),
966 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
967 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
968 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
969 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
970 OREAD4(sc, OHCI_BULK_HEAD_ED),
971 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
972 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
973 OREAD4(sc, OHCI_DONE_HEAD),
974 OREAD4(sc, OHCI_FM_INTERVAL),
975 OREAD4(sc, OHCI_FM_REMAINING)));
976 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
977 OREAD4(sc, OHCI_FM_NUMBER),
978 OREAD4(sc, OHCI_PERIODIC_START),
979 OREAD4(sc, OHCI_LS_THRESHOLD)));
980 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
981 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
982 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
983 OREAD4(sc, OHCI_RH_STATUS)));
984 DPRINTF((" port1=0x%08x port2=0x%08x\n",
985 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
986 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
987 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
988 letoh32(sc->sc_hcca->hcca_frame_number),
989 letoh32(sc->sc_hcca->hcca_done_head)));
990 }
991 #endif
992
993 int ohci_intr1(struct ohci_softc *);
994
995 int
ohci_intr(void * p)996 ohci_intr(void *p)
997 {
998 struct ohci_softc *sc = p;
999
1000 if (sc == NULL || sc->sc_bus.dying)
1001 return (0);
1002
1003 /* If we get an interrupt while polling, then just ignore it. */
1004 if (sc->sc_bus.use_polling) {
1005 #ifdef DIAGNOSTIC
1006 static struct timeval ohci_intr_tv;
1007 if ((OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) &&
1008 usbd_ratecheck(&ohci_intr_tv))
1009 DPRINTFN(16,
1010 ("ohci_intr: ignored interrupt while polling\n"));
1011 #endif
1012 return (0);
1013 }
1014
1015 return (ohci_intr1(sc));
1016 }
1017
1018 int
ohci_intr1(struct ohci_softc * sc)1019 ohci_intr1(struct ohci_softc *sc)
1020 {
1021 u_int32_t intrs, eintrs;
1022 ohci_physaddr_t done;
1023
1024 DPRINTFN(14,("ohci_intr1: enter\n"));
1025
1026 /* In case the interrupt occurs before initialization has completed. */
1027 if (sc == NULL || sc->sc_hcca == NULL) {
1028 #ifdef DIAGNOSTIC
1029 printf("ohci_intr: sc->sc_hcca == NULL\n");
1030 #endif
1031 return (0);
1032 }
1033
1034 intrs = 0;
1035 done = letoh32(sc->sc_hcca->hcca_done_head);
1036 if (done != 0) {
1037 if (done & ~OHCI_DONE_INTRS)
1038 intrs = OHCI_WDH;
1039 if (done & OHCI_DONE_INTRS)
1040 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1041 sc->sc_hcca->hcca_done_head = 0;
1042 } else {
1043 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1044 /* If we've flushed out a WDH then reread */
1045 if (intrs & OHCI_WDH) {
1046 done = letoh32(sc->sc_hcca->hcca_done_head);
1047 sc->sc_hcca->hcca_done_head = 0;
1048 }
1049 }
1050
1051 if (intrs == 0xffffffff) {
1052 sc->sc_bus.dying = 1;
1053 return (0);
1054 }
1055
1056 if (!intrs)
1057 return (0);
1058
1059 intrs &= ~OHCI_MIE;
1060 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
1061 eintrs = intrs & sc->sc_eintrs;
1062 if (!eintrs)
1063 return (0);
1064
1065 sc->sc_bus.intr_context++;
1066 sc->sc_bus.no_intrs++;
1067 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1068 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1069 (u_int)eintrs));
1070
1071 if (eintrs & OHCI_SO) {
1072 sc->sc_overrun_cnt++;
1073 if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1074 printf("%s: %u scheduling overruns\n",
1075 sc->sc_bus.bdev.dv_xname, sc->sc_overrun_cnt);
1076 sc->sc_overrun_cnt = 0;
1077 }
1078 /* XXX do what */
1079 eintrs &= ~OHCI_SO;
1080 }
1081 if (eintrs & OHCI_WDH) {
1082 ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
1083 usb_schedsoftintr(&sc->sc_bus);
1084 eintrs &= ~OHCI_WDH;
1085 }
1086 if (eintrs & OHCI_RD) {
1087 printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname);
1088 /* XXX process resume detect */
1089 }
1090 if (eintrs & OHCI_UE) {
1091 printf("%s: unrecoverable error, controller halted\n",
1092 sc->sc_bus.bdev.dv_xname);
1093 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1094 /* XXX what else */
1095 }
1096 if (eintrs & OHCI_RHSC) {
1097 ohci_rhsc(sc, sc->sc_intrxfer);
1098 /*
1099 * Disable RHSC interrupt for now, because it will be
1100 * on until the port has been reset.
1101 */
1102 ohci_rhsc_able(sc, 0);
1103 DPRINTFN(2, ("%s: rhsc interrupt disabled\n",
1104 sc->sc_bus.bdev.dv_xname));
1105
1106 /* Do not allow RHSC interrupts > 1 per second */
1107 timeout_add_sec(&sc->sc_tmo_rhsc, 1);
1108 eintrs &= ~OHCI_RHSC;
1109 }
1110
1111 sc->sc_bus.intr_context--;
1112
1113 if (eintrs != 0) {
1114 /* Block unprocessed interrupts. XXX */
1115 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1116 sc->sc_eintrs &= ~eintrs;
1117 printf("%s: blocking intrs 0x%x\n",
1118 sc->sc_bus.bdev.dv_xname, eintrs);
1119 }
1120
1121 return (1);
1122 }
1123
1124 void
ohci_rhsc_able(struct ohci_softc * sc,int on)1125 ohci_rhsc_able(struct ohci_softc *sc, int on)
1126 {
1127 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
1128 if (on) {
1129 sc->sc_eintrs |= OHCI_RHSC;
1130 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1131 } else {
1132 sc->sc_eintrs &= ~OHCI_RHSC;
1133 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1134 }
1135 }
1136
1137 void
ohci_rhsc_enable(void * v_sc)1138 ohci_rhsc_enable(void *v_sc)
1139 {
1140 struct ohci_softc *sc = v_sc;
1141 int s;
1142
1143 if (sc->sc_bus.dying)
1144 return;
1145
1146 s = splhardusb();
1147 ohci_rhsc(sc, sc->sc_intrxfer);
1148 DPRINTFN(2, ("%s: rhsc interrupt enabled\n",
1149 sc->sc_bus.bdev.dv_xname));
1150
1151 ohci_rhsc_able(sc, 1);
1152 splx(s);
1153 }
1154
1155 #ifdef OHCI_DEBUG
1156 const char *ohci_cc_strs[] = {
1157 "NO_ERROR",
1158 "CRC",
1159 "BIT_STUFFING",
1160 "DATA_TOGGLE_MISMATCH",
1161 "STALL",
1162 "DEVICE_NOT_RESPONDING",
1163 "PID_CHECK_FAILURE",
1164 "UNEXPECTED_PID",
1165 "DATA_OVERRUN",
1166 "DATA_UNDERRUN",
1167 "BUFFER_OVERRUN",
1168 "BUFFER_UNDERRUN",
1169 "reserved",
1170 "reserved",
1171 "NOT_ACCESSED",
1172 "NOT_ACCESSED",
1173 };
1174 #endif
1175
1176 void
ohci_add_done(struct ohci_softc * sc,ohci_physaddr_t done)1177 ohci_add_done(struct ohci_softc *sc, ohci_physaddr_t done)
1178 {
1179 struct ohci_soft_itd *sitd, *sidone, **ip;
1180 struct ohci_soft_td *std, *sdone, **p;
1181
1182 /* Reverse the done list. */
1183 for (sdone = NULL, sidone = NULL; done != 0; ) {
1184 std = ohci_hash_find_td(sc, done);
1185 if (std != NULL) {
1186 std->dnext = sdone;
1187 done = letoh32(std->td.td_nexttd);
1188 sdone = std;
1189 DPRINTFN(10,("add TD %p\n", std));
1190 continue;
1191 }
1192 sitd = ohci_hash_find_itd(sc, done);
1193 if (sitd != NULL) {
1194 sitd->dnext = sidone;
1195 done = letoh32(sitd->itd.itd_nextitd);
1196 sidone = sitd;
1197 DPRINTFN(5,("add ITD %p\n", sitd));
1198 continue;
1199 }
1200 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done);
1201 }
1202
1203 /* sdone & sidone now hold the done lists. */
1204 /* Put them on the already processed lists. */
1205 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
1206 ;
1207 *p = sdone;
1208 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
1209 ;
1210 *ip = sidone;
1211 }
1212
1213 void
ohci_softintr(void * v)1214 ohci_softintr(void *v)
1215 {
1216 struct ohci_softc *sc = v;
1217 struct ohci_soft_itd *sitd, *sidone, *sitdnext;
1218 struct ohci_soft_td *std, *sdone, *stdnext;
1219 struct usbd_xfer *xfer;
1220 struct ohci_pipe *opipe;
1221 int len, cc, s;
1222 int i, j, actlen, iframes, uedir;
1223
1224 DPRINTFN(10,("ohci_softintr: enter\n"));
1225
1226 if (sc->sc_bus.dying)
1227 return;
1228
1229 sc->sc_bus.intr_context++;
1230
1231 s = splhardusb();
1232 sdone = sc->sc_sdone;
1233 sc->sc_sdone = NULL;
1234 sidone = sc->sc_sidone;
1235 sc->sc_sidone = NULL;
1236 splx(s);
1237
1238 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1239
1240 #ifdef OHCI_DEBUG
1241 if (ohcidebug > 10) {
1242 DPRINTF(("ohci_process_done: TD done:\n"));
1243 ohci_dump_tds(sdone);
1244 }
1245 #endif
1246
1247 for (std = sdone; std; std = stdnext) {
1248 xfer = std->xfer;
1249 stdnext = std->dnext;
1250 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1251 std, xfer, xfer ? xfer->hcpriv : 0));
1252 if (xfer == NULL) {
1253 /*
1254 * xfer == NULL: There seems to be no xfer associated
1255 * with this TD. It is tailp that happened to end up on
1256 * the done queue.
1257 * Shouldn't happen, but some chips are broken(?).
1258 */
1259 continue;
1260 }
1261 if (xfer->status == USBD_CANCELLED ||
1262 xfer->status == USBD_TIMEOUT) {
1263 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1264 xfer));
1265 /* Handled by abort routine. */
1266 continue;
1267 }
1268 timeout_del(&xfer->timeout_handle);
1269 usb_rem_task(xfer->device, &xfer->abort_task);
1270
1271 len = std->len;
1272 if (std->td.td_cbp != 0)
1273 len -= letoh32(std->td.td_be) -
1274 letoh32(std->td.td_cbp) + 1;
1275 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1276 std->flags));
1277 if (std->flags & OHCI_ADD_LEN)
1278 xfer->actlen += len;
1279
1280 cc = OHCI_TD_GET_CC(letoh32(std->td.td_flags));
1281 if (cc == OHCI_CC_NO_ERROR) {
1282 int done = (std->flags & OHCI_CALL_DONE);
1283
1284 ohci_free_std(sc, std);
1285 if (done) {
1286 if (xfer->actlen)
1287 usb_syncmem(&xfer->dmabuf, 0,
1288 xfer->actlen,
1289 usbd_xfer_isread(xfer) ?
1290 BUS_DMASYNC_POSTREAD :
1291 BUS_DMASYNC_POSTWRITE);
1292 xfer->status = USBD_NORMAL_COMPLETION;
1293 s = splusb();
1294 usb_transfer_complete(xfer);
1295 splx(s);
1296 }
1297 } else {
1298 /*
1299 * Endpoint is halted. First unlink all the TDs
1300 * belonging to the failed transfer, and then restart
1301 * the endpoint.
1302 */
1303 struct ohci_soft_td *p, *n;
1304 opipe = (struct ohci_pipe *)xfer->pipe;
1305
1306 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1307 OHCI_TD_GET_CC(letoh32(std->td.td_flags)),
1308 ohci_cc_strs[OHCI_TD_GET_CC(letoh32(std->td.td_flags))]));
1309
1310 /* remove TDs */
1311 for (p = std; p->xfer == xfer; p = n) {
1312 n = p->nexttd;
1313 ohci_free_std(sc, p);
1314 }
1315
1316 /* clear halt */
1317 opipe->sed->ed.ed_headp = htole32(p->physaddr);
1318 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1319
1320 if (cc == OHCI_CC_STALL)
1321 xfer->status = USBD_STALLED;
1322 else if (cc == OHCI_CC_DATA_UNDERRUN) {
1323 if (xfer->actlen)
1324 usb_syncmem(&xfer->dmabuf, 0,
1325 xfer->actlen,
1326 usbd_xfer_isread(xfer) ?
1327 BUS_DMASYNC_POSTREAD :
1328 BUS_DMASYNC_POSTWRITE);
1329 xfer->status = USBD_NORMAL_COMPLETION;
1330 } else
1331 xfer->status = USBD_IOERROR;
1332 s = splusb();
1333 usb_transfer_complete(xfer);
1334 splx(s);
1335 }
1336 }
1337
1338 #ifdef OHCI_DEBUG
1339 if (ohcidebug > 10) {
1340 DPRINTF(("ohci_softintr: ITD done:\n"));
1341 ohci_dump_itds(sidone);
1342 }
1343 #endif
1344
1345 for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1346 xfer = sitd->xfer;
1347 sitdnext = sitd->dnext;
1348 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1349 sitd, xfer, xfer ? xfer->hcpriv : 0));
1350 if (xfer == NULL)
1351 continue;
1352 if (xfer->status == USBD_CANCELLED ||
1353 xfer->status == USBD_TIMEOUT) {
1354 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1355 xfer));
1356 /* Handled by abort routine. */
1357 continue;
1358 }
1359 #ifdef DIAGNOSTIC
1360 if (sitd->isdone)
1361 printf("ohci_softintr: sitd=%p is done\n", sitd);
1362 sitd->isdone = 1;
1363 #endif
1364 if (sitd->flags & OHCI_CALL_DONE) {
1365 struct ohci_soft_itd *next;
1366
1367 opipe = (struct ohci_pipe *)xfer->pipe;
1368 opipe->u.iso.inuse -= xfer->nframes;
1369 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc->
1370 bEndpointAddress);
1371 xfer->status = USBD_NORMAL_COMPLETION;
1372 actlen = 0;
1373 for (i = 0, sitd = xfer->hcpriv; ;
1374 sitd = next) {
1375 next = sitd->nextitd;
1376 if (OHCI_ITD_GET_CC(letoh32(sitd->
1377 itd.itd_flags)) != OHCI_CC_NO_ERROR)
1378 xfer->status = USBD_IOERROR;
1379 /* For input, update frlengths with actual */
1380 /* XXX anything necessary for output? */
1381 if (uedir == UE_DIR_IN &&
1382 xfer->status == USBD_NORMAL_COMPLETION) {
1383 iframes = OHCI_ITD_GET_FC(letoh32(
1384 sitd->itd.itd_flags));
1385 for (j = 0; j < iframes; i++, j++) {
1386 len = letoh16(sitd->
1387 itd.itd_offset[j]);
1388 if ((OHCI_ITD_PSW_GET_CC(len) &
1389 OHCI_CC_NOT_ACCESSED_MASK)
1390 == OHCI_CC_NOT_ACCESSED)
1391 len = 0;
1392 else
1393 len = OHCI_ITD_PSW_LENGTH(len);
1394 xfer->frlengths[i] = len;
1395 actlen += len;
1396 }
1397 }
1398 if (sitd->flags & OHCI_CALL_DONE)
1399 break;
1400 ohci_free_sitd(sc, sitd);
1401 }
1402 ohci_free_sitd(sc, sitd);
1403 if (uedir == UE_DIR_IN &&
1404 xfer->status == USBD_NORMAL_COMPLETION)
1405 xfer->actlen = actlen;
1406 xfer->hcpriv = NULL;
1407
1408 if (xfer->status == USBD_NORMAL_COMPLETION) {
1409 usb_syncmem(&xfer->dmabuf, 0, xfer->length,
1410 usbd_xfer_isread(xfer) ?
1411 BUS_DMASYNC_POSTREAD :
1412 BUS_DMASYNC_POSTWRITE);
1413 }
1414
1415 s = splusb();
1416 usb_transfer_complete(xfer);
1417 splx(s);
1418 }
1419 }
1420
1421 if (sc->sc_softwake) {
1422 sc->sc_softwake = 0;
1423 wakeup(&sc->sc_softwake);
1424 }
1425
1426 sc->sc_bus.intr_context--;
1427 DPRINTFN(10,("ohci_softintr: done:\n"));
1428 }
1429
1430 void
ohci_device_ctrl_done(struct usbd_xfer * xfer)1431 ohci_device_ctrl_done(struct usbd_xfer *xfer)
1432 {
1433 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1434
1435 #ifdef DIAGNOSTIC
1436 if (!(xfer->rqflags & URQ_REQUEST)) {
1437 panic("ohci_device_ctrl_done: not a request");
1438 }
1439 #endif
1440 }
1441
1442 void
ohci_device_intr_done(struct usbd_xfer * xfer)1443 ohci_device_intr_done(struct usbd_xfer *xfer)
1444 {
1445 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus;
1446 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1447 struct ohci_soft_ed *sed = opipe->sed;
1448 struct ohci_soft_td *data, *tail;
1449
1450
1451 DPRINTFN(10, ("ohci_device_intr_done: xfer=%p, actlen=%d\n", xfer,
1452 xfer->actlen));
1453
1454 if (xfer->pipe->repeat) {
1455 data = opipe->tail.td;
1456 tail = ohci_alloc_std(sc);
1457 if (tail == NULL) {
1458 xfer->status = USBD_NOMEM;
1459 return;
1460 }
1461 tail->xfer = NULL;
1462
1463 data->td.td_flags = htole32(
1464 OHCI_TD_IN | OHCI_TD_NOCC |
1465 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1466 if (xfer->flags & USBD_SHORT_XFER_OK)
1467 data->td.td_flags |= htole32(OHCI_TD_R);
1468 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
1469 data->nexttd = tail;
1470 data->td.td_nexttd = htole32(tail->physaddr);
1471 data->td.td_be = htole32(letoh32(data->td.td_cbp) +
1472 xfer->length - 1);
1473 data->len = xfer->length;
1474 data->xfer = xfer;
1475 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1476 xfer->hcpriv = data;
1477 xfer->actlen = 0;
1478
1479 sed->ed.ed_tailp = htole32(tail->physaddr);
1480 opipe->tail.td = tail;
1481 }
1482 }
1483
1484 void
ohci_device_bulk_done(struct usbd_xfer * xfer)1485 ohci_device_bulk_done(struct usbd_xfer *xfer)
1486 {
1487 DPRINTFN(10, ("ohci_device_bulk_done: xfer=%p, actlen=%d\n", xfer,
1488 xfer->actlen));
1489 }
1490
1491 void
ohci_rhsc(struct ohci_softc * sc,struct usbd_xfer * xfer)1492 ohci_rhsc(struct ohci_softc *sc, struct usbd_xfer *xfer)
1493 {
1494 u_char *p;
1495 int i, m;
1496 int hstatus;
1497
1498 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1499 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1500 sc, xfer, hstatus));
1501
1502 if (xfer == NULL) {
1503 /* Just ignore the change. */
1504 return;
1505 }
1506
1507 p = KERNADDR(&xfer->dmabuf, 0);
1508 m = min(sc->sc_noport, xfer->length * 8 - 1);
1509 memset(p, 0, xfer->length);
1510 for (i = 1; i <= m; i++) {
1511 /* Pick out CHANGE bits from the status reg. */
1512 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1513 p[i/8] |= 1 << (i%8);
1514 }
1515 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1516 xfer->actlen = xfer->length;
1517 xfer->status = USBD_NORMAL_COMPLETION;
1518
1519 usb_transfer_complete(xfer);
1520 }
1521
1522 void
ohci_root_intr_done(struct usbd_xfer * xfer)1523 ohci_root_intr_done(struct usbd_xfer *xfer)
1524 {
1525 }
1526
1527 void
ohci_root_ctrl_done(struct usbd_xfer * xfer)1528 ohci_root_ctrl_done(struct usbd_xfer *xfer)
1529 {
1530 }
1531
1532 void
ohci_poll(struct usbd_bus * bus)1533 ohci_poll(struct usbd_bus *bus)
1534 {
1535 struct ohci_softc *sc = (struct ohci_softc *)bus;
1536 #ifdef OHCI_DEBUG
1537 static int last;
1538 int new;
1539 new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1540 if (new != last) {
1541 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1542 last = new;
1543 }
1544 #endif
1545
1546 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1547 ohci_intr1(sc);
1548 }
1549
1550 usbd_status
ohci_device_request(struct usbd_xfer * xfer)1551 ohci_device_request(struct usbd_xfer *xfer)
1552 {
1553 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus;
1554 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1555 usb_device_request_t *req = &xfer->request;
1556 struct ohci_soft_td *setup, *stat, *next, *tail;
1557 struct ohci_soft_ed *sed;
1558 u_int len;
1559 usbd_status err;
1560 int s;
1561
1562 len = UGETW(req->wLength);
1563
1564 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1565 "wValue=0x%04x, wIndex=0x%04x len=%u, addr=%d, endpt=%d\n",
1566 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1567 UGETW(req->wIndex), len, xfer->device->address,
1568 xfer->pipe->endpoint->edesc->bEndpointAddress));
1569
1570 setup = opipe->tail.td;
1571 stat = ohci_alloc_std(sc);
1572 if (stat == NULL) {
1573 err = USBD_NOMEM;
1574 goto bad1;
1575 }
1576 tail = ohci_alloc_std(sc);
1577 if (tail == NULL) {
1578 err = USBD_NOMEM;
1579 goto bad2;
1580 }
1581 tail->xfer = NULL;
1582
1583 sed = opipe->sed;
1584
1585 next = stat;
1586
1587 /* Set up data transaction */
1588 if (len != 0) {
1589 struct ohci_soft_td *std = stat;
1590
1591 err = ohci_alloc_std_chain(sc, len, xfer, std, &stat);
1592 stat = stat->nexttd; /* point at free TD */
1593 if (err)
1594 goto bad3;
1595 /* Start toggle at 1 and then use the carried toggle. */
1596 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK);
1597 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1598 }
1599
1600 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1601
1602 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1603 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1604 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1605 setup->nexttd = next;
1606 setup->td.td_nexttd = htole32(next->physaddr);
1607 setup->td.td_be = htole32(letoh32(setup->td.td_cbp) + sizeof *req - 1);
1608 setup->len = 0;
1609 setup->xfer = xfer;
1610 setup->flags = 0;
1611 xfer->hcpriv = setup;
1612
1613 stat->td.td_flags = htole32(
1614 (usbd_xfer_isread(xfer) ? OHCI_TD_OUT : OHCI_TD_IN) |
1615 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1616 stat->td.td_cbp = 0;
1617 stat->nexttd = tail;
1618 stat->td.td_nexttd = htole32(tail->physaddr);
1619 stat->td.td_be = 0;
1620 stat->flags = OHCI_CALL_DONE;
1621 stat->len = 0;
1622 stat->xfer = xfer;
1623
1624 #ifdef OHCI_DEBUG
1625 if (ohcidebug > 5) {
1626 DPRINTF(("ohci_device_request:\n"));
1627 ohci_dump_ed(sed);
1628 ohci_dump_tds(setup);
1629 }
1630 #endif
1631
1632 /* Insert ED in schedule */
1633 s = splusb();
1634 sed->ed.ed_tailp = htole32(tail->physaddr);
1635 opipe->tail.td = tail;
1636 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1637 if (xfer->timeout && !sc->sc_bus.use_polling) {
1638 timeout_del(&xfer->timeout_handle);
1639 timeout_set(&xfer->timeout_handle, ohci_timeout, xfer);
1640 timeout_add_msec(&xfer->timeout_handle, xfer->timeout);
1641 }
1642 splx(s);
1643
1644 #ifdef OHCI_DEBUG
1645 if (ohcidebug > 20) {
1646 delay(10000);
1647 DPRINTF(("ohci_device_request: status=%x\n",
1648 OREAD4(sc, OHCI_COMMAND_STATUS)));
1649 ohci_dumpregs(sc);
1650 printf("ctrl head:\n");
1651 ohci_dump_ed(sc->sc_ctrl_head);
1652 printf("sed:\n");
1653 ohci_dump_ed(sed);
1654 ohci_dump_tds(setup);
1655 }
1656 #endif
1657
1658 return (USBD_NORMAL_COMPLETION);
1659
1660 bad3:
1661 ohci_free_std(sc, tail);
1662 bad2:
1663 ohci_free_std(sc, stat);
1664 bad1:
1665 return (err);
1666 }
1667
1668 /*
1669 * Add an ED to the schedule. Called at splusb().
1670 */
1671 void
ohci_add_ed(struct ohci_soft_ed * sed,struct ohci_soft_ed * head)1672 ohci_add_ed(struct ohci_soft_ed *sed, struct ohci_soft_ed *head)
1673 {
1674 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1675
1676 splsoftassert(IPL_SOFTUSB);
1677 sed->next = head->next;
1678 sed->ed.ed_nexted = head->ed.ed_nexted;
1679 head->next = sed;
1680 head->ed.ed_nexted = htole32(sed->physaddr);
1681 }
1682
1683 /*
1684 * Remove an ED from the schedule. Called at splusb().
1685 */
1686 void
ohci_rem_ed(struct ohci_soft_ed * sed,struct ohci_soft_ed * head)1687 ohci_rem_ed(struct ohci_soft_ed *sed, struct ohci_soft_ed *head)
1688 {
1689 struct ohci_soft_ed *p;
1690
1691 splsoftassert(IPL_SOFTUSB);
1692
1693 /* XXX */
1694 for (p = head; p != NULL && p->next != sed; p = p->next)
1695 ;
1696 if (p == NULL)
1697 panic("ohci_rem_ed: ED not found");
1698 p->next = sed->next;
1699 p->ed.ed_nexted = sed->ed.ed_nexted;
1700 }
1701
1702 /*
1703 * When a transfer is completed the TD is added to the done queue by
1704 * the host controller. This queue is the processed by software.
1705 * Unfortunately the queue contains the physical address of the TD
1706 * and we have no simple way to translate this back to a kernel address.
1707 * To make the translation possible (and fast) we use a hash table of
1708 * TDs currently in the schedule. The physical address is used as the
1709 * hash value.
1710 */
1711
1712 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1713 /* Called at splusb() */
1714 void
ohci_hash_add_td(struct ohci_softc * sc,struct ohci_soft_td * std)1715 ohci_hash_add_td(struct ohci_softc *sc, struct ohci_soft_td *std)
1716 {
1717 int h = HASH(std->physaddr);
1718
1719 splsoftassert(IPL_SOFTUSB);
1720
1721 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1722 }
1723
1724 struct ohci_soft_td *
ohci_hash_find_td(struct ohci_softc * sc,ohci_physaddr_t a)1725 ohci_hash_find_td(struct ohci_softc *sc, ohci_physaddr_t a)
1726 {
1727 int h = HASH(a);
1728 struct ohci_soft_td *std;
1729
1730 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1731 std != NULL;
1732 std = LIST_NEXT(std, hnext))
1733 if (std->physaddr == a)
1734 return (std);
1735 return (NULL);
1736 }
1737
1738 /* Called at splusb() */
1739 void
ohci_hash_add_itd(struct ohci_softc * sc,struct ohci_soft_itd * sitd)1740 ohci_hash_add_itd(struct ohci_softc *sc, struct ohci_soft_itd *sitd)
1741 {
1742 int h = HASH(sitd->physaddr);
1743
1744 splsoftassert(IPL_SOFTUSB);
1745
1746 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1747 sitd, (u_long)sitd->physaddr));
1748
1749 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1750 }
1751
1752 /* Called at splusb() */
1753 void
ohci_hash_rem_itd(struct ohci_softc * sc,struct ohci_soft_itd * sitd)1754 ohci_hash_rem_itd(struct ohci_softc *sc, struct ohci_soft_itd *sitd)
1755 {
1756 splsoftassert(IPL_SOFTUSB);
1757
1758 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1759 sitd, (u_long)sitd->physaddr));
1760
1761 LIST_REMOVE(sitd, hnext);
1762 }
1763
1764 struct ohci_soft_itd *
ohci_hash_find_itd(struct ohci_softc * sc,ohci_physaddr_t a)1765 ohci_hash_find_itd(struct ohci_softc *sc, ohci_physaddr_t a)
1766 {
1767 int h = HASH(a);
1768 struct ohci_soft_itd *sitd;
1769
1770 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1771 sitd != NULL;
1772 sitd = LIST_NEXT(sitd, hnext))
1773 if (sitd->physaddr == a)
1774 return (sitd);
1775 return (NULL);
1776 }
1777
1778 void
ohci_timeout(void * addr)1779 ohci_timeout(void *addr)
1780 {
1781 struct usbd_xfer *xfer = addr;
1782 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus;
1783
1784 if (sc->sc_bus.dying) {
1785 ohci_timeout_task(addr);
1786 return;
1787 }
1788
1789 usb_init_task(&xfer->abort_task, ohci_timeout_task, addr,
1790 USB_TASK_TYPE_ABORT);
1791 usb_add_task(xfer->device, &xfer->abort_task);
1792 }
1793
1794 void
ohci_timeout_task(void * addr)1795 ohci_timeout_task(void *addr)
1796 {
1797 struct usbd_xfer *xfer = addr;
1798 int s;
1799
1800 DPRINTF(("%s: xfer=%p\n", __func__, xfer));
1801
1802 s = splusb();
1803 ohci_abort_xfer(xfer, USBD_TIMEOUT);
1804 splx(s);
1805 }
1806
1807 #ifdef OHCI_DEBUG
1808 void
ohci_dump_tds(struct ohci_soft_td * std)1809 ohci_dump_tds(struct ohci_soft_td *std)
1810 {
1811 for (; std; std = std->nexttd)
1812 ohci_dump_td(std);
1813 }
1814
1815 void
ohci_dump_td(struct ohci_soft_td * std)1816 ohci_dump_td(struct ohci_soft_td *std)
1817 {
1818 char sbuf[128];
1819
1820 bitmask_snprintf((u_int32_t)letoh32(std->td.td_flags),
1821 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1822 sbuf, sizeof(sbuf));
1823
1824 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1825 "nexttd=0x%08lx be=0x%08lx\n",
1826 std, (u_long)std->physaddr, sbuf,
1827 OHCI_TD_GET_DI(letoh32(std->td.td_flags)),
1828 OHCI_TD_GET_EC(letoh32(std->td.td_flags)),
1829 OHCI_TD_GET_CC(letoh32(std->td.td_flags)),
1830 (u_long)letoh32(std->td.td_cbp),
1831 (u_long)letoh32(std->td.td_nexttd),
1832 (u_long)letoh32(std->td.td_be));
1833 }
1834
1835 void
ohci_dump_itd(struct ohci_soft_itd * sitd)1836 ohci_dump_itd(struct ohci_soft_itd *sitd)
1837 {
1838 int i;
1839
1840 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
1841 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
1842 sitd, (u_long)sitd->physaddr,
1843 OHCI_ITD_GET_SF(letoh32(sitd->itd.itd_flags)),
1844 OHCI_ITD_GET_DI(letoh32(sitd->itd.itd_flags)),
1845 OHCI_ITD_GET_FC(letoh32(sitd->itd.itd_flags)),
1846 OHCI_ITD_GET_CC(letoh32(sitd->itd.itd_flags)),
1847 (u_long)letoh32(sitd->itd.itd_bp0),
1848 (u_long)letoh32(sitd->itd.itd_nextitd),
1849 (u_long)letoh32(sitd->itd.itd_be));
1850 for (i = 0; i < OHCI_ITD_NOFFSET; i++)
1851 printf("offs[%d]=0x%04x ", i,
1852 (u_int)letoh16(sitd->itd.itd_offset[i]));
1853 printf("\n");
1854 }
1855
1856 void
ohci_dump_itds(struct ohci_soft_itd * sitd)1857 ohci_dump_itds(struct ohci_soft_itd *sitd)
1858 {
1859 for (; sitd; sitd = sitd->nextitd)
1860 ohci_dump_itd(sitd);
1861 }
1862
1863 void
ohci_dump_ed(struct ohci_soft_ed * sed)1864 ohci_dump_ed(struct ohci_soft_ed *sed)
1865 {
1866 char sbuf[128], sbuf2[128];
1867
1868 bitmask_snprintf((u_int32_t)letoh32(sed->ed.ed_flags),
1869 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1870 sbuf, sizeof(sbuf));
1871 bitmask_snprintf((u_int32_t)letoh32(sed->ed.ed_headp),
1872 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
1873
1874 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\n"
1875 "tailp=0x%08lx headflags=%s headp=0x%08lx nexted=0x%08lx\n",
1876 sed, (u_long)sed->physaddr,
1877 OHCI_ED_GET_FA(letoh32(sed->ed.ed_flags)),
1878 OHCI_ED_GET_EN(letoh32(sed->ed.ed_flags)),
1879 OHCI_ED_GET_MAXP(letoh32(sed->ed.ed_flags)), sbuf,
1880 (u_long)letoh32(sed->ed.ed_tailp), sbuf2,
1881 (u_long)letoh32(sed->ed.ed_headp),
1882 (u_long)letoh32(sed->ed.ed_nexted));
1883 }
1884 #endif
1885
1886 usbd_status
ohci_open(struct usbd_pipe * pipe)1887 ohci_open(struct usbd_pipe *pipe)
1888 {
1889 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus;
1890 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1891 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1892 u_int8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes);
1893 struct ohci_soft_ed *sed = NULL;
1894 struct ohci_soft_td *std = NULL;
1895 struct ohci_soft_itd *sitd;
1896 ohci_physaddr_t tdphys;
1897 u_int32_t fmt;
1898 usbd_status err;
1899 int s;
1900 int ival;
1901
1902 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d\n",
1903 pipe, pipe->device->address, ed->bEndpointAddress));
1904
1905 if (sc->sc_bus.dying)
1906 return (USBD_IOERROR);
1907
1908 /* Root Hub */
1909 if (pipe->device->depth == 0) {
1910 switch (ed->bEndpointAddress) {
1911 case USB_CONTROL_ENDPOINT:
1912 pipe->methods = &ohci_root_ctrl_methods;
1913 break;
1914 case UE_DIR_IN | OHCI_INTR_ENDPT:
1915 pipe->methods = &ohci_root_intr_methods;
1916 break;
1917 default:
1918 return (USBD_INVAL);
1919 }
1920 } else {
1921 sed = ohci_alloc_sed(sc);
1922 if (sed == NULL)
1923 goto bad0;
1924 opipe->sed = sed;
1925 if (xfertype == UE_ISOCHRONOUS) {
1926 sitd = ohci_alloc_sitd(sc);
1927 if (sitd == NULL)
1928 goto bad1;
1929 opipe->tail.itd = sitd;
1930 tdphys = sitd->physaddr;
1931 fmt = OHCI_ED_FORMAT_ISO;
1932 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
1933 fmt |= OHCI_ED_DIR_IN;
1934 else
1935 fmt |= OHCI_ED_DIR_OUT;
1936 } else {
1937 std = ohci_alloc_std(sc);
1938 if (std == NULL)
1939 goto bad1;
1940 opipe->tail.td = std;
1941 tdphys = std->physaddr;
1942 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
1943 }
1944 sed->ed.ed_flags = htole32(
1945 OHCI_ED_SET_FA(pipe->device->address) |
1946 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
1947 (pipe->device->speed == USB_SPEED_LOW ?
1948 OHCI_ED_SPEED : 0) |
1949 fmt | OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
1950 sed->ed.ed_headp = htole32(tdphys |
1951 (pipe->endpoint->savedtoggle ? OHCI_TOGGLECARRY : 0));
1952 sed->ed.ed_tailp = htole32(tdphys);
1953
1954 switch (xfertype) {
1955 case UE_CONTROL:
1956 pipe->methods = &ohci_device_ctrl_methods;
1957 err = usb_allocmem(&sc->sc_bus,
1958 sizeof(usb_device_request_t),
1959 0, USB_DMA_COHERENT,
1960 &opipe->u.ctl.reqdma);
1961 if (err)
1962 goto bad;
1963 s = splusb();
1964 ohci_add_ed(sed, sc->sc_ctrl_head);
1965 splx(s);
1966 break;
1967 case UE_INTERRUPT:
1968 pipe->methods = &ohci_device_intr_methods;
1969 ival = pipe->interval;
1970 if (ival == USBD_DEFAULT_INTERVAL)
1971 ival = ed->bInterval;
1972 return (ohci_device_setintr(sc, opipe, ival));
1973 case UE_ISOCHRONOUS:
1974 pipe->methods = &ohci_device_isoc_methods;
1975 return (ohci_setup_isoc(pipe));
1976 case UE_BULK:
1977 pipe->methods = &ohci_device_bulk_methods;
1978 s = splusb();
1979 ohci_add_ed(sed, sc->sc_bulk_head);
1980 splx(s);
1981 break;
1982 }
1983 }
1984 return (USBD_NORMAL_COMPLETION);
1985
1986 bad:
1987 if (std != NULL)
1988 ohci_free_std(sc, std);
1989 bad1:
1990 if (sed != NULL)
1991 ohci_free_sed(sc, sed);
1992 bad0:
1993 return (USBD_NOMEM);
1994
1995 }
1996
1997 /*
1998 * Work around the half configured control (default) pipe when setting
1999 * the address of a device.
2000 *
2001 * Because a single ED is setup per endpoint in ohci_open(), and the
2002 * control pipe is configured before we could have set the address
2003 * of the device or read the wMaxPacketSize of the endpoint, we have
2004 * to re-open the pipe twice here.
2005 */
2006 int
ohci_setaddr(struct usbd_device * dev,int addr)2007 ohci_setaddr(struct usbd_device *dev, int addr)
2008 {
2009 /* Root Hub */
2010 if (dev->depth == 0)
2011 return (0);
2012
2013 /* Re-establish the default pipe with the new max packet size. */
2014 ohci_device_ctrl_close(dev->default_pipe);
2015 if (ohci_open(dev->default_pipe))
2016 return (EINVAL);
2017
2018 if (usbd_set_address(dev, addr))
2019 return (1);
2020
2021 dev->address = addr;
2022
2023 /* Re-establish the default pipe with the new address. */
2024 ohci_device_ctrl_close(dev->default_pipe);
2025 if (ohci_open(dev->default_pipe))
2026 return (EINVAL);
2027
2028 return (0);
2029 }
2030
2031 /*
2032 * Close a regular pipe.
2033 * Assumes that there are no pending transactions.
2034 */
2035 void
ohci_close_pipe(struct usbd_pipe * pipe,struct ohci_soft_ed * head)2036 ohci_close_pipe(struct usbd_pipe *pipe, struct ohci_soft_ed *head)
2037 {
2038 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2039 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus;
2040 struct ohci_soft_ed *sed = opipe->sed;
2041 int s;
2042
2043 s = splusb();
2044 #ifdef DIAGNOSTIC
2045 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2046 if ((letoh32(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2047 (letoh32(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2048 struct ohci_soft_td *std;
2049 std = ohci_hash_find_td(sc, letoh32(sed->ed.ed_headp));
2050 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2051 "tl=0x%x pipe=%p, std=%p\n", sed,
2052 (int)letoh32(sed->ed.ed_headp),
2053 (int)letoh32(sed->ed.ed_tailp),
2054 pipe, std);
2055 #ifdef OHCI_DEBUG
2056 ohci_dump_ed(sed);
2057 if (std)
2058 ohci_dump_td(std);
2059 #endif
2060 usb_delay_ms(&sc->sc_bus, 2);
2061 if ((letoh32(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2062 (letoh32(sed->ed.ed_headp) & OHCI_HEADMASK))
2063 printf("ohci_close_pipe: pipe still not empty\n");
2064 }
2065 #endif
2066 ohci_rem_ed(sed, head);
2067 /* Make sure the host controller is not touching this ED */
2068 usb_delay_ms(&sc->sc_bus, 1);
2069 splx(s);
2070 pipe->endpoint->savedtoggle =
2071 (letoh32(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0;
2072 ohci_free_sed(sc, opipe->sed);
2073 }
2074
2075 /*
2076 * Abort a device request.
2077 * If this routine is called at splusb() it guarantees that the request
2078 * will be removed from the hardware scheduling and that the callback
2079 * for it will be called with USBD_CANCELLED status.
2080 * It's impossible to guarantee that the requested transfer will not
2081 * have happened since the hardware runs concurrently.
2082 * If the transaction has already happened we rely on the ordinary
2083 * interrupt processing to process it.
2084 */
2085 void
ohci_abort_xfer(struct usbd_xfer * xfer,usbd_status status)2086 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status)
2087 {
2088 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2089 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus;
2090 struct ohci_soft_ed *sed = opipe->sed;
2091 struct ohci_soft_td *p, *n;
2092 ohci_physaddr_t headp;
2093 int s, hit;
2094
2095 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,
2096 sed));
2097
2098 if (sc->sc_bus.dying) {
2099 /* If we're dying, just do the software part. */
2100 s = splusb();
2101 xfer->status = status; /* make software ignore it */
2102 timeout_del(&xfer->timeout_handle);
2103 usb_rem_task(xfer->device, &xfer->abort_task);
2104 usb_transfer_complete(xfer);
2105 splx(s);
2106 return;
2107 }
2108
2109 if (xfer->device->bus->intr_context || !curproc)
2110 panic("ohci_abort_xfer: not in process context");
2111
2112 /*
2113 * Step 1: Make interrupt routine and hardware ignore xfer.
2114 */
2115 s = splusb();
2116 xfer->status = status; /* make software ignore it */
2117 timeout_del(&xfer->timeout_handle);
2118 usb_rem_task(xfer->device, &xfer->abort_task);
2119 splx(s);
2120 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2121 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
2122
2123 /*
2124 * Step 2: Wait until we know hardware has finished any possible
2125 * use of the xfer. Also make sure the soft interrupt routine
2126 * has run.
2127 */
2128 usb_delay_ms(xfer->device->bus, 20); /* Hardware finishes in 1ms */
2129 s = splusb();
2130 sc->sc_softwake = 1;
2131 usb_schedsoftintr(&sc->sc_bus);
2132 tsleep_nsec(&sc->sc_softwake, PZERO, "ohciab", INFSLP);
2133 splx(s);
2134
2135 /*
2136 * Step 3: Remove any vestiges of the xfer from the hardware.
2137 * The complication here is that the hardware may have executed
2138 * beyond the xfer we're trying to abort. So as we're scanning
2139 * the TDs of this xfer we check if the hardware points to
2140 * any of them.
2141 */
2142 s = splusb(); /* XXX why? */
2143 p = xfer->hcpriv;
2144 #ifdef DIAGNOSTIC
2145 if (p == NULL) {
2146 splx(s);
2147 printf("ohci_abort_xfer: hcpriv is NULL\n");
2148 return;
2149 }
2150 #endif
2151 #ifdef OHCI_DEBUG
2152 if (ohcidebug > 1) {
2153 DPRINTF(("ohci_abort_xfer: sed=\n"));
2154 ohci_dump_ed(sed);
2155 ohci_dump_tds(p);
2156 }
2157 #endif
2158 headp = letoh32(sed->ed.ed_headp) & OHCI_HEADMASK;
2159 hit = 0;
2160 for (; p->xfer == xfer; p = n) {
2161 hit |= headp == p->physaddr;
2162 n = p->nexttd;
2163 if (OHCI_TD_GET_CC(letoh32(p->td.td_flags)) ==
2164 OHCI_CC_NOT_ACCESSED)
2165 ohci_free_std(sc, p);
2166 }
2167 /* Zap headp register if hardware pointed inside the xfer. */
2168 if (hit) {
2169 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
2170 (int)p->physaddr, (int)letoh32(sed->ed.ed_tailp)));
2171 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
2172 } else {
2173 DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2174 }
2175
2176 /*
2177 * Step 4: Turn on hardware again.
2178 */
2179 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
2180
2181 /*
2182 * Step 5: Execute callback.
2183 */
2184 usb_transfer_complete(xfer);
2185
2186 splx(s);
2187 }
2188
2189 /*
2190 * Data structures and routines to emulate the root hub.
2191 */
2192 const usb_device_descriptor_t ohci_devd = {
2193 USB_DEVICE_DESCRIPTOR_SIZE,
2194 UDESC_DEVICE, /* type */
2195 {0x00, 0x01}, /* USB version */
2196 UDCLASS_HUB, /* class */
2197 UDSUBCLASS_HUB, /* subclass */
2198 UDPROTO_FSHUB,
2199 64, /* max packet */
2200 {0},{0},{0x00,0x01}, /* device id */
2201 1,2,0, /* string indices */
2202 1 /* # of configurations */
2203 };
2204
2205 const usb_config_descriptor_t ohci_confd = {
2206 USB_CONFIG_DESCRIPTOR_SIZE,
2207 UDESC_CONFIG,
2208 {USB_CONFIG_DESCRIPTOR_SIZE +
2209 USB_INTERFACE_DESCRIPTOR_SIZE +
2210 USB_ENDPOINT_DESCRIPTOR_SIZE},
2211 1,
2212 1,
2213 0,
2214 UC_BUS_POWERED | UC_SELF_POWERED,
2215 0 /* max power */
2216 };
2217
2218 const usb_interface_descriptor_t ohci_ifcd = {
2219 USB_INTERFACE_DESCRIPTOR_SIZE,
2220 UDESC_INTERFACE,
2221 0,
2222 0,
2223 1,
2224 UICLASS_HUB,
2225 UISUBCLASS_HUB,
2226 UIPROTO_FSHUB,
2227 0
2228 };
2229
2230 const usb_endpoint_descriptor_t ohci_endpd = {
2231 USB_ENDPOINT_DESCRIPTOR_SIZE,
2232 UDESC_ENDPOINT,
2233 UE_DIR_IN | OHCI_INTR_ENDPT,
2234 UE_INTERRUPT,
2235 {8, 0}, /* max packet */
2236 255
2237 };
2238
2239 const usb_hub_descriptor_t ohci_hubd = {
2240 USB_HUB_DESCRIPTOR_SIZE,
2241 UDESC_HUB,
2242 0,
2243 {0,0},
2244 0,
2245 0,
2246 {0},
2247 };
2248
2249 /*
2250 * Simulate a hardware hub by handling all the necessary requests.
2251 */
2252 usbd_status
ohci_root_ctrl_transfer(struct usbd_xfer * xfer)2253 ohci_root_ctrl_transfer(struct usbd_xfer *xfer)
2254 {
2255 usbd_status err;
2256
2257 /* Insert last in queue. */
2258 err = usb_insert_transfer(xfer);
2259 if (err)
2260 return (err);
2261
2262 /* Pipe isn't running, start first */
2263 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2264 }
2265
2266 usbd_status
ohci_root_ctrl_start(struct usbd_xfer * xfer)2267 ohci_root_ctrl_start(struct usbd_xfer *xfer)
2268 {
2269 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus;
2270 usb_device_request_t *req;
2271 void *buf = NULL;
2272 int port, i;
2273 int s, len, value, index, l, totlen = 0;
2274 usb_port_status_t ps;
2275 usb_device_descriptor_t devd;
2276 usb_hub_descriptor_t hubd;
2277 usbd_status err;
2278 u_int32_t v;
2279
2280 if (sc->sc_bus.dying)
2281 return (USBD_IOERROR);
2282
2283 #ifdef DIAGNOSTIC
2284 if (!(xfer->rqflags & URQ_REQUEST))
2285 /* XXX panic */
2286 return (USBD_INVAL);
2287 #endif
2288 req = &xfer->request;
2289
2290 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2291 req->bmRequestType, req->bRequest));
2292
2293 len = UGETW(req->wLength);
2294 value = UGETW(req->wValue);
2295 index = UGETW(req->wIndex);
2296
2297 if (len != 0)
2298 buf = KERNADDR(&xfer->dmabuf, 0);
2299
2300 #define C(x,y) ((x) | ((y) << 8))
2301 switch(C(req->bRequest, req->bmRequestType)) {
2302 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2303 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2304 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2305 /*
2306 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2307 * for the integrated root hub.
2308 */
2309 break;
2310 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2311 if (len > 0) {
2312 *(u_int8_t *)buf = sc->sc_conf;
2313 totlen = 1;
2314 }
2315 break;
2316 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2317 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2318 switch(value >> 8) {
2319 case UDESC_DEVICE:
2320 if ((value & 0xff) != 0) {
2321 err = USBD_IOERROR;
2322 goto ret;
2323 }
2324 devd = ohci_devd;
2325 USETW(devd.idVendor, sc->sc_id_vendor);
2326 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2327 memcpy(buf, &devd, l);
2328 break;
2329 case UDESC_CONFIG:
2330 if ((value & 0xff) != 0) {
2331 err = USBD_IOERROR;
2332 goto ret;
2333 }
2334 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2335 memcpy(buf, &ohci_confd, l);
2336 buf = (char *)buf + l;
2337 len -= l;
2338 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2339 totlen += l;
2340 memcpy(buf, &ohci_ifcd, l);
2341 buf = (char *)buf + l;
2342 len -= l;
2343 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2344 totlen += l;
2345 memcpy(buf, &ohci_endpd, l);
2346 break;
2347 case UDESC_STRING:
2348 if (len == 0)
2349 break;
2350 *(u_int8_t *)buf = 0;
2351 totlen = 1;
2352 switch (value & 0xff) {
2353 case 0: /* Language table */
2354 totlen = usbd_str(buf, len, "\001");
2355 break;
2356 case 1: /* Vendor */
2357 totlen = usbd_str(buf, len, sc->sc_vendor);
2358 break;
2359 case 2: /* Product */
2360 totlen = usbd_str(buf, len, "OHCI root hub");
2361 break;
2362 }
2363 break;
2364 default:
2365 err = USBD_IOERROR;
2366 goto ret;
2367 }
2368 break;
2369 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2370 if (len > 0) {
2371 *(u_int8_t *)buf = 0;
2372 totlen = 1;
2373 }
2374 break;
2375 case C(UR_GET_STATUS, UT_READ_DEVICE):
2376 if (len > 1) {
2377 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2378 totlen = 2;
2379 }
2380 break;
2381 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2382 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2383 if (len > 1) {
2384 USETW(((usb_status_t *)buf)->wStatus, 0);
2385 totlen = 2;
2386 }
2387 break;
2388 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2389 if (value >= USB_MAX_DEVICES) {
2390 err = USBD_IOERROR;
2391 goto ret;
2392 }
2393 break;
2394 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2395 if (value != 0 && value != 1) {
2396 err = USBD_IOERROR;
2397 goto ret;
2398 }
2399 sc->sc_conf = value;
2400 break;
2401 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2402 break;
2403 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2404 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2405 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2406 err = USBD_IOERROR;
2407 goto ret;
2408 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2409 break;
2410 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2411 break;
2412 /* Hub requests */
2413 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2414 break;
2415 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2416 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2417 "port=%d feature=%d\n",
2418 index, value));
2419 if (index < 1 || index > sc->sc_noport) {
2420 err = USBD_IOERROR;
2421 goto ret;
2422 }
2423 port = OHCI_RH_PORT_STATUS(index);
2424 switch(value) {
2425 case UHF_PORT_ENABLE:
2426 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2427 break;
2428 case UHF_PORT_SUSPEND:
2429 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2430 break;
2431 case UHF_PORT_POWER:
2432 /* Yes, writing to the LOW_SPEED bit clears power. */
2433 OWRITE4(sc, port, UPS_LOW_SPEED);
2434 break;
2435 case UHF_C_PORT_CONNECTION:
2436 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2437 break;
2438 case UHF_C_PORT_ENABLE:
2439 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2440 break;
2441 case UHF_C_PORT_SUSPEND:
2442 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2443 break;
2444 case UHF_C_PORT_OVER_CURRENT:
2445 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2446 break;
2447 case UHF_C_PORT_RESET:
2448 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2449 break;
2450 default:
2451 err = USBD_IOERROR;
2452 goto ret;
2453 }
2454 switch(value) {
2455 case UHF_C_PORT_CONNECTION:
2456 case UHF_C_PORT_ENABLE:
2457 case UHF_C_PORT_SUSPEND:
2458 case UHF_C_PORT_OVER_CURRENT:
2459 case UHF_C_PORT_RESET:
2460 /* Enable RHSC interrupt if condition is cleared. */
2461 if ((OREAD4(sc, port) >> 16) == 0)
2462 ohci_rhsc_able(sc, 1);
2463 break;
2464 default:
2465 break;
2466 }
2467 break;
2468 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2469 if ((value & 0xff) != 0) {
2470 err = USBD_IOERROR;
2471 goto ret;
2472 }
2473 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2474 hubd = ohci_hubd;
2475 hubd.bNbrPorts = sc->sc_noport;
2476 USETW(hubd.wHubCharacteristics,
2477 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2478 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2479 /* XXX overcurrent */
2480 );
2481 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2482 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2483 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2484 hubd.DeviceRemovable[i++] = (u_int8_t)v;
2485 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2486 l = min(len, hubd.bDescLength);
2487 totlen = l;
2488 memcpy(buf, &hubd, l);
2489 break;
2490 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2491 if (len != 4) {
2492 err = USBD_IOERROR;
2493 goto ret;
2494 }
2495 memset(buf, 0, len); /* ? XXX */
2496 totlen = len;
2497 break;
2498 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2499 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2500 index));
2501 if (index < 1 || index > sc->sc_noport) {
2502 err = USBD_IOERROR;
2503 goto ret;
2504 }
2505 if (len != 4) {
2506 err = USBD_IOERROR;
2507 goto ret;
2508 }
2509 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2510 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2511 v));
2512 USETW(ps.wPortStatus, v);
2513 USETW(ps.wPortChange, v >> 16);
2514 l = min(len, sizeof ps);
2515 memcpy(buf, &ps, l);
2516 totlen = l;
2517 break;
2518 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2519 err = USBD_IOERROR;
2520 goto ret;
2521 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2522 break;
2523 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2524 if (index < 1 || index > sc->sc_noport) {
2525 err = USBD_IOERROR;
2526 goto ret;
2527 }
2528 port = OHCI_RH_PORT_STATUS(index);
2529 switch(value) {
2530 case UHF_PORT_ENABLE:
2531 OWRITE4(sc, port, UPS_PORT_ENABLED);
2532 break;
2533 case UHF_PORT_SUSPEND:
2534 OWRITE4(sc, port, UPS_SUSPEND);
2535 break;
2536 case UHF_PORT_RESET:
2537 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2538 index));
2539 OWRITE4(sc, port, UPS_RESET);
2540 for (i = 0; i < 5; i++) {
2541 usb_delay_ms(&sc->sc_bus,
2542 USB_PORT_ROOT_RESET_DELAY);
2543 if (sc->sc_bus.dying) {
2544 err = USBD_IOERROR;
2545 goto ret;
2546 }
2547 if ((OREAD4(sc, port) & UPS_RESET) == 0)
2548 break;
2549 }
2550 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2551 index, OREAD4(sc, port)));
2552 break;
2553 case UHF_PORT_POWER:
2554 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2555 "%d\n", index));
2556 OWRITE4(sc, port, UPS_PORT_POWER);
2557 break;
2558 case UHF_PORT_DISOWN_TO_1_1:
2559 /* accept, but do nothing */
2560 break;
2561 default:
2562 err = USBD_IOERROR;
2563 goto ret;
2564 }
2565 break;
2566 default:
2567 err = USBD_IOERROR;
2568 goto ret;
2569 }
2570 xfer->actlen = totlen;
2571 err = USBD_NORMAL_COMPLETION;
2572 ret:
2573 xfer->status = err;
2574 s = splusb();
2575 usb_transfer_complete(xfer);
2576 splx(s);
2577 return (err);
2578 }
2579
2580 /* Abort a root control request. */
2581 void
ohci_root_ctrl_abort(struct usbd_xfer * xfer)2582 ohci_root_ctrl_abort(struct usbd_xfer *xfer)
2583 {
2584 /* Nothing to do, all transfers are synchronous. */
2585 }
2586
2587 /* Close the root pipe. */
2588 void
ohci_root_ctrl_close(struct usbd_pipe * pipe)2589 ohci_root_ctrl_close(struct usbd_pipe *pipe)
2590 {
2591 DPRINTF(("ohci_root_ctrl_close\n"));
2592 /* Nothing to do. */
2593 }
2594
2595 usbd_status
ohci_root_intr_transfer(struct usbd_xfer * xfer)2596 ohci_root_intr_transfer(struct usbd_xfer *xfer)
2597 {
2598 usbd_status err;
2599
2600 /* Insert last in queue. */
2601 err = usb_insert_transfer(xfer);
2602 if (err)
2603 return (err);
2604
2605 /* Pipe isn't running, start first */
2606 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2607 }
2608
2609 usbd_status
ohci_root_intr_start(struct usbd_xfer * xfer)2610 ohci_root_intr_start(struct usbd_xfer *xfer)
2611 {
2612 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus;
2613
2614 if (sc->sc_bus.dying)
2615 return (USBD_IOERROR);
2616
2617 sc->sc_intrxfer = xfer;
2618
2619 return (USBD_IN_PROGRESS);
2620 }
2621
2622 void
ohci_root_intr_abort(struct usbd_xfer * xfer)2623 ohci_root_intr_abort(struct usbd_xfer *xfer)
2624 {
2625 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus;
2626 int s;
2627
2628 sc->sc_intrxfer = NULL;
2629
2630 xfer->status = USBD_CANCELLED;
2631 s = splusb();
2632 usb_transfer_complete(xfer);
2633 splx(s);
2634 }
2635
2636 void
ohci_root_intr_close(struct usbd_pipe * pipe)2637 ohci_root_intr_close(struct usbd_pipe *pipe)
2638 {
2639 }
2640
2641 usbd_status
ohci_device_ctrl_transfer(struct usbd_xfer * xfer)2642 ohci_device_ctrl_transfer(struct usbd_xfer *xfer)
2643 {
2644 usbd_status err;
2645
2646 /* Insert last in queue. */
2647 err = usb_insert_transfer(xfer);
2648 if (err)
2649 return (err);
2650
2651 /* Pipe isn't running, start first */
2652 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2653 }
2654
2655 usbd_status
ohci_device_ctrl_start(struct usbd_xfer * xfer)2656 ohci_device_ctrl_start(struct usbd_xfer *xfer)
2657 {
2658 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus;
2659 usbd_status err;
2660
2661 if (sc->sc_bus.dying)
2662 return (USBD_IOERROR);
2663
2664 #ifdef DIAGNOSTIC
2665 if (!(xfer->rqflags & URQ_REQUEST)) {
2666 /* XXX panic */
2667 printf("ohci_device_ctrl_transfer: not a request\n");
2668 return (USBD_INVAL);
2669 }
2670 #endif
2671
2672 err = ohci_device_request(xfer);
2673 if (err)
2674 return (err);
2675
2676 return (USBD_IN_PROGRESS);
2677 }
2678
2679 /* Abort a device control request. */
2680 void
ohci_device_ctrl_abort(struct usbd_xfer * xfer)2681 ohci_device_ctrl_abort(struct usbd_xfer *xfer)
2682 {
2683 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2684 ohci_abort_xfer(xfer, USBD_CANCELLED);
2685 }
2686
2687 /* Close a device control pipe. */
2688 void
ohci_device_ctrl_close(struct usbd_pipe * pipe)2689 ohci_device_ctrl_close(struct usbd_pipe *pipe)
2690 {
2691 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2692 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus;
2693
2694 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2695 ohci_close_pipe(pipe, sc->sc_ctrl_head);
2696 ohci_free_std(sc, opipe->tail.td);
2697 }
2698
2699 /************************/
2700
2701 void
ohci_device_clear_toggle(struct usbd_pipe * pipe)2702 ohci_device_clear_toggle(struct usbd_pipe *pipe)
2703 {
2704 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2705
2706 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
2707 }
2708
2709 usbd_status
ohci_device_bulk_transfer(struct usbd_xfer * xfer)2710 ohci_device_bulk_transfer(struct usbd_xfer *xfer)
2711 {
2712 usbd_status err;
2713
2714 /* Insert last in queue. */
2715 err = usb_insert_transfer(xfer);
2716 if (err)
2717 return (err);
2718
2719 /* Pipe isn't running, start first */
2720 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2721 }
2722
2723 usbd_status
ohci_device_bulk_start(struct usbd_xfer * xfer)2724 ohci_device_bulk_start(struct usbd_xfer *xfer)
2725 {
2726 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus;
2727 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2728 struct ohci_soft_td *data, *tail, *tdp;
2729 struct ohci_soft_ed *sed;
2730 u_int len;
2731 int s, endpt;
2732 usbd_status err;
2733
2734 if (sc->sc_bus.dying)
2735 return (USBD_IOERROR);
2736
2737 #ifdef DIAGNOSTIC
2738 if (xfer->rqflags & URQ_REQUEST) {
2739 /* XXX panic */
2740 printf("ohci_device_bulk_start: a request\n");
2741 return (USBD_INVAL);
2742 }
2743 #endif
2744
2745 len = xfer->length;
2746 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2747 sed = opipe->sed;
2748
2749 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%u "
2750 "flags=%d endpt=%d\n", xfer, len, xfer->flags, endpt));
2751
2752 /* Update device address */
2753 sed->ed.ed_flags = htole32(
2754 (letoh32(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2755 OHCI_ED_SET_FA(xfer->device->address));
2756
2757 /* Allocate a chain of new TDs (including a new tail). */
2758 data = opipe->tail.td;
2759 err = ohci_alloc_std_chain(sc, len, xfer, data, &tail);
2760 /* We want interrupt at the end of the transfer. */
2761 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK);
2762 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1));
2763 tail->flags |= OHCI_CALL_DONE;
2764 tail = tail->nexttd; /* point at sentinel */
2765 if (err)
2766 return (err);
2767
2768 tail->xfer = NULL;
2769 xfer->hcpriv = data;
2770
2771 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2772 "td_cbp=0x%08x td_be=0x%08x\n",
2773 (int)letoh32(sed->ed.ed_flags),
2774 (int)letoh32(data->td.td_flags),
2775 (int)letoh32(data->td.td_cbp),
2776 (int)letoh32(data->td.td_be)));
2777
2778 #ifdef OHCI_DEBUG
2779 if (ohcidebug > 5) {
2780 ohci_dump_ed(sed);
2781 ohci_dump_tds(data);
2782 }
2783 #endif
2784
2785 /* Insert ED in schedule */
2786 s = splusb();
2787 for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2788 tdp->xfer = xfer;
2789 }
2790 sed->ed.ed_tailp = htole32(tail->physaddr);
2791 opipe->tail.td = tail;
2792 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2793 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2794 if (xfer->timeout && !sc->sc_bus.use_polling) {
2795 timeout_del(&xfer->timeout_handle);
2796 timeout_set(&xfer->timeout_handle, ohci_timeout, xfer);
2797 timeout_add_msec(&xfer->timeout_handle, xfer->timeout);
2798 }
2799
2800 #if 0
2801 /* This goes wrong if we are too slow. */
2802 if (ohcidebug > 10) {
2803 delay(10000);
2804 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2805 OREAD4(sc, OHCI_COMMAND_STATUS)));
2806 ohci_dump_ed(sed);
2807 ohci_dump_tds(data);
2808 }
2809 #endif
2810
2811 splx(s);
2812
2813 return (USBD_IN_PROGRESS);
2814 }
2815
2816 void
ohci_device_bulk_abort(struct usbd_xfer * xfer)2817 ohci_device_bulk_abort(struct usbd_xfer *xfer)
2818 {
2819 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2820 ohci_abort_xfer(xfer, USBD_CANCELLED);
2821 }
2822
2823 /*
2824 * Close a device bulk pipe.
2825 */
2826 void
ohci_device_bulk_close(struct usbd_pipe * pipe)2827 ohci_device_bulk_close(struct usbd_pipe *pipe)
2828 {
2829 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2830 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus;
2831
2832 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2833 ohci_close_pipe(pipe, sc->sc_bulk_head);
2834 ohci_free_std(sc, opipe->tail.td);
2835 }
2836
2837 /************************/
2838
2839 usbd_status
ohci_device_intr_transfer(struct usbd_xfer * xfer)2840 ohci_device_intr_transfer(struct usbd_xfer *xfer)
2841 {
2842 usbd_status err;
2843
2844 /* Insert last in queue. */
2845 err = usb_insert_transfer(xfer);
2846 if (err)
2847 return (err);
2848
2849 /* Pipe isn't running, start first */
2850 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2851 }
2852
2853 usbd_status
ohci_device_intr_start(struct usbd_xfer * xfer)2854 ohci_device_intr_start(struct usbd_xfer *xfer)
2855 {
2856 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus;
2857 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2858 struct ohci_soft_ed *sed = opipe->sed;
2859 struct ohci_soft_td *data, *tail;
2860 int s, len, endpt;
2861
2862 if (sc->sc_bus.dying)
2863 return (USBD_IOERROR);
2864
2865 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%u "
2866 "flags=%d priv=%p\n",
2867 xfer, xfer->length, xfer->flags, xfer->priv));
2868
2869 #ifdef DIAGNOSTIC
2870 if (xfer->rqflags & URQ_REQUEST)
2871 panic("ohci_device_intr_transfer: a request");
2872 #endif
2873
2874 usb_syncmem(&xfer->dmabuf, 0, xfer->length,
2875 usbd_xfer_isread(xfer) ?
2876 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
2877
2878 len = xfer->length;
2879 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2880
2881 data = opipe->tail.td;
2882 tail = ohci_alloc_std(sc);
2883 if (tail == NULL)
2884 return (USBD_NOMEM);
2885 tail->xfer = NULL;
2886
2887 data->td.td_flags = htole32(
2888 (usbd_xfer_isread(xfer) ? OHCI_TD_IN : OHCI_TD_OUT) |
2889 OHCI_TD_NOCC |
2890 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2891 if (xfer->flags & USBD_SHORT_XFER_OK)
2892 data->td.td_flags |= htole32(OHCI_TD_R);
2893 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
2894 data->nexttd = tail;
2895 data->td.td_nexttd = htole32(tail->physaddr);
2896 data->td.td_be = htole32(letoh32(data->td.td_cbp) + len - 1);
2897 data->len = len;
2898 data->xfer = xfer;
2899 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
2900 xfer->hcpriv = data;
2901
2902 #ifdef OHCI_DEBUG
2903 if (ohcidebug > 5) {
2904 DPRINTF(("ohci_device_intr_transfer:\n"));
2905 ohci_dump_ed(sed);
2906 ohci_dump_tds(data);
2907 }
2908 #endif
2909
2910 /* Insert ED in schedule */
2911 s = splusb();
2912 sed->ed.ed_tailp = htole32(tail->physaddr);
2913 opipe->tail.td = tail;
2914 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2915
2916 #if 0
2917 /*
2918 * This goes horribly wrong, printing thousands of descriptors,
2919 * because false references are followed due to the fact that the
2920 * TD is gone.
2921 */
2922 if (ohcidebug > 5) {
2923 usb_delay_ms(&sc->sc_bus, 5);
2924 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2925 OREAD4(sc, OHCI_COMMAND_STATUS)));
2926 ohci_dump_ed(sed);
2927 ohci_dump_tds(data);
2928 }
2929 #endif
2930 splx(s);
2931
2932 return (USBD_IN_PROGRESS);
2933 }
2934
2935 void
ohci_device_intr_abort(struct usbd_xfer * xfer)2936 ohci_device_intr_abort(struct usbd_xfer *xfer)
2937 {
2938 KASSERT(!xfer->pipe->repeat || xfer->pipe->intrxfer == xfer);
2939
2940 ohci_abort_xfer(xfer, USBD_CANCELLED);
2941 }
2942
2943 /* Close a device interrupt pipe. */
2944 void
ohci_device_intr_close(struct usbd_pipe * pipe)2945 ohci_device_intr_close(struct usbd_pipe *pipe)
2946 {
2947 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2948 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus;
2949 int nslots = opipe->u.intr.nslots;
2950 int pos = opipe->u.intr.pos;
2951 int j;
2952 struct ohci_soft_ed *p, *sed = opipe->sed;
2953 int s;
2954
2955 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
2956 pipe, nslots, pos));
2957 s = splusb();
2958 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2959 if ((letoh32(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2960 (letoh32(sed->ed.ed_headp) & OHCI_HEADMASK))
2961 usb_delay_ms(&sc->sc_bus, 2);
2962
2963 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
2964 ;
2965 #ifdef DIAGNOSTIC
2966 if (p == NULL)
2967 panic("ohci_device_intr_close: ED not found");
2968 #endif
2969 p->next = sed->next;
2970 p->ed.ed_nexted = sed->ed.ed_nexted;
2971 splx(s);
2972
2973 for (j = 0; j < nslots; j++)
2974 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
2975
2976 ohci_free_std(sc, opipe->tail.td);
2977 ohci_free_sed(sc, opipe->sed);
2978 }
2979
2980 usbd_status
ohci_device_setintr(struct ohci_softc * sc,struct ohci_pipe * opipe,int ival)2981 ohci_device_setintr(struct ohci_softc *sc, struct ohci_pipe *opipe, int ival)
2982 {
2983 int i, j, s, best;
2984 u_int npoll, slow, shigh, nslots;
2985 u_int bestbw, bw;
2986 struct ohci_soft_ed *hsed, *sed = opipe->sed;
2987
2988 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
2989 if (ival == 0) {
2990 printf("ohci_setintr: 0 interval\n");
2991 return (USBD_INVAL);
2992 }
2993
2994 npoll = OHCI_NO_INTRS;
2995 while (npoll > ival)
2996 npoll /= 2;
2997 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
2998
2999 /*
3000 * We now know which level in the tree the ED must go into.
3001 * Figure out which slot has most bandwidth left over.
3002 * Slots to examine:
3003 * npoll
3004 * 1 0
3005 * 2 1 2
3006 * 4 3 4 5 6
3007 * 8 7 8 9 10 11 12 13 14
3008 * N (N-1) .. (N-1+N-1)
3009 */
3010 slow = npoll-1;
3011 shigh = slow + npoll;
3012 nslots = OHCI_NO_INTRS / npoll;
3013 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3014 bw = 0;
3015 for (j = 0; j < nslots; j++)
3016 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3017 if (bw < bestbw) {
3018 best = i;
3019 bestbw = bw;
3020 }
3021 }
3022 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3023 best, slow, shigh, bestbw));
3024
3025 s = splusb();
3026 hsed = sc->sc_eds[best];
3027 sed->next = hsed->next;
3028 sed->ed.ed_nexted = hsed->ed.ed_nexted;
3029 hsed->next = sed;
3030 hsed->ed.ed_nexted = htole32(sed->physaddr);
3031 splx(s);
3032
3033 for (j = 0; j < nslots; j++)
3034 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3035 opipe->u.intr.nslots = nslots;
3036 opipe->u.intr.pos = best;
3037
3038 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3039 return (USBD_NORMAL_COMPLETION);
3040 }
3041
3042 /***********************/
3043
3044 usbd_status
ohci_device_isoc_transfer(struct usbd_xfer * xfer)3045 ohci_device_isoc_transfer(struct usbd_xfer *xfer)
3046 {
3047 usbd_status err;
3048
3049 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3050
3051 /* Put it on our queue, */
3052 err = usb_insert_transfer(xfer);
3053
3054 /* bail out on error, */
3055 if (err && err != USBD_IN_PROGRESS)
3056 return (err);
3057
3058 /* XXX should check inuse here */
3059
3060 /* insert into schedule, */
3061 ohci_device_isoc_enter(xfer);
3062
3063 /* and start if the pipe wasn't running */
3064 if (!err)
3065 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3066
3067 return (err);
3068 }
3069
3070 void
ohci_device_isoc_enter(struct usbd_xfer * xfer)3071 ohci_device_isoc_enter(struct usbd_xfer *xfer)
3072 {
3073 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus;
3074 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3075 struct ohci_soft_ed *sed = opipe->sed;
3076 struct iso *iso = &opipe->u.iso;
3077 struct ohci_soft_itd *sitd, *nsitd;
3078 ohci_physaddr_t buf, offs, noffs, bp0;
3079 int i, ncur, nframes;
3080 int s;
3081
3082 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3083 "nframes=%d\n",
3084 iso->inuse, iso->next, xfer, xfer->nframes));
3085
3086 if (sc->sc_bus.dying)
3087 return;
3088
3089 usb_syncmem(&xfer->dmabuf, 0, xfer->length,
3090 usbd_xfer_isread(xfer) ?
3091 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
3092
3093 if (iso->next == -1) {
3094 /* Not in use yet, schedule it a few frames ahead. */
3095 iso->next = letoh32(sc->sc_hcca->hcca_frame_number) + 5;
3096 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3097 iso->next));
3098 }
3099
3100 sitd = opipe->tail.itd;
3101 buf = DMAADDR(&xfer->dmabuf, 0);
3102 bp0 = OHCI_PAGE(buf);
3103 offs = OHCI_PAGE_OFFSET(buf);
3104 nframes = xfer->nframes;
3105 xfer->hcpriv = sitd;
3106 for (i = ncur = 0; i < nframes; i++, ncur++) {
3107 noffs = offs + xfer->frlengths[i];
3108 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3109 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3110
3111 /* Allocate next ITD */
3112 nsitd = ohci_alloc_sitd(sc);
3113 if (nsitd == NULL) {
3114 /* XXX what now? */
3115 printf("%s: isoc TD alloc failed\n",
3116 sc->sc_bus.bdev.dv_xname);
3117 return;
3118 }
3119
3120 /* Fill current ITD */
3121 sitd->itd.itd_flags = htole32(
3122 OHCI_ITD_NOCC |
3123 OHCI_ITD_SET_SF(iso->next) |
3124 OHCI_ITD_SET_DI(6) | /* delay intr a little */
3125 OHCI_ITD_SET_FC(ncur));
3126 sitd->itd.itd_bp0 = htole32(bp0);
3127 sitd->nextitd = nsitd;
3128 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3129 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3130 sitd->xfer = xfer;
3131 sitd->flags = 0;
3132
3133 sitd = nsitd;
3134 iso->next = iso->next + ncur;
3135 bp0 = OHCI_PAGE(buf + offs);
3136 ncur = 0;
3137 }
3138 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs));
3139 offs = noffs;
3140 }
3141 nsitd = ohci_alloc_sitd(sc);
3142 if (nsitd == NULL) {
3143 /* XXX what now? */
3144 printf("%s: isoc TD alloc failed\n",
3145 sc->sc_bus.bdev.dv_xname);
3146 return;
3147 }
3148 /* Fixup last used ITD */
3149 sitd->itd.itd_flags = htole32(
3150 OHCI_ITD_NOCC |
3151 OHCI_ITD_SET_SF(iso->next) |
3152 OHCI_ITD_SET_DI(0) |
3153 OHCI_ITD_SET_FC(ncur));
3154 sitd->itd.itd_bp0 = htole32(bp0);
3155 sitd->nextitd = nsitd;
3156 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3157 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3158 sitd->xfer = xfer;
3159 sitd->flags = OHCI_CALL_DONE;
3160
3161 iso->next = iso->next + ncur;
3162 iso->inuse += nframes;
3163
3164 xfer->actlen = offs; /* XXX pretend we did it all */
3165
3166 xfer->status = USBD_IN_PROGRESS;
3167
3168 #ifdef OHCI_DEBUG
3169 if (ohcidebug > 5) {
3170 DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3171 letoh32(sc->sc_hcca->hcca_frame_number)));
3172 ohci_dump_itds(xfer->hcpriv);
3173 ohci_dump_ed(sed);
3174 }
3175 #endif
3176
3177 s = splusb();
3178 sed->ed.ed_tailp = htole32(nsitd->physaddr);
3179 opipe->tail.itd = nsitd;
3180 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3181 splx(s);
3182
3183 #ifdef OHCI_DEBUG
3184 if (ohcidebug > 5) {
3185 delay(150000);
3186 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3187 letoh32(sc->sc_hcca->hcca_frame_number)));
3188 ohci_dump_itds(xfer->hcpriv);
3189 ohci_dump_ed(sed);
3190 }
3191 #endif
3192 }
3193
3194 usbd_status
ohci_device_isoc_start(struct usbd_xfer * xfer)3195 ohci_device_isoc_start(struct usbd_xfer *xfer)
3196 {
3197 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus;
3198
3199 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3200
3201 if (sc->sc_bus.dying)
3202 return (USBD_IOERROR);
3203
3204 #ifdef DIAGNOSTIC
3205 if (xfer->status != USBD_IN_PROGRESS)
3206 printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3207 #endif
3208
3209 return (USBD_IN_PROGRESS);
3210 }
3211
3212 void
ohci_device_isoc_abort(struct usbd_xfer * xfer)3213 ohci_device_isoc_abort(struct usbd_xfer *xfer)
3214 {
3215 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus;
3216 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3217 struct ohci_soft_ed *sed;
3218 struct ohci_soft_itd *sitd;
3219 int s;
3220
3221 s = splusb();
3222
3223 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3224
3225 /* Transfer is already done. */
3226 if (xfer->status != USBD_NOT_STARTED &&
3227 xfer->status != USBD_IN_PROGRESS) {
3228 splx(s);
3229 printf("ohci_device_isoc_abort: early return\n");
3230 return;
3231 }
3232
3233 /* Give xfer the requested abort code. */
3234 xfer->status = USBD_CANCELLED;
3235
3236 sed = opipe->sed;
3237 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
3238
3239 sitd = xfer->hcpriv;
3240 #ifdef DIAGNOSTIC
3241 if (sitd == NULL) {
3242 splx(s);
3243 printf("ohci_device_isoc_abort: hcpriv==0\n");
3244 return;
3245 }
3246 #endif
3247 for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3248 #ifdef DIAGNOSTIC
3249 DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3250 sitd->isdone = 1;
3251 #endif
3252 }
3253
3254 splx(s);
3255
3256 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET);
3257
3258 s = splusb();
3259
3260 /* Run callback. */
3261 usb_transfer_complete(xfer);
3262
3263 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */
3264 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
3265
3266 splx(s);
3267 }
3268
3269 void
ohci_device_isoc_done(struct usbd_xfer * xfer)3270 ohci_device_isoc_done(struct usbd_xfer *xfer)
3271 {
3272 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
3273 }
3274
3275 usbd_status
ohci_setup_isoc(struct usbd_pipe * pipe)3276 ohci_setup_isoc(struct usbd_pipe *pipe)
3277 {
3278 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3279 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus;
3280 struct iso *iso = &opipe->u.iso;
3281 int s;
3282
3283 iso->next = -1;
3284 iso->inuse = 0;
3285
3286 s = splusb();
3287 ohci_add_ed(opipe->sed, sc->sc_isoc_head);
3288 splx(s);
3289
3290 return (USBD_NORMAL_COMPLETION);
3291 }
3292
3293 void
ohci_device_isoc_close(struct usbd_pipe * pipe)3294 ohci_device_isoc_close(struct usbd_pipe *pipe)
3295 {
3296 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3297 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus;
3298
3299 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3300 ohci_close_pipe(pipe, sc->sc_isoc_head);
3301 #ifdef DIAGNOSTIC
3302 opipe->tail.itd->isdone = 1;
3303 #endif
3304 ohci_free_sitd(sc, opipe->tail.itd);
3305 }
3306