xref: /openbsd/sys/arch/arm64/dev/smmuvar.h (revision a68d7a25)
1 /* $OpenBSD: smmuvar.h,v 1.8 2022/09/11 10:18:54 patrick Exp $ */
2 /*
3  * Copyright (c) 2021 Patrick Wildt <patrick@blueri.se>
4  *
5  * Permission to use, copy, modify, and distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  */
17 
18 struct smmu_softc;
19 struct smmu_domain {
20 	struct smmu_softc		*sd_sc;
21 	uint32_t			 sd_sid;
22 	bus_dma_tag_t			 sd_dmat;
23 	int				 sd_cb_idx;
24 	int				 sd_smr_idx;
25 	int				 sd_stage;
26 	int				 sd_4level;
27 	char				 sd_exname[32];
28 	struct extent			*sd_iovamap;
29 	union {
30 		struct smmuvp0 *l0;	/* virtual to physical table 4 lvl */
31 		struct smmuvp1 *l1;	/* virtual to physical table 3 lvl */
32 	} sd_vp;
33 	struct mutex			 sd_iova_mtx;
34 	struct mutex			 sd_pmap_mtx;
35 	SIMPLEQ_ENTRY(smmu_domain)	 sd_list;
36 };
37 
38 struct smmu_cb {
39 };
40 
41 struct smmu_cb_irq {
42 	struct smmu_softc		*cbi_sc;
43 	int				 cbi_idx;
44 };
45 
46 struct smmu_smr {
47 	struct smmu_domain		*ss_dom;
48 	uint16_t			 ss_id;
49 	uint16_t			 ss_mask;
50 };
51 
52 struct smmu_softc {
53 	struct device		  sc_dev;
54 	bus_space_tag_t		  sc_iot;
55 	bus_space_handle_t	  sc_ioh;
56 	bus_dma_tag_t		  sc_dmat;
57 	int			  sc_is_mmu500;
58 	int			  sc_is_ap806;
59 	int			  sc_is_qcom;
60 	int			  sc_bypass_quirk;
61 	size_t			  sc_pagesize;
62 	int			  sc_numpage;
63 	int			  sc_num_context_banks;
64 	int			  sc_num_s2_context_banks;
65 	int			  sc_has_s1;
66 	int			  sc_has_s2;
67 	int			  sc_has_exids;
68 	int			  sc_has_vmid16s;
69 	int			  sc_num_streams;
70 	uint16_t		  sc_stream_mask;
71 	int			  sc_ipa_bits;
72 	int			  sc_pa_bits;
73 	int			  sc_va_bits;
74 	struct smmu_smr		**sc_smr;
75 	struct smmu_cb		**sc_cb;
76 	int			  sc_coherent;
77 	struct pool		  sc_vp_pool;
78 	struct pool		  sc_vp3_pool;
79 	SIMPLEQ_HEAD(, smmu_domain) sc_domains;
80 };
81 
82 int smmu_attach(struct smmu_softc *);
83 int smmu_global_irq(void *);
84 int smmu_context_irq(void *);
85 bus_dma_tag_t smmu_device_map(void *, uint32_t, bus_dma_tag_t);
86 void smmu_reserve_region(void *, uint32_t, bus_addr_t, bus_size_t);
87