1 /* $NetBSD: mb89352.c,v 1.54 2013/11/04 16:54:56 christos Exp $ */
2 /* NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp */
3
4 /*-
5 * Copyright (c) 1996-1999,2004 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 *
32 * Copyright (c) 1994 Jarle Greipsland
33 * All rights reserved.
34 *
35 * Redistribution and use in source and binary forms, with or without
36 * modification, are permitted provided that the following conditions
37 * are met:
38 * 1. Redistributions of source code must retain the above copyright
39 * notice, this list of conditions and the following disclaimer.
40 * 2. Redistributions in binary form must reproduce the above copyright
41 * notice, this list of conditions and the following disclaimer in the
42 * documentation and/or other materials provided with the distribution.
43 * 3. The name of the author may not be used to endorse or promote products
44 * derived from this software without specific prior written permission.
45 *
46 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
47 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
48 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
49 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
50 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
51 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
52 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
53 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
54 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
55 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
56 * POSSIBILITY OF SUCH DAMAGE.
57 */
58 /*
59 * [NetBSD for NEC PC-98 series]
60 * Copyright (c) 1996, 1997, 1998
61 * NetBSD/pc98 porting staff. All rights reserved.
62 * Copyright (c) 1996, 1997, 1998
63 * Kouichi Matsuda. All rights reserved.
64 */
65
66 /*
67 * Acknowledgements: Many of the algorithms used in this driver are
68 * inspired by the work of Julian Elischer (julian@tfs.com) and
69 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million!
70 */
71
72 /* TODO list:
73 * 1) Get the DMA stuff working.
74 * 2) Get the iov/uio stuff working. Is this a good thing ???
75 * 3) Get the synch stuff working.
76 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.?
77 */
78
79 #include <sys/cdefs.h>
80 __KERNEL_RCSID(0, "$NetBSD: mb89352.c,v 1.54 2013/11/04 16:54:56 christos Exp $");
81
82 #ifdef DDB
83 #define integrate
84 #else
85 #define integrate inline static
86 #endif
87
88 /*
89 * A few customizable items:
90 */
91
92 /* Synchronous data transfers? */
93 #define SPC_USE_SYNCHRONOUS 0
94 #define SPC_SYNC_REQ_ACK_OFS 8
95
96 /* Wide data transfers? */
97 #define SPC_USE_WIDE 0
98 #define SPC_MAX_WIDTH 0
99
100 /* Max attempts made to transmit a message */
101 #define SPC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */
102
103 /*
104 * Some spin loop parameters (essentially how long to wait some places)
105 * The problem(?) is that sometimes we expect either to be able to transmit a
106 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid
107 * returning from the interrupt just to get yanked back for the next byte we
108 * may spin in the interrupt routine waiting for this byte to come. How long?
109 * This is really (SCSI) device and processor dependent. Tuneable, I guess.
110 */
111 #define SPC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */
112 #define SPC_MSGOUT_SPIN 1
113
114 /*
115 * Include debug functions? At the end of this file there are a bunch of
116 * functions that will print out various information regarding queued SCSI
117 * commands, driver state and chip contents. You can call them from the
118 * kernel debugger. If you set SPC_DEBUG to 0 they are not included (the
119 * kernel uses less memory) but you lose the debugging facilities.
120 */
121 #if 0
122 #define SPC_DEBUG 1
123 #endif
124
125 #define SPC_ABORT_TIMEOUT 2000 /* time to wait for abort */
126
127 /* threshold length for DMA transfer */
128 #define SPC_MIN_DMA_LEN 32
129
130 #ifdef luna68k /* XXX old drives like DK312C in LUNAs require this */
131 #define NO_MANUAL_XFER
132 #endif
133 #ifdef x68k /* XXX it seems x68k SPC SCSI hardware has some quirks */
134 #define NEED_DREQ_ON_HARDWARE_XFER
135 #define NO_MANUAL_XFER
136 #endif
137
138 /* End of customizable parameters */
139
140 /*
141 * MB89352 SCSI Protocol Controller (SPC) routines.
142 */
143
144 #include "opt_ddb.h"
145
146 #include <sys/param.h>
147 #include <sys/systm.h>
148 #include <sys/kernel.h>
149 #include <sys/errno.h>
150 #include <sys/ioctl.h>
151 #include <sys/device.h>
152 #include <sys/buf.h>
153 #include <sys/proc.h>
154 #include <sys/queue.h>
155
156 #include <sys/intr.h>
157 #include <sys/bus.h>
158
159 #include <dev/scsipi/scsi_all.h>
160 #include <dev/scsipi/scsipi_all.h>
161 #include <dev/scsipi/scsi_message.h>
162 #include <dev/scsipi/scsiconf.h>
163
164 #include <dev/ic/mb89352reg.h>
165 #include <dev/ic/mb89352var.h>
166
167 #ifndef DDB
168 #define Debugger() panic("should call debugger here (mb89352.c)")
169 #endif /* ! DDB */
170
171 #if SPC_DEBUG
172 int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */
173 #endif
174
175 void spc_done(struct spc_softc *, struct spc_acb *);
176 void spc_dequeue(struct spc_softc *, struct spc_acb *);
177 void spc_scsipi_request(struct scsipi_channel *, scsipi_adapter_req_t,
178 void *);
179 int spc_poll(struct spc_softc *, struct scsipi_xfer *, int);
180 integrate void spc_sched_msgout(struct spc_softc *, uint8_t);
181 integrate void spc_setsync(struct spc_softc *, struct spc_tinfo *);
182 void spc_select(struct spc_softc *, struct spc_acb *);
183 void spc_timeout(void *);
184 void spc_scsi_reset(struct spc_softc *);
185 void spc_reset(struct spc_softc *);
186 void spc_free_acb(struct spc_softc *, struct spc_acb *, int);
187 struct spc_acb* spc_get_acb(struct spc_softc *);
188 int spc_reselect(struct spc_softc *, int);
189 void spc_msgin(struct spc_softc *);
190 void spc_abort(struct spc_softc *, struct spc_acb *);
191 void spc_msgout(struct spc_softc *);
192 int spc_dataout_pio(struct spc_softc *, uint8_t *, int);
193 int spc_datain_pio(struct spc_softc *, uint8_t *, int);
194 #if SPC_DEBUG
195 void spc_print_acb(struct spc_acb *);
196 void spc_dump_driver(struct spc_softc *);
197 void spc_dump89352(struct spc_softc *);
198 void spc_show_scsi_cmd(struct spc_acb *);
199 void spc_print_active_acb(void);
200 #endif
201
202 extern struct cfdriver spc_cd;
203
204 /*
205 * INITIALIZATION ROUTINES (probe, attach ++)
206 */
207
208 /*
209 * Do the real search-for-device.
210 * Prerequisite: sc->sc_iobase should be set to the proper value
211 */
212 int
spc_find(bus_space_tag_t iot,bus_space_handle_t ioh,int bdid)213 spc_find(bus_space_tag_t iot, bus_space_handle_t ioh, int bdid)
214 {
215 long timeout = SPC_ABORT_TIMEOUT;
216
217 SPC_TRACE(("spc: probing for spc-chip\n"));
218 /*
219 * Disable interrupts then reset the FUJITSU chip.
220 */
221 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
222 bus_space_write_1(iot, ioh, SCMD, 0);
223 bus_space_write_1(iot, ioh, PCTL, 0);
224 bus_space_write_1(iot, ioh, TEMP, 0);
225 bus_space_write_1(iot, ioh, TCH, 0);
226 bus_space_write_1(iot, ioh, TCM, 0);
227 bus_space_write_1(iot, ioh, TCL, 0);
228 bus_space_write_1(iot, ioh, INTS, 0);
229 bus_space_write_1(iot, ioh, SCTL,
230 SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
231 bus_space_write_1(iot, ioh, BDID, bdid);
232 delay(400);
233 bus_space_write_1(iot, ioh, SCTL,
234 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
235
236 /* The following detection is derived from spc.c
237 * (by Takahide Matsutsuka) in FreeBSD/pccard-test.
238 */
239 while (bus_space_read_1(iot, ioh, PSNS) && timeout) {
240 timeout--;
241 DELAY(1);
242 }
243 if (timeout == 0) {
244 printf("spc: find failed\n");
245 return 0;
246 }
247
248 SPC_START(("SPC found"));
249 return 1;
250 }
251
252 void
spc_attach(struct spc_softc * sc)253 spc_attach(struct spc_softc *sc)
254 {
255 struct scsipi_adapter *adapt = &sc->sc_adapter;
256 struct scsipi_channel *chan = &sc->sc_channel;
257
258 SPC_TRACE(("spc_attach "));
259 sc->sc_state = SPC_INIT;
260
261 sc->sc_freq = 20; /* XXXX Assume 20 MHz. */
262
263 #if SPC_USE_SYNCHRONOUS
264 /*
265 * These are the bounds of the sync period, based on the frequency of
266 * the chip's clock input and the size and offset of the sync period
267 * register.
268 *
269 * For a 20MHz clock, this gives us 25, or 100ns, or 10MB/s, as a
270 * maximum transfer rate, and 112.5, or 450ns, or 2.22MB/s, as a
271 * minimum transfer rate.
272 */
273 sc->sc_minsync = (2 * 250) / sc->sc_freq;
274 sc->sc_maxsync = (9 * 250) / sc->sc_freq;
275 #endif
276
277 /*
278 * Fill in the adapter.
279 */
280 adapt->adapt_dev = sc->sc_dev;
281 adapt->adapt_nchannels = 1;
282 adapt->adapt_openings = 7;
283 adapt->adapt_max_periph = 1;
284 adapt->adapt_request = spc_scsipi_request;
285 adapt->adapt_minphys = minphys;
286
287 chan->chan_adapter = &sc->sc_adapter;
288 chan->chan_bustype = &scsi_bustype;
289 chan->chan_channel = 0;
290 chan->chan_ntargets = 8;
291 chan->chan_nluns = 8;
292 chan->chan_id = sc->sc_initiator;
293
294 /*
295 * Add reference to adapter so that we drop the reference after
296 * config_found() to make sure the adatper is disabled.
297 */
298 if (scsipi_adapter_addref(adapt) != 0) {
299 aprint_error_dev(sc->sc_dev, "unable to enable controller\n");
300 return;
301 }
302
303 spc_init(sc, 1); /* Init chip and driver */
304
305 /*
306 * ask the adapter what subunits are present
307 */
308 sc->sc_child = config_found(sc->sc_dev, chan, scsiprint);
309 scsipi_adapter_delref(adapt);
310 }
311
312 void
spc_childdet(device_t self,device_t child)313 spc_childdet(device_t self, device_t child)
314 {
315 struct spc_softc *sc = device_private(self);
316
317 if (sc->sc_child == child)
318 sc->sc_child = NULL;
319 }
320
321 int
spc_detach(device_t self,int flags)322 spc_detach(device_t self, int flags)
323 {
324 struct spc_softc *sc = device_private(self);
325 int rv = 0;
326
327 if (sc->sc_child != NULL)
328 rv = config_detach(sc->sc_child, flags);
329
330 return (rv);
331 }
332
333 /*
334 * Initialize MB89352 chip itself
335 * The following conditions should hold:
336 * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc
337 * must be valid.
338 */
339 void
spc_reset(struct spc_softc * sc)340 spc_reset(struct spc_softc *sc)
341 {
342 bus_space_tag_t iot = sc->sc_iot;
343 bus_space_handle_t ioh = sc->sc_ioh;
344
345 SPC_TRACE(("spc_reset "));
346 /*
347 * Disable interrupts then reset the FUJITSU chip.
348 */
349 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
350 bus_space_write_1(iot, ioh, SCMD, 0);
351 bus_space_write_1(iot, ioh, TMOD, 0);
352 bus_space_write_1(iot, ioh, PCTL, 0);
353 bus_space_write_1(iot, ioh, TEMP, 0);
354 bus_space_write_1(iot, ioh, TCH, 0);
355 bus_space_write_1(iot, ioh, TCM, 0);
356 bus_space_write_1(iot, ioh, TCL, 0);
357 bus_space_write_1(iot, ioh, INTS, 0);
358 bus_space_write_1(iot, ioh, SCTL,
359 SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
360 bus_space_write_1(iot, ioh, BDID, sc->sc_initiator);
361 delay(400);
362 bus_space_write_1(iot, ioh, SCTL,
363 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
364 }
365
366
367 /*
368 * Pull the SCSI RST line for 500us.
369 */
370 void
spc_scsi_reset(struct spc_softc * sc)371 spc_scsi_reset(struct spc_softc *sc)
372 {
373 bus_space_tag_t iot = sc->sc_iot;
374 bus_space_handle_t ioh = sc->sc_ioh;
375
376 SPC_TRACE(("spc_scsi_reset "));
377 bus_space_write_1(iot, ioh, SCMD,
378 bus_space_read_1(iot, ioh, SCMD) | SCMD_RST);
379 delay(500);
380 bus_space_write_1(iot, ioh, SCMD,
381 bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST);
382 delay(50);
383 }
384
385 /*
386 * Initialize spc SCSI driver.
387 */
388 void
spc_init(struct spc_softc * sc,int bus_reset)389 spc_init(struct spc_softc *sc, int bus_reset)
390 {
391 struct spc_acb *acb;
392 int r;
393
394 SPC_TRACE(("spc_init "));
395 if (bus_reset) {
396 spc_reset(sc);
397 spc_scsi_reset(sc);
398 }
399 spc_reset(sc);
400
401 if (sc->sc_state == SPC_INIT) {
402 /* First time through; initialize. */
403 TAILQ_INIT(&sc->ready_list);
404 TAILQ_INIT(&sc->nexus_list);
405 TAILQ_INIT(&sc->free_list);
406 sc->sc_nexus = NULL;
407 acb = sc->sc_acb;
408 memset(acb, 0, sizeof(sc->sc_acb));
409 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) {
410 TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
411 acb++;
412 }
413 memset(&sc->sc_tinfo, 0, sizeof(sc->sc_tinfo));
414 } else {
415 /* Cancel any active commands. */
416 sc->sc_state = SPC_CLEANING;
417 if ((acb = sc->sc_nexus) != NULL) {
418 acb->xs->error = XS_DRIVER_STUFFUP;
419 callout_stop(&acb->xs->xs_callout);
420 spc_done(sc, acb);
421 }
422 while ((acb = TAILQ_FIRST(&sc->nexus_list)) != NULL) {
423 acb->xs->error = XS_DRIVER_STUFFUP;
424 callout_stop(&acb->xs->xs_callout);
425 spc_done(sc, acb);
426 }
427 }
428
429 sc->sc_prevphase = PH_INVALID;
430 for (r = 0; r < 8; r++) {
431 struct spc_tinfo *ti = &sc->sc_tinfo[r];
432
433 ti->flags = 0;
434 #if SPC_USE_SYNCHRONOUS
435 ti->flags |= DO_SYNC;
436 ti->period = sc->sc_minsync;
437 ti->offset = SPC_SYNC_REQ_ACK_OFS;
438 #else
439 ti->period = ti->offset = 0;
440 #endif
441 #if SPC_USE_WIDE
442 ti->flags |= DO_WIDE;
443 ti->width = SPC_MAX_WIDTH;
444 #else
445 ti->width = 0;
446 #endif
447 }
448
449 sc->sc_state = SPC_IDLE;
450 bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL,
451 bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB);
452 }
453
454 void
spc_free_acb(struct spc_softc * sc,struct spc_acb * acb,int flags)455 spc_free_acb(struct spc_softc *sc, struct spc_acb *acb, int flags)
456 {
457 int s;
458
459 SPC_TRACE(("spc_free_acb "));
460 s = splbio();
461
462 acb->flags = 0;
463 TAILQ_INSERT_HEAD(&sc->free_list, acb, chain);
464 splx(s);
465 }
466
467 struct spc_acb *
spc_get_acb(struct spc_softc * sc)468 spc_get_acb(struct spc_softc *sc)
469 {
470 struct spc_acb *acb;
471 int s;
472
473 SPC_TRACE(("spc_get_acb "));
474 s = splbio();
475 acb = TAILQ_FIRST(&sc->free_list);
476 if (acb != NULL) {
477 TAILQ_REMOVE(&sc->free_list, acb, chain);
478 acb->flags |= ACB_ALLOC;
479 }
480 splx(s);
481 return acb;
482 }
483
484 /*
485 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
486 */
487
488 /*
489 * Expected sequence:
490 * 1) Command inserted into ready list
491 * 2) Command selected for execution
492 * 3) Command won arbitration and has selected target device
493 * 4) Send message out (identify message, eventually also sync.negotiations)
494 * 5) Send command
495 * 5a) Receive disconnect message, disconnect.
496 * 5b) Reselected by target
497 * 5c) Receive identify message from target.
498 * 6) Send or receive data
499 * 7) Receive status
500 * 8) Receive message (command complete etc.)
501 */
502
503 /*
504 * Start a SCSI-command
505 * This function is called by the higher level SCSI-driver to queue/run
506 * SCSI-commands.
507 */
508 void
spc_scsipi_request(struct scsipi_channel * chan,scsipi_adapter_req_t req,void * arg)509 spc_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req,
510 void *arg)
511 {
512 struct scsipi_xfer *xs;
513 struct scsipi_periph *periph __diagused;
514 struct spc_softc *sc = device_private(chan->chan_adapter->adapt_dev);
515 struct spc_acb *acb;
516 int s, flags;
517
518 switch (req) {
519 case ADAPTER_REQ_RUN_XFER:
520 xs = arg;
521 periph = xs->xs_periph;
522 SPC_TRACE(("spc_scsipi_request "));
523 SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
524 periph->periph_target));
525
526 flags = xs->xs_control;
527 acb = spc_get_acb(sc);
528 #ifdef DIAGNOSTIC
529 /*
530 * This should nerver happen as we track the resources
531 * in the mid-layer.
532 */
533 if (acb == NULL) {
534 scsipi_printaddr(periph);
535 printf("unable to allocate acb\n");
536 panic("spc_scsipi_request");
537 }
538 #endif
539
540 /* Initialize acb */
541 acb->xs = xs;
542 acb->timeout = xs->timeout;
543
544 if (xs->xs_control & XS_CTL_RESET) {
545 acb->flags |= ACB_RESET;
546 acb->scsipi_cmd_length = 0;
547 acb->data_length = 0;
548 } else {
549 memcpy(&acb->scsipi_cmd, xs->cmd, xs->cmdlen);
550 acb->scsipi_cmd_length = xs->cmdlen;
551 acb->data_addr = xs->data;
552 acb->data_length = xs->datalen;
553 }
554 acb->target_stat = 0;
555
556 s = splbio();
557
558 TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain);
559 /*
560 * Start scheduling unless a queue process is in progress.
561 */
562 if (sc->sc_state == SPC_IDLE)
563 spc_sched(sc);
564 /*
565 * After successful sending, check if we should return just now.
566 * If so, return SUCCESSFULLY_QUEUED.
567 */
568
569 splx(s);
570
571 if ((flags & XS_CTL_POLL) == 0)
572 return;
573
574 /* Not allowed to use interrupts, use polling instead */
575 s = splbio();
576 if (spc_poll(sc, xs, acb->timeout)) {
577 spc_timeout(acb);
578 if (spc_poll(sc, xs, acb->timeout))
579 spc_timeout(acb);
580 }
581 splx(s);
582 return;
583 case ADAPTER_REQ_GROW_RESOURCES:
584 /* XXX Not supported. */
585 return;
586 case ADAPTER_REQ_SET_XFER_MODE:
587 {
588 /*
589 * We don't support Sync, Wide, or Tagged Command Queuing.
590 * Just callback now, to report this.
591 */
592 struct scsipi_xfer_mode *xm = arg;
593
594 xm->xm_mode = 0;
595 xm->xm_period = 0;
596 xm->xm_offset = 0;
597 scsipi_async_event(chan, ASYNC_EVENT_XFER_MODE, xm);
598 return;
599 }
600 }
601 }
602
603 /*
604 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
605 */
606 int
spc_poll(struct spc_softc * sc,struct scsipi_xfer * xs,int count)607 spc_poll(struct spc_softc *sc, struct scsipi_xfer *xs, int count)
608 {
609 bus_space_tag_t iot = sc->sc_iot;
610 bus_space_handle_t ioh = sc->sc_ioh;
611
612 SPC_TRACE(("spc_poll "));
613 while (count) {
614 /*
615 * If we had interrupts enabled, would we
616 * have got an interrupt?
617 */
618 if (bus_space_read_1(iot, ioh, INTS) != 0)
619 spc_intr(sc);
620 if ((xs->xs_status & XS_STS_DONE) != 0)
621 return 0;
622 delay(1000);
623 count--;
624 }
625 return 1;
626 }
627
628 /*
629 * LOW LEVEL SCSI UTILITIES
630 */
631
632 integrate void
spc_sched_msgout(struct spc_softc * sc,uint8_t m)633 spc_sched_msgout(struct spc_softc *sc, uint8_t m)
634 {
635 bus_space_tag_t iot = sc->sc_iot;
636 bus_space_handle_t ioh = sc->sc_ioh;
637
638 SPC_TRACE(("spc_sched_msgout "));
639 if (sc->sc_msgpriq == 0)
640 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
641 sc->sc_msgpriq |= m;
642 }
643
644 /*
645 * Set synchronous transfer offset and period.
646 */
647 integrate void
spc_setsync(struct spc_softc * sc,struct spc_tinfo * ti)648 spc_setsync(struct spc_softc *sc, struct spc_tinfo *ti)
649 {
650 #if SPC_USE_SYNCHRONOUS
651 bus_space_tag_t iot = sc->sc_iot;
652 bus_space_handle_t ioh = sc->sc_ioh;
653
654 SPC_TRACE(("spc_setsync "));
655 if (ti->offset != 0)
656 bus_space_write_1(iot, ioh, TMOD,
657 ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset);
658 else
659 bus_space_write_1(iot, ioh, TMOD, 0);
660 #endif
661 }
662
663 /*
664 * Start a selection. This is used by spc_sched() to select an idle target.
665 */
666 void
spc_select(struct spc_softc * sc,struct spc_acb * acb)667 spc_select(struct spc_softc *sc, struct spc_acb *acb)
668 {
669 struct scsipi_periph *periph = acb->xs->xs_periph;
670 int target = periph->periph_target;
671 struct spc_tinfo *ti = &sc->sc_tinfo[target];
672 bus_space_tag_t iot = sc->sc_iot;
673 bus_space_handle_t ioh = sc->sc_ioh;
674
675 SPC_TRACE(("spc_select "));
676 spc_setsync(sc, ti);
677
678 #if 0
679 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
680 #endif
681
682 bus_space_write_1(iot, ioh, PCTL, 0);
683 bus_space_write_1(iot, ioh, TEMP,
684 (1 << sc->sc_initiator) | (1 << target));
685 /*
686 * Setup BSY timeout (selection timeout).
687 * 250ms according to the SCSI specification.
688 * T = (X * 256 + 15) * Tclf * 2 (Tclf = 200ns on x68k)
689 * To setup 256ms timeout,
690 * 128000ns/200ns = X * 256 + 15
691 * 640 - 15 = X * 256
692 * X = 625 / 256
693 * X = 2 + 113 / 256
694 * ==> tch = 2, tcm = 113 (correct?)
695 */
696 /* Time to the information transfer phase start. */
697 /* XXX These values should be calculated from sc_freq */
698 bus_space_write_1(iot, ioh, TCH, 2);
699 bus_space_write_1(iot, ioh, TCM, 113);
700 bus_space_write_1(iot, ioh, TCL, 3);
701 bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT);
702
703 sc->sc_state = SPC_SELECTING;
704 }
705
706 int
spc_reselect(struct spc_softc * sc,int message)707 spc_reselect(struct spc_softc *sc, int message)
708 {
709 uint8_t selid, target, lun;
710 struct spc_acb *acb;
711 struct scsipi_periph *periph;
712 struct spc_tinfo *ti;
713
714 SPC_TRACE(("spc_reselect "));
715 /*
716 * The SCSI chip made a snapshot of the data bus while the reselection
717 * was being negotiated. This enables us to determine which target did
718 * the reselect.
719 */
720 selid = sc->sc_selid & ~(1 << sc->sc_initiator);
721 if (selid & (selid - 1)) {
722 printf("%s: reselect with invalid selid %02x; "
723 "sending DEVICE RESET\n", device_xname(sc->sc_dev), selid);
724 SPC_BREAK();
725 goto reset;
726 }
727
728 /*
729 * Search wait queue for disconnected cmd
730 * The list should be short, so I haven't bothered with
731 * any more sophisticated structures than a simple
732 * singly linked list.
733 */
734 target = ffs(selid) - 1;
735 lun = message & 0x07;
736 TAILQ_FOREACH(acb, &sc->nexus_list, chain) {
737 periph = acb->xs->xs_periph;
738 if (periph->periph_target == target &&
739 periph->periph_lun == lun)
740 break;
741 }
742 if (acb == NULL) {
743 printf("%s: reselect from target %d lun %d with no nexus; "
744 "sending ABORT\n", device_xname(sc->sc_dev), target, lun);
745 SPC_BREAK();
746 goto abort;
747 }
748
749 /* Make this nexus active again. */
750 TAILQ_REMOVE(&sc->nexus_list, acb, chain);
751 sc->sc_state = SPC_CONNECTED;
752 sc->sc_nexus = acb;
753 ti = &sc->sc_tinfo[target];
754 ti->lubusy |= (1 << lun);
755 spc_setsync(sc, ti);
756
757 if (acb->flags & ACB_RESET)
758 spc_sched_msgout(sc, SEND_DEV_RESET);
759 else if (acb->flags & ACB_ABORT)
760 spc_sched_msgout(sc, SEND_ABORT);
761
762 /* Do an implicit RESTORE POINTERS. */
763 sc->sc_dp = acb->data_addr;
764 sc->sc_dleft = acb->data_length;
765 sc->sc_cp = (uint8_t *)&acb->scsipi_cmd;
766 sc->sc_cleft = acb->scsipi_cmd_length;
767
768 return (0);
769
770 reset:
771 spc_sched_msgout(sc, SEND_DEV_RESET);
772 return (1);
773
774 abort:
775 spc_sched_msgout(sc, SEND_ABORT);
776 return (1);
777 }
778
779 /*
780 * Schedule a SCSI operation. This has now been pulled out of the interrupt
781 * handler so that we may call it from spc_scsi_cmd and spc_done. This may
782 * save us an unnecessary interrupt just to get things going. Should only be
783 * called when state == SPC_IDLE and at bio pl.
784 */
785 void
spc_sched(struct spc_softc * sc)786 spc_sched(struct spc_softc *sc)
787 {
788 struct spc_acb *acb;
789 struct scsipi_periph *periph;
790 struct spc_tinfo *ti;
791
792 /* missing the hw, just return and wait for our hw */
793 if (sc->sc_flags & SPC_INACTIVE)
794 return;
795 SPC_TRACE(("spc_sched "));
796 /*
797 * Find first acb in ready queue that is for a target/lunit pair that
798 * is not busy.
799 */
800 TAILQ_FOREACH(acb, &sc->ready_list, chain) {
801 periph = acb->xs->xs_periph;
802 ti = &sc->sc_tinfo[periph->periph_target];
803 if ((ti->lubusy & (1 << periph->periph_lun)) == 0) {
804 SPC_MISC(("selecting %d:%d ",
805 periph->periph_target, periph->periph_lun));
806 TAILQ_REMOVE(&sc->ready_list, acb, chain);
807 sc->sc_nexus = acb;
808 spc_select(sc, acb);
809 return;
810 } else {
811 SPC_MISC(("%d:%d busy\n",
812 periph->periph_target, periph->periph_lun));
813 }
814 }
815 SPC_MISC(("idle "));
816 /* Nothing to start; just enable reselections and wait. */
817 }
818
819 /*
820 * POST PROCESSING OF SCSI_CMD (usually current)
821 */
822 void
spc_done(struct spc_softc * sc,struct spc_acb * acb)823 spc_done(struct spc_softc *sc, struct spc_acb *acb)
824 {
825 struct scsipi_xfer *xs = acb->xs;
826 struct scsipi_periph *periph = xs->xs_periph;
827 struct spc_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
828
829 SPC_TRACE(("spc_done "));
830
831 if (xs->error == XS_NOERROR) {
832 if (acb->flags & ACB_ABORT) {
833 xs->error = XS_DRIVER_STUFFUP;
834 } else {
835 switch (acb->target_stat) {
836 case SCSI_CHECK:
837 /* First, save the return values */
838 xs->resid = acb->data_length;
839 /* FALLTHROUGH */
840 case SCSI_BUSY:
841 xs->status = acb->target_stat;
842 xs->error = XS_BUSY;
843 break;
844 case SCSI_OK:
845 xs->resid = acb->data_length;
846 break;
847 default:
848 xs->error = XS_DRIVER_STUFFUP;
849 #if SPC_DEBUG
850 printf("%s: spc_done: bad stat 0x%x\n",
851 device_xname(sc->sc_dev), acb->target_stat);
852 #endif
853 break;
854 }
855 }
856 }
857
858 #if SPC_DEBUG
859 if ((spc_debug & SPC_SHOWMISC) != 0) {
860 if (xs->resid != 0)
861 printf("resid=%d ", xs->resid);
862 else
863 printf("error=%d\n", xs->error);
864 }
865 #endif
866
867 /*
868 * Remove the ACB from whatever queue it happens to be on.
869 */
870 if (acb->flags & ACB_NEXUS)
871 ti->lubusy &= ~(1 << periph->periph_lun);
872 if (acb == sc->sc_nexus) {
873 sc->sc_nexus = NULL;
874 sc->sc_state = SPC_IDLE;
875 spc_sched(sc);
876 } else
877 spc_dequeue(sc, acb);
878
879 spc_free_acb(sc, acb, xs->xs_control);
880 ti->cmds++;
881 scsipi_done(xs);
882 }
883
884 void
spc_dequeue(struct spc_softc * sc,struct spc_acb * acb)885 spc_dequeue(struct spc_softc *sc, struct spc_acb *acb)
886 {
887
888 SPC_TRACE(("spc_dequeue "));
889 if (acb->flags & ACB_NEXUS)
890 TAILQ_REMOVE(&sc->nexus_list, acb, chain);
891 else
892 TAILQ_REMOVE(&sc->ready_list, acb, chain);
893 }
894
895 /*
896 * INTERRUPT/PROTOCOL ENGINE
897 */
898
899 /*
900 * Precondition:
901 * The SCSI bus is already in the MSGI phase and there is a message byte
902 * on the bus, along with an asserted REQ signal.
903 */
904 void
spc_msgin(struct spc_softc * sc)905 spc_msgin(struct spc_softc *sc)
906 {
907 bus_space_tag_t iot = sc->sc_iot;
908 bus_space_handle_t ioh = sc->sc_ioh;
909 int n;
910 uint8_t msg;
911
912 SPC_TRACE(("spc_msgin "));
913
914 if (sc->sc_prevphase == PH_MSGIN) {
915 /* This is a continuation of the previous message. */
916 n = sc->sc_imp - sc->sc_imess;
917 goto nextbyte;
918 }
919
920 /* This is a new MESSAGE IN phase. Clean up our state. */
921 sc->sc_flags &= ~SPC_DROP_MSGIN;
922
923 nextmsg:
924 n = 0;
925 sc->sc_imp = &sc->sc_imess[n];
926
927 nextbyte:
928 /*
929 * Read a whole message, but don't ack the last byte. If we reject the
930 * message, we have to assert ATN during the message transfer phase
931 * itself.
932 */
933 for (;;) {
934 #ifdef NO_MANUAL_XFER /* XXX */
935 if (bus_space_read_1(iot, ioh, INTS) != 0) {
936 /*
937 * Target left MESSAGE IN, probably because it
938 * a) noticed our ATN signal, or
939 * b) ran out of messages.
940 */
941 goto out;
942 }
943 #endif
944 /* If parity error, just dump everything on the floor. */
945 if ((bus_space_read_1(iot, ioh, SERR) &
946 (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) {
947 sc->sc_flags |= SPC_DROP_MSGIN;
948 spc_sched_msgout(sc, SEND_PARITY_ERROR);
949 }
950
951 #ifdef NO_MANUAL_XFER /* XXX */
952 /* send TRANSFER command. */
953 bus_space_write_1(iot, ioh, TCH, 0);
954 bus_space_write_1(iot, ioh, TCM, 0);
955 bus_space_write_1(iot, ioh, TCL, 1);
956 bus_space_write_1(iot, ioh, PCTL,
957 sc->sc_phase | PCTL_BFINT_ENAB);
958 #ifdef NEED_DREQ_ON_HARDWARE_XFER
959 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);
960 #else
961 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR);
962 #endif
963 for (;;) {
964 if ((bus_space_read_1(iot, ioh, SSTS) &
965 SSTS_DREG_EMPTY) == 0)
966 break;
967 if (bus_space_read_1(iot, ioh, INTS) != 0)
968 goto out;
969 }
970 msg = bus_space_read_1(iot, ioh, DREG);
971 #else
972 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_ATN) != 0)
973 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
974 bus_space_write_1(iot, ioh, PCTL, PCTL_BFINT_ENAB | PH_MSGIN);
975
976 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) {
977 if ((bus_space_read_1(iot, ioh, PSNS) & PH_MASK)
978 != PH_MSGIN ||
979 bus_space_read_1(iot, ioh, INTS) != 0)
980 /*
981 * Target left MESSAGE IN, probably because it
982 * a) noticed our ATN signal, or
983 * b) ran out of messages.
984 */
985 goto out;
986 DELAY(1); /* XXX needs timeout */
987 }
988
989 msg = bus_space_read_1(iot, ioh, TEMP);
990 #endif
991
992 /* Gather incoming message bytes if needed. */
993 if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) {
994 if (n >= SPC_MAX_MSG_LEN) {
995 sc->sc_flags |= SPC_DROP_MSGIN;
996 spc_sched_msgout(sc, SEND_REJECT);
997 } else {
998 *sc->sc_imp++ = msg;
999 n++;
1000 /*
1001 * This testing is suboptimal, but most
1002 * messages will be of the one byte variety, so
1003 * it should not affect performance
1004 * significantly.
1005 */
1006 if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0]))
1007 break;
1008 if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0]))
1009 break;
1010 if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) &&
1011 n == sc->sc_imess[1] + 2)
1012 break;
1013 }
1014 }
1015 /*
1016 * If we reach this spot we're either:
1017 * a) in the middle of a multi-byte message, or
1018 * b) dropping bytes.
1019 */
1020
1021 #ifndef NO_MANUAL_XFER /* XXX */
1022 /* Ack the last byte read. */
1023 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK);
1024 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
1025 DELAY(1); /* XXX needs timeout */
1026 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
1027 #endif
1028 }
1029
1030 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0]));
1031
1032 /* We now have a complete message. Parse it. */
1033 switch (sc->sc_state) {
1034 struct spc_acb *acb;
1035 struct spc_tinfo *ti;
1036
1037 case SPC_CONNECTED:
1038 SPC_ASSERT(sc->sc_nexus != NULL);
1039 acb = sc->sc_nexus;
1040 ti = &sc->sc_tinfo[acb->xs->xs_periph->periph_target];
1041
1042 switch (sc->sc_imess[0]) {
1043 case MSG_CMDCOMPLETE:
1044 #if 0
1045 if (sc->sc_dleft < 0) {
1046 periph = acb->xs->xs_periph;
1047 printf("%s: %ld extra bytes from %d:%d\n",
1048 device_xname(sc->sc_dev),
1049 (long)-sc->sc_dleft,
1050 periph->periph_target, periph->periph_lun);
1051 sc->sc_dleft = 0;
1052 }
1053 #endif
1054 acb->xs->resid = acb->data_length = sc->sc_dleft;
1055 sc->sc_state = SPC_CMDCOMPLETE;
1056 break;
1057
1058 case MSG_PARITY_ERROR:
1059 /* Resend the last message. */
1060 spc_sched_msgout(sc, sc->sc_lastmsg);
1061 break;
1062
1063 case MSG_MESSAGE_REJECT:
1064 SPC_MISC(("message rejected %02x ", sc->sc_lastmsg));
1065 switch (sc->sc_lastmsg) {
1066 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
1067 case SEND_IDENTIFY:
1068 ti->flags &= ~(DO_SYNC | DO_WIDE);
1069 ti->period = ti->offset = 0;
1070 spc_setsync(sc, ti);
1071 ti->width = 0;
1072 break;
1073 #endif
1074 #if SPC_USE_SYNCHRONOUS
1075 case SEND_SDTR:
1076 ti->flags &= ~DO_SYNC;
1077 ti->period = ti->offset = 0;
1078 spc_setsync(sc, ti);
1079 break;
1080 #endif
1081 #if SPC_USE_WIDE
1082 case SEND_WDTR:
1083 ti->flags &= ~DO_WIDE;
1084 ti->width = 0;
1085 break;
1086 #endif
1087 case SEND_INIT_DET_ERR:
1088 spc_sched_msgout(sc, SEND_ABORT);
1089 break;
1090 }
1091 break;
1092
1093 case MSG_NOOP:
1094 break;
1095
1096 case MSG_DISCONNECT:
1097 ti->dconns++;
1098 sc->sc_state = SPC_DISCONNECT;
1099 break;
1100
1101 case MSG_SAVEDATAPOINTER:
1102 acb->data_addr = sc->sc_dp;
1103 acb->data_length = sc->sc_dleft;
1104 break;
1105
1106 case MSG_RESTOREPOINTERS:
1107 sc->sc_dp = acb->data_addr;
1108 sc->sc_dleft = acb->data_length;
1109 sc->sc_cp = (uint8_t *)&acb->scsipi_cmd;
1110 sc->sc_cleft = acb->scsipi_cmd_length;
1111 break;
1112
1113 case MSG_EXTENDED:
1114 switch (sc->sc_imess[2]) {
1115 #if SPC_USE_SYNCHRONOUS
1116 case MSG_EXT_SDTR:
1117 if (sc->sc_imess[1] != 3)
1118 goto reject;
1119 ti->period = sc->sc_imess[3];
1120 ti->offset = sc->sc_imess[4];
1121 ti->flags &= ~DO_SYNC;
1122 if (ti->offset == 0) {
1123 } else if (ti->period < sc->sc_minsync ||
1124 ti->period > sc->sc_maxsync ||
1125 ti->offset > 8) {
1126 ti->period = ti->offset = 0;
1127 spc_sched_msgout(sc, SEND_SDTR);
1128 } else {
1129 scsipi_printaddr(acb->xs->xs_periph);
1130 printf("sync, offset %d, "
1131 "period %dnsec\n",
1132 ti->offset, ti->period * 4);
1133 }
1134 spc_setsync(sc, ti);
1135 break;
1136 #endif
1137
1138 #if SPC_USE_WIDE
1139 case MSG_EXT_WDTR:
1140 if (sc->sc_imess[1] != 2)
1141 goto reject;
1142 ti->width = sc->sc_imess[3];
1143 ti->flags &= ~DO_WIDE;
1144 if (ti->width == 0) {
1145 } else if (ti->width > SPC_MAX_WIDTH) {
1146 ti->width = 0;
1147 spc_sched_msgout(sc, SEND_WDTR);
1148 } else {
1149 scsipi_printaddr(acb->xs->xs_periph);
1150 printf("wide, width %d\n",
1151 1 << (3 + ti->width));
1152 }
1153 break;
1154 #endif
1155
1156 default:
1157 printf("%s: unrecognized MESSAGE EXTENDED; "
1158 "sending REJECT\n",
1159 device_xname(sc->sc_dev));
1160 SPC_BREAK();
1161 goto reject;
1162 }
1163 break;
1164
1165 default:
1166 printf("%s: unrecognized MESSAGE; sending REJECT\n",
1167 device_xname(sc->sc_dev));
1168 SPC_BREAK();
1169 reject:
1170 spc_sched_msgout(sc, SEND_REJECT);
1171 break;
1172 }
1173 break;
1174
1175 case SPC_RESELECTED:
1176 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) {
1177 printf("%s: reselect without IDENTIFY; "
1178 "sending DEVICE RESET\n", device_xname(sc->sc_dev));
1179 SPC_BREAK();
1180 goto reset;
1181 }
1182
1183 (void) spc_reselect(sc, sc->sc_imess[0]);
1184 break;
1185
1186 default:
1187 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1188 device_xname(sc->sc_dev));
1189 SPC_BREAK();
1190 reset:
1191 spc_sched_msgout(sc, SEND_DEV_RESET);
1192 break;
1193
1194 #ifdef notdef
1195 abort:
1196 spc_sched_msgout(sc, SEND_ABORT);
1197 break;
1198 #endif
1199 }
1200
1201 #ifndef NO_MANUAL_XFER /* XXX */
1202 /* Ack the last message byte. */
1203 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK);
1204 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
1205 DELAY(1); /* XXX needs timeout */
1206 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
1207 #endif
1208
1209 /* Go get the next message, if any. */
1210 goto nextmsg;
1211
1212 out:
1213 #ifdef NO_MANUAL_XFER /* XXX */
1214 /* Ack the last message byte. */
1215 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
1216 #endif
1217 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0]));
1218 }
1219
1220 /*
1221 * Send the highest priority, scheduled message.
1222 */
1223 void
spc_msgout(struct spc_softc * sc)1224 spc_msgout(struct spc_softc *sc)
1225 {
1226 bus_space_tag_t iot = sc->sc_iot;
1227 bus_space_handle_t ioh = sc->sc_ioh;
1228 #if SPC_USE_SYNCHRONOUS
1229 struct spc_tinfo *ti;
1230 #endif
1231 int n;
1232
1233 SPC_TRACE(("spc_msgout "));
1234
1235 if (sc->sc_prevphase == PH_MSGOUT) {
1236 if (sc->sc_omp == sc->sc_omess) {
1237 /*
1238 * This is a retransmission.
1239 *
1240 * We get here if the target stayed in MESSAGE OUT
1241 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates
1242 * that all of the previously transmitted messages must
1243 * be sent again, in the same order. Therefore, we
1244 * requeue all the previously transmitted messages, and
1245 * start again from the top. Our simple priority
1246 * scheme keeps the messages in the right order.
1247 */
1248 SPC_MISC(("retransmitting "));
1249 sc->sc_msgpriq |= sc->sc_msgoutq;
1250 /*
1251 * Set ATN. If we're just sending a trivial 1-byte
1252 * message, we'll clear ATN later on anyway.
1253 */
1254 bus_space_write_1(iot, ioh, SCMD,
1255 SCMD_SET_ATN); /* XXX? */
1256 } else {
1257 /* This is a continuation of the previous message. */
1258 n = sc->sc_omp - sc->sc_omess;
1259 goto nextbyte;
1260 }
1261 }
1262
1263 /* No messages transmitted so far. */
1264 sc->sc_msgoutq = 0;
1265 sc->sc_lastmsg = 0;
1266
1267 nextmsg:
1268 /* Pick up highest priority message. */
1269 sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq;
1270 sc->sc_msgpriq &= ~sc->sc_currmsg;
1271 sc->sc_msgoutq |= sc->sc_currmsg;
1272
1273 /* Build the outgoing message data. */
1274 switch (sc->sc_currmsg) {
1275 case SEND_IDENTIFY:
1276 SPC_ASSERT(sc->sc_nexus != NULL);
1277 sc->sc_omess[0] =
1278 MSG_IDENTIFY(sc->sc_nexus->xs->xs_periph->periph_lun, 1);
1279 n = 1;
1280 break;
1281
1282 #if SPC_USE_SYNCHRONOUS
1283 case SEND_SDTR:
1284 SPC_ASSERT(sc->sc_nexus != NULL);
1285 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target];
1286 sc->sc_omess[4] = MSG_EXTENDED;
1287 sc->sc_omess[3] = MSG_EXT_SDTR_LEN;
1288 sc->sc_omess[2] = MSG_EXT_SDTR;
1289 sc->sc_omess[1] = ti->period >> 2;
1290 sc->sc_omess[0] = ti->offset;
1291 n = 5;
1292 break;
1293 #endif
1294
1295 #if SPC_USE_WIDE
1296 case SEND_WDTR:
1297 SPC_ASSERT(sc->sc_nexus != NULL);
1298 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target];
1299 sc->sc_omess[3] = MSG_EXTENDED;
1300 sc->sc_omess[2] = MSG_EXT_WDTR_LEN;
1301 sc->sc_omess[1] = MSG_EXT_WDTR;
1302 sc->sc_omess[0] = ti->width;
1303 n = 4;
1304 break;
1305 #endif
1306
1307 case SEND_DEV_RESET:
1308 sc->sc_flags |= SPC_ABORTING;
1309 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1310 n = 1;
1311 break;
1312
1313 case SEND_REJECT:
1314 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1315 n = 1;
1316 break;
1317
1318 case SEND_PARITY_ERROR:
1319 sc->sc_omess[0] = MSG_PARITY_ERROR;
1320 n = 1;
1321 break;
1322
1323 case SEND_INIT_DET_ERR:
1324 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1325 n = 1;
1326 break;
1327
1328 case SEND_ABORT:
1329 sc->sc_flags |= SPC_ABORTING;
1330 sc->sc_omess[0] = MSG_ABORT;
1331 n = 1;
1332 break;
1333
1334 default:
1335 printf("%s: unexpected MESSAGE OUT; sending NOOP\n",
1336 device_xname(sc->sc_dev));
1337 SPC_BREAK();
1338 sc->sc_omess[0] = MSG_NOOP;
1339 n = 1;
1340 break;
1341 }
1342 sc->sc_omp = &sc->sc_omess[n];
1343
1344 nextbyte:
1345 /* Send message bytes. */
1346 /* send TRANSFER command. */
1347 bus_space_write_1(iot, ioh, TCH, n >> 16);
1348 bus_space_write_1(iot, ioh, TCM, n >> 8);
1349 bus_space_write_1(iot, ioh, TCL, n);
1350 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1351 #ifdef NEED_DREQ_ON_HARDWARE_XFER
1352 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */
1353 #else
1354 bus_space_write_1(iot, ioh, SCMD,
1355 SCMD_XFR | SCMD_PROG_XFR);
1356 #endif
1357 for (;;) {
1358 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1359 break;
1360 if (bus_space_read_1(iot, ioh, INTS) != 0)
1361 goto out;
1362 }
1363 for (;;) {
1364 #if 0
1365 for (;;) {
1366 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
1367 break;
1368 /* Wait for REQINIT. XXX Need timeout. */
1369 }
1370 #endif
1371 if (bus_space_read_1(iot, ioh, INTS) != 0) {
1372 /*
1373 * Target left MESSAGE OUT, possibly to reject
1374 * our message.
1375 *
1376 * If this is the last message being sent, then we
1377 * deassert ATN, since either the target is going to
1378 * ignore this message, or it's going to ask for a
1379 * retransmission via MESSAGE PARITY ERROR (in which
1380 * case we reassert ATN anyway).
1381 */
1382 #if 0
1383 if (sc->sc_msgpriq == 0)
1384 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
1385 #endif
1386 goto out;
1387 }
1388
1389 #if 0
1390 /* Clear ATN before last byte if this is the last message. */
1391 if (n == 1 && sc->sc_msgpriq == 0)
1392 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
1393 #endif
1394
1395 while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0)
1396 DELAY(1);
1397 /* Send message byte. */
1398 bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp);
1399 --n;
1400 /* Keep track of the last message we've sent any bytes of. */
1401 sc->sc_lastmsg = sc->sc_currmsg;
1402 #if 0
1403 /* Wait for ACK to be negated. XXX Need timeout. */
1404 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
1405 ;
1406 #endif
1407
1408 if (n == 0)
1409 break;
1410 }
1411
1412 /* We get here only if the entire message has been transmitted. */
1413 if (sc->sc_msgpriq != 0) {
1414 /* There are more outgoing messages. */
1415 goto nextmsg;
1416 }
1417
1418 /*
1419 * The last message has been transmitted. We need to remember the last
1420 * message transmitted (in case the target switches to MESSAGE IN phase
1421 * and sends a MESSAGE REJECT), and the list of messages transmitted
1422 * this time around (in case the target stays in MESSAGE OUT phase to
1423 * request a retransmit).
1424 */
1425
1426 out:
1427 /* Disable REQ/ACK protocol. */
1428 return;
1429 }
1430
1431 /*
1432 * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc
1433 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted
1434 * and ACK deasserted (i.e. waiting for a data byte)
1435 *
1436 * This new revision has been optimized (I tried) to make the common case fast,
1437 * and the rarer cases (as a result) somewhat more comlex
1438 */
1439 int
spc_dataout_pio(struct spc_softc * sc,uint8_t * p,int n)1440 spc_dataout_pio(struct spc_softc *sc, uint8_t *p, int n)
1441 {
1442 bus_space_tag_t iot = sc->sc_iot;
1443 bus_space_handle_t ioh = sc->sc_ioh;
1444 uint8_t intstat = 0;
1445 int out = 0;
1446 #define DOUTAMOUNT 8 /* Full FIFO */
1447
1448 SPC_TRACE(("spc_dataout_pio "));
1449 /* send TRANSFER command. */
1450 bus_space_write_1(iot, ioh, TCH, n >> 16);
1451 bus_space_write_1(iot, ioh, TCM, n >> 8);
1452 bus_space_write_1(iot, ioh, TCL, n);
1453 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1454 #ifdef NEED_DREQ_ON_HARDWARE_XFER
1455 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */
1456 #else
1457 bus_space_write_1(iot, ioh, SCMD,
1458 SCMD_XFR | SCMD_PROG_XFR); /* XXX */
1459 #endif
1460 for (;;) {
1461 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1462 break;
1463 if (bus_space_read_1(iot, ioh, INTS) != 0)
1464 break;
1465 }
1466
1467 /*
1468 * I have tried to make the main loop as tight as possible. This
1469 * means that some of the code following the loop is a bit more
1470 * complex than otherwise.
1471 */
1472 while (n > 0) {
1473 int xfer;
1474
1475 for (;;) {
1476 intstat = bus_space_read_1(iot, ioh, INTS);
1477 /* Wait till buffer is empty. */
1478 if ((bus_space_read_1(iot, ioh, SSTS) &
1479 SSTS_DREG_EMPTY) != 0)
1480 break;
1481 /* Break on interrupt. */
1482 if (intstat != 0)
1483 goto phasechange;
1484 DELAY(1);
1485 }
1486
1487 xfer = min(DOUTAMOUNT, n);
1488
1489 SPC_MISC(("%d> ", xfer));
1490
1491 n -= xfer;
1492 out += xfer;
1493
1494 bus_space_write_multi_1(iot, ioh, DREG, p, xfer);
1495 p += xfer;
1496 }
1497
1498 if (out == 0) {
1499 for (;;) {
1500 if (bus_space_read_1(iot, ioh, INTS) != 0)
1501 break;
1502 DELAY(1);
1503 }
1504 SPC_MISC(("extra data "));
1505 } else {
1506 /* See the bytes off chip */
1507 for (;;) {
1508 /* Wait till buffer is empty. */
1509 if ((bus_space_read_1(iot, ioh, SSTS) &
1510 SSTS_DREG_EMPTY) != 0)
1511 break;
1512 intstat = bus_space_read_1(iot, ioh, INTS);
1513 /* Break on interrupt. */
1514 if (intstat != 0)
1515 goto phasechange;
1516 DELAY(1);
1517 }
1518 }
1519
1520 phasechange:
1521 /* Stop the FIFO data path. */
1522
1523 if (intstat != 0) {
1524 /* Some sort of phase change. */
1525 int amount;
1526
1527 amount = (bus_space_read_1(iot, ioh, TCH) << 16) |
1528 (bus_space_read_1(iot, ioh, TCM) << 8) |
1529 bus_space_read_1(iot, ioh, TCL);
1530 if (amount > 0) {
1531 out -= amount;
1532 SPC_MISC(("+%d ", amount));
1533 }
1534 }
1535
1536 return out;
1537 }
1538
1539 /*
1540 * spc_datain_pio: perform data transfers using the FIFO datapath in the spc
1541 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted
1542 * and ACK deasserted (i.e. at least one byte is ready).
1543 *
1544 * For now, uses a pretty dumb algorithm, hangs around until all data has been
1545 * transferred. This, is OK for fast targets, but not so smart for slow
1546 * targets which don't disconnect or for huge transfers.
1547 */
1548 int
spc_datain_pio(struct spc_softc * sc,uint8_t * p,int n)1549 spc_datain_pio(struct spc_softc *sc, uint8_t *p, int n)
1550 {
1551 bus_space_tag_t iot = sc->sc_iot;
1552 bus_space_handle_t ioh = sc->sc_ioh;
1553 int in = 0;
1554 uint8_t intstat, sstat;
1555 #define DINAMOUNT 8 /* Full FIFO */
1556
1557 SPC_TRACE(("spc_datain_pio "));
1558 /* send TRANSFER command. */
1559 bus_space_write_1(iot, ioh, TCH, n >> 16);
1560 bus_space_write_1(iot, ioh, TCM, n >> 8);
1561 bus_space_write_1(iot, ioh, TCL, n);
1562 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1563 #ifdef NEED_DREQ_ON_HARDWARE_XFER
1564 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */
1565 #else
1566 bus_space_write_1(iot, ioh, SCMD,
1567 SCMD_XFR | SCMD_PROG_XFR); /* XXX */
1568 #endif
1569
1570 /*
1571 * We leave this loop if one or more of the following is true:
1572 * a) phase != PH_DATAIN && FIFOs are empty
1573 * b) reset has occurred or busfree is detected.
1574 */
1575 intstat = 0;
1576 while (n > 0) {
1577 sstat = bus_space_read_1(iot, ioh, SSTS);
1578 if ((sstat & SSTS_DREG_FULL) != 0) {
1579 n -= DINAMOUNT;
1580 in += DINAMOUNT;
1581 bus_space_read_multi_1(iot, ioh, DREG, p, DINAMOUNT);
1582 p += DINAMOUNT;
1583 } else if ((sstat & SSTS_DREG_EMPTY) == 0) {
1584 n--;
1585 in++;
1586 *p++ = bus_space_read_1(iot, ioh, DREG);
1587 } else {
1588 if (intstat != 0)
1589 goto phasechange;
1590 intstat = bus_space_read_1(iot, ioh, INTS);
1591 }
1592 }
1593
1594 /*
1595 * Some SCSI-devices are rude enough to transfer more data than what
1596 * was requested, e.g. 2048 bytes from a CD-ROM instead of the
1597 * requested 512. Test for progress, i.e. real transfers. If no real
1598 * transfers have been performed (n is probably already zero) and the
1599 * FIFO is not empty, waste some bytes....
1600 */
1601 if (in == 0) {
1602 for (;;) {
1603 sstat = bus_space_read_1(iot, ioh, SSTS);
1604 if ((sstat & SSTS_DREG_EMPTY) == 0) {
1605 (void) bus_space_read_1(iot, ioh, DREG);
1606 } else {
1607 if (intstat != 0)
1608 goto phasechange;
1609 intstat = bus_space_read_1(iot, ioh, INTS);
1610 }
1611 DELAY(1);
1612 }
1613 SPC_MISC(("extra data "));
1614 }
1615
1616 phasechange:
1617 /* Stop the FIFO data path. */
1618
1619 return in;
1620 }
1621
1622 /*
1623 * Catch an interrupt from the adaptor
1624 */
1625 /*
1626 * This is the workhorse routine of the driver.
1627 * Deficiencies (for now):
1628 * 1) always uses programmed I/O
1629 */
1630 int
spc_intr(void * arg)1631 spc_intr(void *arg)
1632 {
1633 struct spc_softc *sc = arg;
1634 bus_space_tag_t iot = sc->sc_iot;
1635 bus_space_handle_t ioh = sc->sc_ioh;
1636 uint8_t ints;
1637 struct spc_acb *acb;
1638 struct scsipi_periph *periph;
1639 struct spc_tinfo *ti;
1640 int n;
1641
1642 SPC_TRACE(("spc_intr "));
1643
1644 ints = bus_space_read_1(iot, ioh, INTS);
1645 if (ints == 0)
1646 return 0;
1647
1648 /*
1649 * Disable interrupt.
1650 */
1651 bus_space_write_1(iot, ioh, SCTL,
1652 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB);
1653
1654 if (sc->sc_dma_done != NULL &&
1655 sc->sc_state == SPC_CONNECTED &&
1656 (sc->sc_flags & SPC_DOINGDMA) != 0 &&
1657 (sc->sc_phase == PH_DATAOUT || sc->sc_phase == PH_DATAIN)) {
1658 (*sc->sc_dma_done)(sc);
1659 }
1660
1661 loop:
1662 /*
1663 * Loop until transfer completion.
1664 */
1665 /*
1666 * First check for abnormal conditions, such as reset.
1667 */
1668 ints = bus_space_read_1(iot, ioh, INTS);
1669 SPC_MISC(("ints = 0x%x ", ints));
1670
1671 if ((ints & INTS_RST) != 0) {
1672 printf("%s: SCSI bus reset\n", device_xname(sc->sc_dev));
1673 goto reset;
1674 }
1675
1676 /*
1677 * Check for less serious errors.
1678 */
1679 if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR))
1680 != 0) {
1681 printf("%s: SCSI bus parity error\n", device_xname(sc->sc_dev));
1682 if (sc->sc_prevphase == PH_MSGIN) {
1683 sc->sc_flags |= SPC_DROP_MSGIN;
1684 spc_sched_msgout(sc, SEND_PARITY_ERROR);
1685 } else
1686 spc_sched_msgout(sc, SEND_INIT_DET_ERR);
1687 }
1688
1689 /*
1690 * If we're not already busy doing something test for the following
1691 * conditions:
1692 * 1) We have been reselected by something
1693 * 2) We have selected something successfully
1694 * 3) Our selection process has timed out
1695 * 4) This is really a bus free interrupt just to get a new command
1696 * going?
1697 * 5) Spurious interrupt?
1698 */
1699 switch (sc->sc_state) {
1700 case SPC_IDLE:
1701 case SPC_SELECTING:
1702 SPC_MISC(("ints:0x%02x ", ints));
1703
1704 if ((ints & INTS_SEL) != 0) {
1705 /*
1706 * We don't currently support target mode.
1707 */
1708 printf("%s: target mode selected; going to BUS FREE\n",
1709 device_xname(sc->sc_dev));
1710
1711 goto sched;
1712 } else if ((ints & INTS_RESEL) != 0) {
1713 SPC_MISC(("reselected "));
1714
1715 /*
1716 * If we're trying to select a target ourselves,
1717 * push our command back into the ready list.
1718 */
1719 if (sc->sc_state == SPC_SELECTING) {
1720 SPC_MISC(("backoff selector "));
1721 SPC_ASSERT(sc->sc_nexus != NULL);
1722 acb = sc->sc_nexus;
1723 sc->sc_nexus = NULL;
1724 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
1725 }
1726
1727 /* Save reselection ID. */
1728 sc->sc_selid = bus_space_read_1(iot, ioh, TEMP);
1729
1730 sc->sc_state = SPC_RESELECTED;
1731 } else if ((ints & INTS_CMD_DONE) != 0) {
1732 SPC_MISC(("selected "));
1733
1734 /*
1735 * We have selected a target. Things to do:
1736 * a) Determine what message(s) to send.
1737 * b) Verify that we're still selecting the target.
1738 * c) Mark device as busy.
1739 */
1740 if (sc->sc_state != SPC_SELECTING) {
1741 printf("%s: selection out while idle; "
1742 "resetting\n", device_xname(sc->sc_dev));
1743 SPC_BREAK();
1744 goto reset;
1745 }
1746 SPC_ASSERT(sc->sc_nexus != NULL);
1747 acb = sc->sc_nexus;
1748 periph = acb->xs->xs_periph;
1749 ti = &sc->sc_tinfo[periph->periph_target];
1750
1751 sc->sc_msgpriq = SEND_IDENTIFY;
1752 if (acb->flags & ACB_RESET)
1753 sc->sc_msgpriq |= SEND_DEV_RESET;
1754 else if (acb->flags & ACB_ABORT)
1755 sc->sc_msgpriq |= SEND_ABORT;
1756 else {
1757 #if SPC_USE_SYNCHRONOUS
1758 if ((ti->flags & DO_SYNC) != 0)
1759 sc->sc_msgpriq |= SEND_SDTR;
1760 #endif
1761 #if SPC_USE_WIDE
1762 if ((ti->flags & DO_WIDE) != 0)
1763 sc->sc_msgpriq |= SEND_WDTR;
1764 #endif
1765 }
1766
1767 acb->flags |= ACB_NEXUS;
1768 ti->lubusy |= (1 << periph->periph_lun);
1769
1770 /* Do an implicit RESTORE POINTERS. */
1771 sc->sc_dp = acb->data_addr;
1772 sc->sc_dleft = acb->data_length;
1773 sc->sc_cp = (uint8_t *)&acb->scsipi_cmd;
1774 sc->sc_cleft = acb->scsipi_cmd_length;
1775
1776 /* On our first connection, schedule a timeout. */
1777 if ((acb->xs->xs_control & XS_CTL_POLL) == 0)
1778 callout_reset(&acb->xs->xs_callout,
1779 mstohz(acb->timeout), spc_timeout, acb);
1780
1781 sc->sc_state = SPC_CONNECTED;
1782 } else if ((ints & INTS_TIMEOUT) != 0) {
1783 SPC_MISC(("selection timeout "));
1784
1785 if (sc->sc_state != SPC_SELECTING) {
1786 printf("%s: selection timeout while idle; "
1787 "resetting\n", device_xname(sc->sc_dev));
1788 SPC_BREAK();
1789 goto reset;
1790 }
1791 SPC_ASSERT(sc->sc_nexus != NULL);
1792 acb = sc->sc_nexus;
1793
1794 delay(250);
1795
1796 acb->xs->error = XS_SELTIMEOUT;
1797 goto finish;
1798 } else {
1799 if (sc->sc_state != SPC_IDLE) {
1800 printf("%s: BUS FREE while not idle; "
1801 "state=%d\n",
1802 device_xname(sc->sc_dev), sc->sc_state);
1803 SPC_BREAK();
1804 goto out;
1805 }
1806
1807 goto sched;
1808 }
1809
1810 /*
1811 * Turn off selection stuff, and prepare to catch bus free
1812 * interrupts, parity errors, and phase changes.
1813 */
1814
1815 sc->sc_flags = 0;
1816 sc->sc_prevphase = PH_INVALID;
1817 goto dophase;
1818 }
1819
1820 if ((ints & INTS_DISCON) != 0) {
1821 /* We've gone to BUS FREE phase. */
1822 /* disable disconnect interrupt */
1823 bus_space_write_1(iot, ioh, PCTL,
1824 bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB);
1825 /* XXX reset interrput */
1826 bus_space_write_1(iot, ioh, INTS, ints);
1827
1828 switch (sc->sc_state) {
1829 case SPC_RESELECTED:
1830 goto sched;
1831
1832 case SPC_CONNECTED:
1833 SPC_ASSERT(sc->sc_nexus != NULL);
1834 acb = sc->sc_nexus;
1835
1836 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
1837 if (sc->sc_prevphase == PH_MSGOUT) {
1838 /*
1839 * If the target went to BUS FREE phase during
1840 * or immediately after sending a SDTR or WDTR
1841 * message, disable negotiation.
1842 */
1843 periph = acb->xs->xs_periph;
1844 ti = &sc->sc_tinfo[periph->periph_target];
1845 switch (sc->sc_lastmsg) {
1846 #if SPC_USE_SYNCHRONOUS
1847 case SEND_SDTR:
1848 ti->flags &= ~DO_SYNC;
1849 ti->period = ti->offset = 0;
1850 break;
1851 #endif
1852 #if SPC_USE_WIDE
1853 case SEND_WDTR:
1854 ti->flags &= ~DO_WIDE;
1855 ti->width = 0;
1856 break;
1857 #endif
1858 }
1859 }
1860 #endif
1861
1862 if ((sc->sc_flags & SPC_ABORTING) == 0) {
1863 /*
1864 * Section 5.1.1 of the SCSI 2 spec suggests
1865 * issuing a REQUEST SENSE following an
1866 * unexpected disconnect. Some devices go into
1867 * a contingent allegiance condition when
1868 * disconnecting, and this is necessary to
1869 * clean up their state.
1870 */
1871 printf("%s: unexpected disconnect; "
1872 "sending REQUEST SENSE\n",
1873 device_xname(sc->sc_dev));
1874 SPC_BREAK();
1875 acb->target_stat = SCSI_CHECK;
1876 acb->xs->error = XS_NOERROR;
1877 goto finish;
1878 }
1879
1880 acb->xs->error = XS_DRIVER_STUFFUP;
1881 goto finish;
1882
1883 case SPC_DISCONNECT:
1884 SPC_ASSERT(sc->sc_nexus != NULL);
1885 acb = sc->sc_nexus;
1886 TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain);
1887 sc->sc_nexus = NULL;
1888 goto sched;
1889
1890 case SPC_CMDCOMPLETE:
1891 SPC_ASSERT(sc->sc_nexus != NULL);
1892 acb = sc->sc_nexus;
1893 goto finish;
1894 }
1895 }
1896 else if ((ints & INTS_CMD_DONE) != 0 &&
1897 sc->sc_prevphase == PH_MSGIN &&
1898 sc->sc_state != SPC_CONNECTED)
1899 goto out;
1900
1901 dophase:
1902 #if 0
1903 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) {
1904 /* Wait for REQINIT. */
1905 goto out;
1906 }
1907 #else
1908 bus_space_write_1(iot, ioh, INTS, ints);
1909 ints = 0;
1910 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0)
1911 delay(1); /* need timeout XXX */
1912 #endif
1913
1914 /*
1915 * State transition.
1916 */
1917 sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK;
1918 #if 0
1919 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase);
1920 #endif
1921
1922 SPC_MISC(("phase=%d\n", sc->sc_phase));
1923 switch (sc->sc_phase) {
1924 case PH_MSGOUT:
1925 if (sc->sc_state != SPC_CONNECTED &&
1926 sc->sc_state != SPC_RESELECTED)
1927 break;
1928 spc_msgout(sc);
1929 sc->sc_prevphase = PH_MSGOUT;
1930 goto loop;
1931
1932 case PH_MSGIN:
1933 if (sc->sc_state != SPC_CONNECTED &&
1934 sc->sc_state != SPC_RESELECTED)
1935 break;
1936 spc_msgin(sc);
1937 sc->sc_prevphase = PH_MSGIN;
1938 goto loop;
1939
1940 case PH_CMD:
1941 if (sc->sc_state != SPC_CONNECTED)
1942 break;
1943 #if SPC_DEBUG
1944 if ((spc_debug & SPC_SHOWMISC) != 0) {
1945 SPC_ASSERT(sc->sc_nexus != NULL);
1946 acb = sc->sc_nexus;
1947 printf("cmd=0x%02x+%d ",
1948 acb->scsipi_cmd.opcode, acb->scsipi_cmd_length - 1);
1949 }
1950 #endif
1951 n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft);
1952 sc->sc_cp += n;
1953 sc->sc_cleft -= n;
1954 sc->sc_prevphase = PH_CMD;
1955 goto loop;
1956
1957 case PH_DATAOUT:
1958 if (sc->sc_state != SPC_CONNECTED)
1959 break;
1960 SPC_MISC(("dataout dleft=%zu ", sc->sc_dleft));
1961 if (sc->sc_dma_start != NULL &&
1962 sc->sc_dleft > SPC_MIN_DMA_LEN) {
1963 (*sc->sc_dma_start)(sc, sc->sc_dp, sc->sc_dleft, 0);
1964 sc->sc_prevphase = PH_DATAOUT;
1965 goto out;
1966 }
1967 n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft);
1968 sc->sc_dp += n;
1969 sc->sc_dleft -= n;
1970 sc->sc_prevphase = PH_DATAOUT;
1971 goto loop;
1972
1973 case PH_DATAIN:
1974 if (sc->sc_state != SPC_CONNECTED)
1975 break;
1976 SPC_MISC(("datain "));
1977 if (sc->sc_dma_start != NULL &&
1978 sc->sc_dleft > SPC_MIN_DMA_LEN) {
1979 (*sc->sc_dma_start)(sc, sc->sc_dp, sc->sc_dleft, 1);
1980 sc->sc_prevphase = PH_DATAIN;
1981 goto out;
1982 }
1983 n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft);
1984 sc->sc_dp += n;
1985 sc->sc_dleft -= n;
1986 sc->sc_prevphase = PH_DATAIN;
1987 goto loop;
1988
1989 case PH_STAT:
1990 if (sc->sc_state != SPC_CONNECTED)
1991 break;
1992 SPC_ASSERT(sc->sc_nexus != NULL);
1993 acb = sc->sc_nexus;
1994
1995 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_ATN) != 0)
1996 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
1997 bus_space_write_1(iot, ioh, PCTL, PCTL_BFINT_ENAB | PH_STAT);
1998 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0)
1999 DELAY(1); /* XXX needs timeout */
2000 acb->target_stat = bus_space_read_1(iot, ioh, TEMP);
2001 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK);
2002 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
2003 DELAY(1); /* XXX needs timeout */
2004 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
2005
2006 SPC_MISC(("target_stat=0x%02x ", acb->target_stat));
2007 sc->sc_prevphase = PH_STAT;
2008 goto loop;
2009 }
2010
2011 printf("%s: unexpected bus phase; resetting\n",
2012 device_xname(sc->sc_dev));
2013 SPC_BREAK();
2014 reset:
2015 spc_init(sc, 1);
2016 return 1;
2017
2018 finish:
2019 callout_stop(&acb->xs->xs_callout);
2020 bus_space_write_1(iot, ioh, INTS, ints);
2021 ints = 0;
2022 spc_done(sc, acb);
2023 goto out;
2024
2025 sched:
2026 sc->sc_state = SPC_IDLE;
2027 spc_sched(sc);
2028 goto out;
2029
2030 out:
2031 if (ints)
2032 bus_space_write_1(iot, ioh, INTS, ints);
2033 bus_space_write_1(iot, ioh, SCTL,
2034 bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB);
2035 return 1;
2036 }
2037
2038 void
spc_abort(struct spc_softc * sc,struct spc_acb * acb)2039 spc_abort(struct spc_softc *sc, struct spc_acb *acb)
2040 {
2041
2042 /* 2 secs for the abort */
2043 acb->timeout = SPC_ABORT_TIMEOUT;
2044 acb->flags |= ACB_ABORT;
2045
2046 if (acb == sc->sc_nexus) {
2047 /*
2048 * If we're still selecting, the message will be scheduled
2049 * after selection is complete.
2050 */
2051 if (sc->sc_state == SPC_CONNECTED)
2052 spc_sched_msgout(sc, SEND_ABORT);
2053 } else {
2054 spc_dequeue(sc, acb);
2055 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
2056 if (sc->sc_state == SPC_IDLE)
2057 spc_sched(sc);
2058 }
2059 }
2060
2061 void
spc_timeout(void * arg)2062 spc_timeout(void *arg)
2063 {
2064 struct spc_acb *acb = arg;
2065 struct scsipi_xfer *xs = acb->xs;
2066 struct scsipi_periph *periph = xs->xs_periph;
2067 struct spc_softc *sc;
2068 int s;
2069
2070 sc = device_private(periph->periph_channel->chan_adapter->adapt_dev);
2071 scsipi_printaddr(periph);
2072 printf("timed out");
2073
2074 s = splbio();
2075
2076 if (acb->flags & ACB_ABORT) {
2077 /* abort timed out */
2078 printf(" AGAIN\n");
2079 /* XXX Must reset! */
2080 } else {
2081 /* abort the operation that has timed out */
2082 printf("\n");
2083 acb->xs->error = XS_TIMEOUT;
2084 spc_abort(sc, acb);
2085 }
2086
2087 splx(s);
2088 }
2089
2090 #ifdef SPC_DEBUG
2091 /*
2092 * The following functions are mostly used for debugging purposes, either
2093 * directly called from the driver or from the kernel debugger.
2094 */
2095
2096 void
spc_show_scsi_cmd(struct spc_acb * acb)2097 spc_show_scsi_cmd(struct spc_acb *acb)
2098 {
2099 uint8_t *b = (uint8_t *)&acb->scsipi_cmd;
2100 int i;
2101
2102 scsipi_printaddr(acb->xs->xs_periph);
2103 if ((acb->xs->xs_control & XS_CTL_RESET) == 0) {
2104 for (i = 0; i < acb->scsipi_cmd_length; i++) {
2105 if (i)
2106 printf(",");
2107 printf("%x", b[i]);
2108 }
2109 printf("\n");
2110 } else
2111 printf("RESET\n");
2112 }
2113
2114 void
spc_print_acb(struct spc_acb * acb)2115 spc_print_acb(struct spc_acb *acb)
2116 {
2117
2118 printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags);
2119 printf(" dp=%p dleft=%d target_stat=%x\n",
2120 acb->data_addr, acb->data_length, acb->target_stat);
2121 spc_show_scsi_cmd(acb);
2122 }
2123
2124 void
spc_print_active_acb(void)2125 spc_print_active_acb(void)
2126 {
2127 struct spc_acb *acb;
2128 struct spc_softc *sc = device_lookup_private(&spc_cd, 0); /* XXX */
2129
2130 printf("ready list:\n");
2131 TAILQ_FOREACH(acb, &sc->ready_list, chain)
2132 spc_print_acb(acb);
2133 printf("nexus:\n");
2134 if (sc->sc_nexus != NULL)
2135 spc_print_acb(sc->sc_nexus);
2136 printf("nexus list:\n");
2137 TAILQ_FOREACH(acb, &sc->nexus_list, chain)
2138 spc_print_acb(acb);
2139 }
2140
2141 void
spc_dump89352(struct spc_softc * sc)2142 spc_dump89352(struct spc_softc *sc)
2143 {
2144 bus_space_tag_t iot = sc->sc_iot;
2145 bus_space_handle_t ioh = sc->sc_ioh;
2146
2147 printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n",
2148 bus_space_read_1(iot, ioh, BDID),
2149 bus_space_read_1(iot, ioh, SCTL),
2150 bus_space_read_1(iot, ioh, SCMD),
2151 bus_space_read_1(iot, ioh, TMOD));
2152 printf(" INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n",
2153 bus_space_read_1(iot, ioh, INTS),
2154 bus_space_read_1(iot, ioh, PSNS),
2155 bus_space_read_1(iot, ioh, SSTS),
2156 bus_space_read_1(iot, ioh, SERR),
2157 bus_space_read_1(iot, ioh, PCTL));
2158 printf(" MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n",
2159 bus_space_read_1(iot, ioh, MBC),
2160 #if 0
2161 bus_space_read_1(iot, ioh, DREG),
2162 #else
2163 0,
2164 #endif
2165 bus_space_read_1(iot, ioh, TEMP),
2166 bus_space_read_1(iot, ioh, TCH),
2167 bus_space_read_1(iot, ioh, TCM));
2168 printf(" TCL=%x EXBF=%x\n",
2169 bus_space_read_1(iot, ioh, TCL),
2170 bus_space_read_1(iot, ioh, EXBF));
2171 }
2172
2173 void
spc_dump_driver(struct spc_softc * sc)2174 spc_dump_driver(struct spc_softc *sc)
2175 {
2176 struct spc_tinfo *ti;
2177 int i;
2178
2179 printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase);
2180 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x "
2181 "currmsg=%x\n", sc->sc_state, sc->sc_imess[0],
2182 sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg);
2183 for (i = 0; i < 7; i++) {
2184 ti = &sc->sc_tinfo[i];
2185 printf("tinfo%d: %d cmds %d disconnects %d timeouts",
2186 i, ti->cmds, ti->dconns, ti->touts);
2187 printf(" %d senses flags=%x\n", ti->senses, ti->flags);
2188 }
2189 }
2190 #endif
2191