1 /* 2 * PROJECT: ReactOS USB EHCI Miniport Driver 3 * LICENSE: GPL-2.0+ (https://spdx.org/licenses/GPL-2.0+) 4 * PURPOSE: USBEHCI declarations 5 * COPYRIGHT: Copyright 2017-2018 Vadim Galyant <vgal@rambler.ru> 6 */ 7 8 #ifndef USBEHCI_H__ 9 #define USBEHCI_H__ 10 11 #include <ntddk.h> 12 #include <windef.h> 13 #include <stdio.h> 14 #include <hubbusif.h> 15 #include <usbbusif.h> 16 #include <usbdlib.h> 17 #include <drivers/usbport/usbmport.h> 18 #include "hardware.h" 19 20 extern USBPORT_REGISTRATION_PACKET RegPacket; 21 22 #define EHCI_MAX_CONTROL_TRANSFER_SIZE 0x10000 23 #define EHCI_MAX_INTERRUPT_TRANSFER_SIZE 0x1000 24 #define EHCI_MAX_BULK_TRANSFER_SIZE 0x400000 25 #define EHCI_MAX_FS_ISO_TRANSFER_SIZE 0x40000 26 #define EHCI_MAX_HS_ISO_TRANSFER_SIZE 0x180000 27 28 #define EHCI_MAX_FS_ISO_HEADER_BUFFER_SIZE 0x1000 29 #define EHCI_MAX_HS_ISO_HEADER_BUFFER_SIZE 0x40000 30 31 #define EHCI_MAX_CONTROL_TD_COUNT 6 32 #define EHCI_MAX_INTERRUPT_TD_COUNT 4 33 #define EHCI_MAX_BULK_TD_COUNT 209 34 35 #define EHCI_FRAMES 32 36 #define EHCI_MICROFRAMES 8 37 38 #define EHCI_MAX_HC_SYSTEM_ERRORS 256 39 40 typedef struct _EHCI_PERIOD { 41 UCHAR Period; 42 UCHAR PeriodIdx; 43 UCHAR ScheduleMask; 44 } EHCI_PERIOD, *PEHCI_PERIOD; 45 46 /* Transfer Descriptor */ 47 #define EHCI_HCD_TD_FLAG_ALLOCATED 0x01 48 #define EHCI_HCD_TD_FLAG_PROCESSED 0x02 49 #define EHCI_HCD_TD_FLAG_DONE 0x08 50 #define EHCI_HCD_TD_FLAG_ACTIVE 0x10 51 #define EHCI_HCD_TD_FLAG_DUMMY 0x20 52 53 struct _EHCI_HCD_QH; 54 struct _EHCI_ENDPOINT; 55 struct _EHCI_TRANSFER; 56 57 typedef struct _EHCI_HCD_TD { 58 /* Hardware*/ 59 EHCI_QUEUE_TD HwTD; 60 /* Software */ 61 ULONG PhysicalAddress; 62 ULONG TdFlags; 63 struct _EHCI_ENDPOINT * EhciEndpoint; 64 struct _EHCI_TRANSFER * EhciTransfer; 65 struct _EHCI_HCD_TD * NextHcdTD; 66 struct _EHCI_HCD_TD * AltNextHcdTD; 67 USB_DEFAULT_PIPE_SETUP_PACKET SetupPacket; 68 ULONG LengthThisTD; 69 LIST_ENTRY DoneLink; 70 #ifdef _WIN64 71 ULONG Pad[31]; 72 #else 73 ULONG Pad[40]; 74 #endif 75 } EHCI_HCD_TD, *PEHCI_HCD_TD; 76 77 C_ASSERT(sizeof(EHCI_HCD_TD) == 0x100); 78 79 /* Queue Head */ 80 #define EHCI_QH_FLAG_IN_SCHEDULE 0x01 81 #define EHCI_QH_FLAG_CLOSED 0x02 82 #define EHCI_QH_FLAG_STATIC 0x04 83 #define EHCI_QH_FLAG_STATIC_FAST 0x08 84 #define EHCI_QH_FLAG_UPDATING 0x10 85 #define EHCI_QH_FLAG_NUKED 0x20 86 87 typedef struct _EHCI_STATIC_QH { 88 /* Hardware part */ 89 EHCI_QUEUE_HEAD HwQH; 90 /* Software part */ 91 ULONG QhFlags; 92 ULONG PhysicalAddress; 93 struct _EHCI_HCD_QH * PrevHead; 94 #ifndef _WIN64 95 ULONG Pad2; 96 #endif 97 struct _EHCI_HCD_QH * NextHead; 98 #ifndef _WIN64 99 ULONG Pad3; 100 #endif 101 struct _EHCI_STATIC_QH * StaticQH; 102 #ifndef _WIN64 103 ULONG Pad4; 104 #endif 105 ULONG Period; 106 ULONG Ordinal; 107 #ifdef _WIN64 108 ULONG Pad[11]; 109 #else 110 ULONG Pad[13]; 111 #endif 112 } EHCI_STATIC_QH, *PEHCI_STATIC_QH; 113 114 C_ASSERT(sizeof(EHCI_STATIC_QH) == 0xA0); 115 116 #define EHCI_DUMMYQH_MAX_PACKET_LENGTH 64 117 118 typedef struct _EHCI_HCD_QH { 119 EHCI_STATIC_QH sqh; 120 #ifdef _WIN64 121 ULONG Pad[23]; 122 #else 123 ULONG Pad[24]; 124 #endif 125 } EHCI_HCD_QH, *PEHCI_HCD_QH; 126 127 C_ASSERT(sizeof(EHCI_HCD_QH) == 0x100); 128 129 /* EHCI Endpoint follows USBPORT Endpoint */ 130 typedef struct _EHCI_ENDPOINT { 131 ULONG Reserved; 132 ULONG EndpointStatus; 133 ULONG EndpointState; 134 USBPORT_ENDPOINT_PROPERTIES EndpointProperties; 135 PVOID DmaBufferVA; 136 ULONG DmaBufferPA; 137 PEHCI_HCD_TD FirstTD; 138 ULONG MaxTDs; 139 ULONG PendingTDs; 140 ULONG RemainTDs; 141 PEHCI_HCD_QH QH; 142 PEHCI_HCD_TD HcdHeadP; 143 PEHCI_HCD_TD HcdTailP; 144 LIST_ENTRY ListTDs; 145 const EHCI_PERIOD * PeriodTable; 146 PEHCI_STATIC_QH StaticQH; 147 } EHCI_ENDPOINT, *PEHCI_ENDPOINT; 148 149 /* EHCI Transfer follows USBPORT Transfer */ 150 typedef struct _EHCI_TRANSFER { 151 ULONG Reserved; 152 PUSBPORT_TRANSFER_PARAMETERS TransferParameters; 153 ULONG USBDStatus; 154 ULONG TransferLen; 155 PEHCI_ENDPOINT EhciEndpoint; 156 ULONG PendingTDs; 157 ULONG TransferOnAsyncList; 158 } EHCI_TRANSFER, *PEHCI_TRANSFER; 159 160 typedef struct _EHCI_HC_RESOURCES { 161 ULONG PeriodicFrameList[EHCI_FRAME_LIST_MAX_ENTRIES]; // 4K-page aligned array 162 EHCI_STATIC_QH AsyncHead; 163 EHCI_STATIC_QH PeriodicHead[64]; 164 UCHAR Padded[0x160]; 165 EHCI_HCD_QH IsoDummyQH[EHCI_FRAME_LIST_MAX_ENTRIES]; 166 } EHCI_HC_RESOURCES, *PEHCI_HC_RESOURCES; 167 168 #define EHCI_FLAGS_CONTROLLER_SUSPEND 0x01 169 #define EHCI_FLAGS_IDLE_SUPPORT 0x20 170 171 /* EHCI Extension follows USBPORT Extension */ 172 typedef struct _EHCI_EXTENSION { 173 ULONG Reserved; 174 ULONG Flags; 175 PEHCI_HC_CAPABILITY_REGISTERS CapabilityRegisters; 176 PEHCI_HW_REGISTERS OperationalRegs; 177 UCHAR FrameLengthAdjustment; 178 BOOLEAN IsStarted; 179 USHORT HcSystemErrors; 180 ULONG PortRoutingControl; 181 USHORT NumberOfPorts; 182 USHORT PortPowerControl; 183 EHCI_INTERRUPT_ENABLE InterruptMask; 184 EHCI_INTERRUPT_ENABLE InterruptStatus; 185 /* Schedule */ 186 PEHCI_HC_RESOURCES HcResourcesVA; 187 ULONG HcResourcesPA; 188 PEHCI_STATIC_QH AsyncHead; 189 PEHCI_STATIC_QH PeriodicHead[64]; 190 PEHCI_HCD_QH IsoDummyQHListVA; 191 ULONG IsoDummyQHListPA; 192 ULONG FrameIndex; 193 ULONG FrameHighPart; 194 /* Root Hub Bits */ 195 ULONG ConnectPortBits; 196 ULONG SuspendPortBits; 197 ULONG ResetPortBits; 198 ULONG FinishResetPortBits; 199 /* Transfers */ 200 ULONG PendingTransfers; 201 /* Lock Queue */ 202 PEHCI_HCD_QH PrevQH; 203 PEHCI_HCD_QH LockQH; 204 PEHCI_HCD_QH NextQH; 205 /* Registers Copy Backup */ 206 ULONG BackupPeriodiclistbase; 207 ULONG BackupAsynclistaddr; 208 ULONG BackupCtrlDSSegment; 209 ULONG BackupUSBCmd; 210 } EHCI_EXTENSION, *PEHCI_EXTENSION; 211 212 /* debug.c */ 213 VOID 214 NTAPI 215 EHCI_DumpHwTD( 216 IN PEHCI_HCD_TD TD); 217 218 VOID 219 NTAPI 220 EHCI_DumpHwQH( 221 IN PEHCI_HCD_QH QH); 222 223 /* roothub.c */ 224 MPSTATUS 225 NTAPI 226 EHCI_RH_ChirpRootPort( 227 IN PVOID ehciExtension, 228 IN USHORT Port); 229 230 VOID 231 NTAPI 232 EHCI_RH_GetRootHubData( 233 IN PVOID ohciExtension, 234 IN PVOID rootHubData); 235 236 MPSTATUS 237 NTAPI 238 EHCI_RH_GetStatus( 239 IN PVOID ohciExtension, 240 IN PUSHORT Status); 241 242 MPSTATUS 243 NTAPI 244 EHCI_RH_GetPortStatus( 245 IN PVOID ohciExtension, 246 IN USHORT Port, 247 IN PUSB_PORT_STATUS_AND_CHANGE PortStatus); 248 249 MPSTATUS 250 NTAPI 251 EHCI_RH_GetHubStatus( 252 IN PVOID ohciExtension, 253 IN PUSB_HUB_STATUS_AND_CHANGE HubStatus); 254 255 MPSTATUS 256 NTAPI 257 EHCI_RH_SetFeaturePortReset( 258 IN PVOID ohciExtension, 259 IN USHORT Port); 260 261 MPSTATUS 262 NTAPI 263 EHCI_RH_SetFeaturePortPower( 264 IN PVOID ohciExtension, 265 IN USHORT Port); 266 267 MPSTATUS 268 NTAPI 269 EHCI_RH_SetFeaturePortEnable( 270 IN PVOID ohciExtension, 271 IN USHORT Port); 272 273 MPSTATUS 274 NTAPI 275 EHCI_RH_SetFeaturePortSuspend( 276 IN PVOID ohciExtension, 277 IN USHORT Port); 278 279 MPSTATUS 280 NTAPI 281 EHCI_RH_ClearFeaturePortEnable( 282 IN PVOID ohciExtension, 283 IN USHORT Port); 284 285 MPSTATUS 286 NTAPI 287 EHCI_RH_ClearFeaturePortPower( 288 IN PVOID ohciExtension, 289 IN USHORT Port); 290 291 MPSTATUS 292 NTAPI 293 EHCI_RH_ClearFeaturePortSuspend( 294 IN PVOID ohciExtension, 295 IN USHORT Port); 296 297 MPSTATUS 298 NTAPI 299 EHCI_RH_ClearFeaturePortEnableChange( 300 IN PVOID ohciExtension, 301 IN USHORT Port); 302 303 MPSTATUS 304 NTAPI 305 EHCI_RH_ClearFeaturePortConnectChange( 306 IN PVOID ohciExtension, 307 IN USHORT Port); 308 309 MPSTATUS 310 NTAPI 311 EHCI_RH_ClearFeaturePortResetChange( 312 IN PVOID ohciExtension, 313 IN USHORT Port); 314 315 MPSTATUS 316 NTAPI 317 EHCI_RH_ClearFeaturePortSuspendChange( 318 IN PVOID ohciExtension, 319 IN USHORT Port); 320 321 MPSTATUS 322 NTAPI 323 EHCI_RH_ClearFeaturePortOvercurrentChange( 324 IN PVOID ohciExtension, 325 IN USHORT Port); 326 327 VOID 328 NTAPI 329 EHCI_RH_DisableIrq( 330 IN PVOID ohciExtension); 331 332 VOID 333 NTAPI 334 EHCI_RH_EnableIrq( 335 IN PVOID ohciExtension); 336 337 #endif /* USBEHCI_H__ */ 338