xref: /netbsd/sys/dev/pci/hifn7751var.h (revision 924002df)
1 /*	$NetBSD: hifn7751var.h,v 1.18 2021/12/03 13:27:38 andvar Exp $	*/
2 /*	$OpenBSD: hifn7751var.h,v 1.54 2020/01/11 21:34:04 cheloha Exp $	*/
3 
4 /*
5  * Invertex AEON / Hifn 7751 driver
6  * Copyright (c) 1999 Invertex Inc. All rights reserved.
7  * Copyright (c) 1999 Theo de Raadt
8  * Copyright (c) 2000-2001 Network Security Technologies, Inc.
9  *			http://www.netsec.net
10  *
11  * Please send any comments, feedback, bug-fixes, or feature requests to
12  * software@invertex.com.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions
16  * are met:
17  *
18  * 1. Redistributions of source code must retain the above copyright
19  *    notice, this list of conditions and the following disclaimer.
20  * 2. Redistributions in binary form must reproduce the above copyright
21  *    notice, this list of conditions and the following disclaimer in the
22  *    documentation and/or other materials provided with the distribution.
23  * 3. The name of the author may not be used to endorse or promote products
24  *    derived from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
27  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
28  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
30  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
31  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
35  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  *
37  * Effort sponsored in part by the Defense Advanced Research Projects
38  * Agency (DARPA) and Air Force Research Laboratory, Air Force
39  * Materiel Command, USAF, under agreement number F30602-01-2-0537.
40  *
41  */
42 
43 #ifndef __DEV_PCI_HIFN7751VAR_H__
44 #define __DEV_PCI_HIFN7751VAR_H__
45 
46 #ifdef _KERNEL
47 
48 #include <sys/rndsource.h>
49 
50 /*
51  *  Some configurable values for the driver
52  */
53 #define	HIFN_D_CMD_RSIZE	24	/* command descriptors */
54 #define	HIFN_D_SRC_RSIZE	80	/* source descriptors */
55 #define	HIFN_D_DST_RSIZE	80	/* destination descriptors */
56 #define	HIFN_D_RES_RSIZE	24	/* result descriptors */
57 
58 /*
59  *  Length values for cryptography
60  */
61 #define HIFN_DES_KEY_LENGTH		8
62 #define HIFN_3DES_KEY_LENGTH		24
63 #define HIFN_MAX_CRYPT_KEY_LENGTH	HIFN_3DES_KEY_LENGTH
64 #define HIFN_IV_LENGTH			8
65 #define HIFN_AES_IV_LENGTH		16
66 #define	HIFN_MAX_IV_LENGTH		HIFN_AES_IV_LENGTH
67 
68 /*
69  *  Length values for authentication
70  */
71 #define HIFN_MAC_KEY_LENGTH		64
72 #define HIFN_MD5_LENGTH			16
73 #define HIFN_SHA1_LENGTH		20
74 #define HIFN_MAC_TRUNC_LENGTH		12
75 
76 #define MAX_SCATTER 64
77 
78 /*
79  * Data structure to hold all 4 rings and any other ring related data.
80  */
81 struct hifn_dma {
82 	/*
83 	 *  Descriptor rings.  We add +1 to the size to accommodate the
84 	 *  jump descriptor.
85 	 */
86 	struct hifn_desc	cmdr[HIFN_D_CMD_RSIZE+1];
87 	struct hifn_desc	srcr[HIFN_D_SRC_RSIZE+1];
88 	struct hifn_desc	dstr[HIFN_D_DST_RSIZE+1];
89 	struct hifn_desc	resr[HIFN_D_RES_RSIZE+1];
90 
91 	struct hifn_command	*hifn_commands[HIFN_D_RES_RSIZE];
92 
93 	u_char			command_bufs[HIFN_D_CMD_RSIZE][HIFN_MAX_COMMAND];
94 	u_char			result_bufs[HIFN_D_CMD_RSIZE][HIFN_MAX_RESULT];
95 	u_int32_t		slop[HIFN_D_CMD_RSIZE];
96 
97 	u_int64_t		test_src, test_dst;
98 
99 	/*
100 	 *  Our current positions for insertion and removal from the descriptor
101 	 *  rings.
102 	 */
103 	int			cmdi, srci, dsti, resi;
104 	volatile int		cmdu, srcu, dstu, resu;
105 	int			cmdk, srck, dstk, resk;
106 };
107 
108 #define	HIFN_RING_SYNC(sc, r, i, f)					\
109 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap,		\
110 	    offsetof(struct hifn_dma, r[i]), sizeof(struct hifn_desc), (f))
111 
112 #define	HIFN_CMDR_SYNC(sc, i, f)	HIFN_RING_SYNC((sc), cmdr, (i), (f))
113 #define	HIFN_RESR_SYNC(sc, i, f)	HIFN_RING_SYNC((sc), resr, (i), (f))
114 #define	HIFN_SRCR_SYNC(sc, i, f)	HIFN_RING_SYNC((sc), srcr, (i), (f))
115 #define	HIFN_DSTR_SYNC(sc, i, f)	HIFN_RING_SYNC((sc), dstr, (i), (f))
116 
117 #define	HIFN_CMD_SYNC(sc, i, f)						\
118 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap,		\
119 	    offsetof(struct hifn_dma, command_bufs[(i)][0]),		\
120 	    HIFN_MAX_COMMAND, (f))
121 
122 #define	HIFN_RES_SYNC(sc, i, f)						\
123 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap,		\
124 	    offsetof(struct hifn_dma, result_bufs[(i)][0]),		\
125 	    HIFN_MAX_RESULT, (f))
126 
127 /*
128  * Holds data specific to a single HIFN board.
129  */
130 struct hifn_softc {
131 	device_t	sc_dv;		/* generic device */
132 	void *		sc_ih;		/* interrupt handler cookie */
133 	u_int32_t	sc_dmaier;
134 	u_int32_t	sc_drammodel;	/* 1=dram, 0=sram */
135 
136 	bus_space_handle_t	sc_sh0, sc_sh1;
137 	bus_space_tag_t		sc_st0, sc_st1;
138 	bus_size_t		sc_iosz0, sc_iosz1;
139 	bus_dma_tag_t		sc_dmat;
140 	struct pool_cache	*sc_cmd_cache;
141 
142 	struct hifn_dma *sc_dma;
143 	bus_dmamap_t sc_dmamap;
144 	bus_dma_segment_t sc_dmasegs[1];
145 	int sc_dmansegs;
146 	int32_t sc_cid;
147 	int sc_maxses;
148 	int sc_nsessions;
149 	int sc_ramsize;
150 	int sc_flags;
151 #define	HIFN_HAS_RNG		0x01	/* includes random number generator */
152 #define	HIFN_HAS_PUBLIC		0x02	/* includes public key support */
153 #define	HIFN_IS_7811		0x04	/* Hifn 7811 part */
154 #define	HIFN_NO_BURSTWRITE	0x08	/* can't handle PCI burst writes */
155 #define	HIFN_HAS_LEDS		0x10	/* Has LEDs to blink */
156 #define	HIFN_HAS_AES		0x20	/* includes AES support */
157 #define	HIFN_IS_7956		0x40	/* Hifn 7955/7956 part */
158 
159 	struct timeval		sc_rngboottime; /* time we flipped RNG on */
160 	struct callout		sc_rngto;	/* rng timeout */
161 	struct callout		sc_tickto;	/* led-clear timeout */
162 	krndsource_t		sc_rnd_source;
163 	unsigned		sc_rng_needbits; /* how many bits wanted */
164 	int			sc_c_busy;	/* command ring busy */
165 	int			sc_s_busy;	/* source data ring busy */
166 	int			sc_d_busy;	/* destination data ring busy */
167 	int			sc_r_busy;	/* result ring busy */
168 	int			sc_active;	/* for initial countdown */
169 	int			sc_needwakeup;	/* ops q'd waiting on resources */
170 	uint8_t			sc_sessions[2048/NBBY];
171 	pci_chipset_tag_t sc_pci_pc;
172 	pcitag_t sc_pci_tag;
173 	bus_size_t sc_waw_lastreg;
174 	int sc_waw_lastgroup;
175 	kmutex_t		sc_mtx;
176 };
177 
178 #define HIFN_RNG_BITSPER	17	/* From Hifn 6500 paper: 0.06 bits
179 					   of entropy per RNG register bit
180 					   worst-case */
181 
182 #define WRITE_REG_0(sc,reg,val)		hifn_write_4((sc), 0, (reg), (val))
183 #define WRITE_REG_1(sc,reg,val)		hifn_write_4((sc), 1, (reg), (val))
184 #define	READ_REG_0(sc,reg)		hifn_read_4((sc), 0, (reg))
185 #define	READ_REG_1(sc,reg)		hifn_read_4((sc), 1, (reg))
186 
187 #define	SET_LED(sc,v)							\
188 	if (sc->sc_flags & HIFN_HAS_LEDS)				\
189 		WRITE_REG_1(sc, HIFN_1_7811_MIPSRST,			\
190 		    READ_REG_1(sc, HIFN_1_7811_MIPSRST) | (v))
191 #define	CLR_LED(sc,v)							\
192 	if (sc->sc_flags & HIFN_HAS_LEDS)				\
193 		WRITE_REG_1(sc, HIFN_1_7811_MIPSRST,			\
194 		    READ_REG_1(sc, HIFN_1_7811_MIPSRST) & ~(v))
195 
196 /*
197  *  struct hifn_command
198  *
199  *  This is the control structure used to pass commands to hifn_encrypt().
200  *
201  *  flags
202  *  -----
203  *  Flags is the bitwise "or" values for command configuration.  A single
204  *  encrypt direction needs to be set:
205  *
206  *	HIFN_ENCODE or HIFN_DECODE
207  *
208  *  To use cryptography, a single crypto algorithm must be included:
209  *
210  *	HIFN_CRYPT_3DES or HIFN_CRYPT_DES
211  *
212  *  To use authentication, a single MAC algorithm must be included:
213  *
214  *	HIFN_MAC_MD5 or HIFN_MAC_SHA1
215  *
216  *  By default MD5 uses a 16 byte hash and SHA-1 uses a 20 byte hash.
217  *  If the value below is set, hash values are truncated or assumed
218  *  truncated to 12 bytes:
219  *
220  *	HIFN_MAC_TRUNC
221  *
222  *  Keys for encryption and authentication can be sent as part of a command,
223  *  or the last key value used with a particular session can be retrieved
224  *  and used again if either of these flags are not specified.
225  *
226  *	HIFN_CRYPT_NEW_KEY, HIFN_MAC_NEW_KEY
227  *
228  *  session_num
229  *  -----------
230  *  A number between 0 and 2048 (for DRAM models) or a number between
231  *  0 and 768 (for SRAM models).  Those who don't want to use session
232  *  numbers should leave value at zero and send a new crypt key and/or
233  *  new MAC key on every command.  If you use session numbers and
234  *  don't send a key with a command, the last key sent for that same
235  *  session number will be used.
236  *
237  *  Warning:  Using session numbers and multiboard at the same time
238  *            is currently broken.
239  *
240  *  mbuf
241  *  ----
242  *  Either fill in the mbuf pointer and npa=0 or
243  *	 fill packp[] and packl[] and set npa to > 0
244  *
245  *  mac_header_skip
246  *  ---------------
247  *  The number of bytes of the source_buf that are skipped over before
248  *  authentication begins.  This must be a number between 0 and 2^16-1
249  *  and can be used by IPsec implementers to skip over IP headers.
250  *  *** Value ignored if authentication not used ***
251  *
252  *  crypt_header_skip
253  *  -----------------
254  *  The number of bytes of the source_buf that are skipped over before
255  *  the cryptographic operation begins.  This must be a number between 0
256  *  and 2^16-1.  For IPsec, this number will always be 8 bytes larger
257  *  than the auth_header_skip (to skip over the ESP header).
258  *  *** Value ignored if cryptography not used ***
259  *
260  */
261 struct hifn_command {
262 	u_int16_t session_num;
263 	u_int16_t base_masks, cry_masks, mac_masks, comp_masks;
264 	u_int8_t iv[HIFN_MAX_IV_LENGTH], *ck, mac[HIFN_MAC_KEY_LENGTH];
265 	int cklen;
266 	int sloplen, slopidx;
267 
268 	union {
269 		struct mbuf *src_m;
270 		struct uio *src_io;
271 	} srcu;
272 	bus_dmamap_t src_map;
273 
274 	union {
275 		struct mbuf *dst_m;
276 		struct uio *dst_io;
277 	} dstu;
278 	bus_dmamap_t dst_map;
279 	bus_dmamap_t dst_map_alloc;
280 
281 	struct hifn_softc *softc;
282 	struct cryptop *crp;
283 	struct cryptodesc *enccrd, *maccrd, *compcrd;
284 	void (*cmd_callback)(struct hifn_softc *, struct hifn_command *,
285 	    uint8_t *);
286 };
287 
288 /*
289  *  Return values for hifn_crypto()
290  */
291 #define HIFN_CRYPTO_SUCCESS	0
292 #define HIFN_CRYPTO_BAD_INPUT	(-1)
293 #define HIFN_CRYPTO_RINGS_FULL	(-2)
294 
295 
296 /**************************************************************************
297  *
298  *  Function:  hifn_crypto
299  *
300  *  Purpose:   Called by external drivers to begin an encryption on the
301  *             HIFN board.
302  *
303  *  Blocking/Non-blocking Issues
304  *  ============================
305  *  The driver cannot block in hifn_crypto (no calls to tsleep) currently.
306  *  hifn_crypto() returns HIFN_CRYPTO_RINGS_FULL if there is not enough
307  *  room in any of the rings for the request to proceed.
308  *
309  *  Return Values
310  *  =============
311  *  0 for success, negative values on error
312  *
313  *  Defines for negative error codes are:
314  *
315  *    HIFN_CRYPTO_BAD_INPUT  :  The passed in command had invalid settings.
316  *    HIFN_CRYPTO_RINGS_FULL :  All DMA rings were full and non-blocking
317  *                              behaviour was requested.
318  *
319  *************************************************************************/
320 
321 /*
322  * Convert back and forth from 'sid' to 'card' and 'session'
323  */
324 #define HIFN_CARD(sid)		(((sid) & 0xf0000000) >> 28)
325 #define HIFN_SESSION(sid)	((sid) & 0x000007ff)
326 #define HIFN_SID(crd,ses)	(((crd) << 28) | ((ses) & 0x7ff))
327 
328 #endif /* _KERNEL */
329 
330 struct hifn_stats {
331 	u_int64_t hst_ibytes;
332 	u_int64_t hst_obytes;
333 	u_int32_t hst_ipackets;
334 	u_int32_t hst_opackets;
335 	u_int32_t hst_invalid;
336 	u_int32_t hst_nomem;
337 	u_int32_t hst_abort;
338 };
339 
340 #endif /* __DEV_PCI_HIFN7751VAR_H__ */
341