1 /*
2  * This file is part of the superiotool project.
3  *
4  * Copyright (C) 2007 Carl-Daniel Hailfinger
5  * Copyright (C) 2007-2010 Uwe Hermann <uwe@hermann-uwe.de>
6  * Copyright (C) 2008 Robinson P. Tryon <bishop.robinson@gmail.com>
7  * Copyright (C) 2008-2009 coresystems GmbH
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation; either version 2 of the License, or
12  * (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
22  */
23 
24 #ifndef SUPERIOTOOL_H
25 #define SUPERIOTOOL_H
26 
27 #include <stdio.h>
28 #include <stdlib.h>
29 #include <stdint.h>
30 #include <string.h>
31 #include <getopt.h>
32 #if defined(__GLIBC__)
33 #include <sys/io.h>
34 #endif
35 #if (defined(__MACH__) && defined(__APPLE__))
36 /* DirectHW is available here: http://www.coreboot.org/DirectHW */
37 #include <DirectHW/DirectHW.h>
38 #endif
39 
40 #ifdef PCI_SUPPORT
41 #include <pci/pci.h>
42 #endif
43 
44 #if defined(__FreeBSD__)
45 #include <sys/types.h>
46 #include <machine/cpufunc.h>
47 #define OUTB(x, y) do { u_int tmp = (y); outb(tmp, (x)); } while (0)
48 #define OUTW(x, y) do { u_int tmp = (y); outw(tmp, (x)); } while (0)
49 #define OUTL(x, y) do { u_int tmp = (y); outl(tmp, (x)); } while (0)
50 #define INB(x) __extension__ ({ u_int tmp = (x); inb(tmp); })
51 #define INW(x) __extension__ ({ u_int tmp = (x); inw(tmp); })
52 #define INL(x) __extension__ ({ u_int tmp = (x); inl(tmp); })
53 #else
54 #define OUTB outb
55 #define OUTW outw
56 #define OUTL outl
57 #define INB  inb
58 #define INW  inw
59 #define INL  inl
60 #endif
61 
62 #if defined(__NetBSD__) && (defined(__i386__) || defined(__x86_64__))
63 #include <sys/types.h>
64 #include <machine/sysarch.h>
65 #if defined(__i386__)
66 #define iopl i386_iopl
67 #elif defined(__x86_64__)
68 #define iopl x86_64_iopl
69 #endif
70 
71 static __inline__ void
outb(uint8_t value,uint16_t port)72 outb(uint8_t value, uint16_t port)
73 {
74 	__asm__ __volatile__ ("outb %b0,%w1": :"a" (value), "Nd" (port));
75 }
76 
77 static __inline__ void
outw(uint16_t value,uint16_t port)78 outw(uint16_t value, uint16_t port)
79 {
80 	__asm__ __volatile__ ("outw %w0,%w1": :"a" (value), "Nd" (port));
81 }
82 
83 static __inline__ void
outl(uint32_t value,uint16_t port)84 outl(uint32_t value, uint16_t port)
85 {
86 	__asm__ __volatile__ ("outl %0,%w1": :"a" (value), "Nd" (port));
87 }
88 
inb(uint16_t port)89 static __inline__ uint8_t inb(uint16_t port)
90 {
91 	uint8_t value;
92 	__asm__ __volatile__ ("inb %w1,%0":"=a" (value):"Nd" (port));
93 	return value;
94 }
95 
inw(uint16_t port)96 static __inline__ uint16_t inw(uint16_t port)
97 {
98 	uint16_t value;
99 	__asm__ __volatile__ ("inw %w1,%0":"=a" (value):"Nd" (port));
100 	return value;
101 }
102 
inl(uint16_t port)103 static __inline__ uint32_t inl(uint16_t port)
104 {
105 	uint32_t value;
106 	__asm__ __volatile__ ("inl %1,%0":"=a" (value):"Nd" (port));
107 	return value;
108 }
109 #endif
110 
111 #define USAGE "Usage: superiotool [-d] [-e] [-l] [-V] [-v] [-h]\n\n\
112   -d | --dump            Dump Super I/O register contents\n\
113   -e | --extra-dump      Dump secondary registers too (e.g. EC registers)\n\
114   -l | --list-supported  Show the list of supported Super I/O chips\n\
115   -V | --verbose         Verbose mode\n\
116   -v | --version         Show the superiotool version\n\
117   -h | --help            Show a short help text\n\n"
118 
119 #define USAGE_INFO "\
120 Per default (no options) superiotool will just probe for a Super I/O\n\
121 and print its vendor, name, ID, revision, and config port.\n"
122 
123 #define NOTFOUND "  Failed. Returned data: "
124 
125 #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
126 
127 #define EOT		-1		/* End Of Table */
128 #define NOLDN		-2		/* NO LDN needed */
129 #define NANA		-3		/* Not Available */
130 #define RSVD		-4		/* Reserved */
131 #define MISC		-5		/* Needs special comment in output */
132 #define MAXLDN		0x14		/* Biggest LDN */
133 #define LDNSIZE		(MAXLDN + 3)	/* Biggest LDN + 0 + NOLDN + EOT */
134 #define MAXNUMIDX	170		/* Maximum number of indices */
135 #define IDXSIZE 	(MAXNUMIDX + 1)
136 #define MAXNUMPORTS	(6 + 1)		/* Maximum number of Super I/O ports */
137 
138 /* Select registers for various components. */
139 #define LDN_SEL		0x07		/* LDN select register */
140 #define WINBOND_HWM_SEL	0x4e		/* Hardware monitor bank select */
141 
142 /* Command line parameters. */
143 extern int dump, verbose, extra_dump;
144 
145 extern int chip_found;
146 
147 struct superio_registers {
148 	int32_t superio_id;		/* Signed, as we need EOT. */
149 	const char *name;		/* Super I/O name */
150 	struct {
151 		int8_t ldn;
152 		const char *name;	/* LDN name */
153 		int16_t idx[IDXSIZE];
154 		int16_t def[IDXSIZE];
155 	} ldn[LDNSIZE];
156 };
157 
158 /* pci.c */
159 #ifdef PCI_SUPPORT
160 extern struct pci_access *pacc;
161 struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
162 #endif
163 
164 /* superiotool.c */
165 uint8_t regval(uint16_t port, uint8_t reg);
166 void regwrite(uint16_t port, uint8_t reg, uint8_t val);
167 void enter_conf_mode_winbond_fintek_ite_8787(uint16_t port);
168 void exit_conf_mode_winbond_fintek_ite_8787(uint16_t port);
169 void enter_conf_mode_fintek_7777(uint16_t port);
170 void exit_conf_mode_fintek_7777(uint16_t port);
171 int superio_unknown(const struct superio_registers reg_table[], uint16_t id);
172 const char *get_superio_name(const struct superio_registers reg_table[],
173 			     uint16_t id);
174 void dump_superio(const char *name, const struct superio_registers reg_table[],
175 		  uint16_t port, uint16_t id, uint8_t ldn_sel);
176 void dump_io(uint16_t iobase, uint16_t length);
177 void dump_data(uint16_t iobase, int bank);
178 void probing_for(const char *vendor, const char *info, uint16_t port);
179 void print_vendor_chips(const char *vendor,
180 			const struct superio_registers reg_table[]);
181 
182 /* ali.c */
183 void probe_idregs_ali(uint16_t port);
184 void print_ali_chips(void);
185 
186 /* amd.c */
187 void probe_idregs_amd(uint16_t port);
188 void print_amd_chips(void);
189 
190 /* serverengines.c */
191 void probe_idregs_serverengines(uint16_t port);
192 void print_serverengines_chips(void);
193 
194 /* fintek.c */
195 void probe_idregs_fintek(uint16_t port);
196 void probe_idregs_fintek_alternative(uint16_t port);
197 void print_fintek_chips(void);
198 
199 /* infineon.c */
200 void probe_idregs_infineon(uint16_t port);
201 void print_infineon_chips(void);
202 
203 /* ite.c */
204 void probe_idregs_ite(uint16_t port);
205 void print_ite_chips(void);
206 
207 /* nsc.c */
208 void probe_idregs_nsc(uint16_t port);
209 void print_nsc_chips(void);
210 
211 /* nuvoton.c */
212 void probe_idregs_nuvoton(uint16_t port);
213 void print_nuvoton_chips(void);
214 
215 /* smsc.c */
216 void probe_idregs_smsc(uint16_t port);
217 void print_smsc_chips(void);
218 
219 /* winbond.c */
220 void probe_idregs_winbond(uint16_t port);
221 void print_winbond_chips(void);
222 
223 /* via.c */
224 #ifdef PCI_SUPPORT
225 void probe_idregs_via(uint16_t port);
226 void print_via_chips(void);
227 #endif
228 
229 /** Table of which config ports to probe for each Super I/O family. */
230 static const struct {
231 	void (*probe_idregs) (uint16_t port);
232 	int ports[MAXNUMPORTS]; /* Signed, as we need EOT. */
233 } superio_ports_table[] = {
234 	{probe_idregs_ali,	{0x3f0, 0x370, EOT}},
235 	{probe_idregs_fintek,	{0x2e, 0x4e, EOT}},
236 	{probe_idregs_fintek_alternative,	{0x2e, 0x4e, EOT}},
237 	/* Only use 0x370 for ITE, but 0x3f0 or 0x3bd would also be valid. */
238 	{probe_idregs_ite,	{0x25e, 0x2e, 0x4e, 0x370, EOT}},
239 	{probe_idregs_nsc,	{0x2e, 0x4e, 0x15c, 0x164e, EOT}},
240 	/* I/O pairs on Nuvoton EC chips can be configured by firmware in
241 	 * addition to the following hardware strapping options. */
242 	{probe_idregs_nuvoton, {0x164e, 0x2e, 0x4e, EOT}},
243 	{probe_idregs_smsc,	{0x2e, 0x4e, 0x162e, 0x164e, 0x3f0, 0x370, EOT}},
244 	{probe_idregs_winbond,	{0x2e, 0x4e, 0x3f0, 0x370, 0x250, EOT}},
245 #ifdef PCI_SUPPORT
246 	{probe_idregs_via,	{0x3f0, EOT}},
247 	/* in fact read the BASE from HW */
248 	{probe_idregs_amd,	{0xaa, EOT}},
249 #endif
250 	{probe_idregs_serverengines,	{0x2e, EOT}},
251 	{probe_idregs_infineon,	{0x2e, 0x4e, EOT}},
252 };
253 
254 /** Table of functions to print out supported Super I/O chips. */
255 static const struct {
256 	void (*print_list) (void);
257 } vendor_print_functions[] = {
258 	{print_ali_chips},
259 	{print_fintek_chips},
260 	{print_ite_chips},
261 	{print_nsc_chips},
262 	{print_nuvoton_chips},
263 	{print_smsc_chips},
264 	{print_winbond_chips},
265 #ifdef PCI_SUPPORT
266 	{print_via_chips},
267 	{print_amd_chips},
268 #endif
269 	{print_serverengines_chips},
270 	{print_infineon_chips},
271 };
272 
273 #endif
274