1 2 #ifndef _G_KERNEL_VGPU_MGR_NVOC_H_ 3 #define _G_KERNEL_VGPU_MGR_NVOC_H_ 4 #include "nvoc/runtime.h" 5 6 // Version of generated metadata structures 7 #ifdef NVOC_METADATA_VERSION 8 #undef NVOC_METADATA_VERSION 9 #endif 10 #define NVOC_METADATA_VERSION 0 11 12 #ifdef __cplusplus 13 extern "C" { 14 #endif 15 16 /* 17 * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. 18 * SPDX-License-Identifier: MIT 19 * 20 * Permission is hereby granted, free of charge, to any person obtaining a 21 * copy of this software and associated documentation files (the "Software"), 22 * to deal in the Software without restriction, including without limitation 23 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 24 * and/or sell copies of the Software, and to permit persons to whom the 25 * Software is furnished to do so, subject to the following conditions: 26 * 27 * The above copyright notice and this permission notice shall be included in 28 * all copies or substantial portions of the Software. 29 * 30 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 31 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 32 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 33 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 34 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 35 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 36 * DEALINGS IN THE SOFTWARE. 37 */ 38 39 #pragma once 40 #include "g_kernel_vgpu_mgr_nvoc.h" 41 42 #ifndef __kernel_vgpu_mgr_h__ 43 #define __kernel_vgpu_mgr_h__ 44 45 #include "ctrl/ctrl2080/ctrl2080vgpumgrinternal.h" 46 #include "ctrl/ctrla081.h" 47 #include "ctrl/ctrla084.h" 48 #include "ctrl/ctrlc637.h" 49 50 #include "gpu/gpu.h" 51 #include "nv-hypervisor.h" 52 #include "nvlimits.h" 53 #include "core/core.h" 54 #include "resserv/resserv.h" 55 #include "nvoc/prelude.h" 56 #include "kernel/gpu/fifo/kernel_fifo.h" 57 #include "virtualization/common_vgpu_mgr.h" 58 #include "gpu_mgr/gpu_mgr.h" 59 60 61 struct PhysMemSubAlloc; 62 63 #ifndef __NVOC_CLASS_PhysMemSubAlloc_TYPEDEF__ 64 #define __NVOC_CLASS_PhysMemSubAlloc_TYPEDEF__ 65 typedef struct PhysMemSubAlloc PhysMemSubAlloc; 66 #endif /* __NVOC_CLASS_PhysMemSubAlloc_TYPEDEF__ */ 67 68 #ifndef __nvoc_class_id_PhysMemSubAlloc 69 #define __nvoc_class_id_PhysMemSubAlloc 0x2351fc 70 #endif /* __nvoc_class_id_PhysMemSubAlloc */ 71 72 73 74 struct VgpuConfigApi; 75 76 #ifndef __NVOC_CLASS_VgpuConfigApi_TYPEDEF__ 77 #define __NVOC_CLASS_VgpuConfigApi_TYPEDEF__ 78 typedef struct VgpuConfigApi VgpuConfigApi; 79 #endif /* __NVOC_CLASS_VgpuConfigApi_TYPEDEF__ */ 80 81 #ifndef __nvoc_class_id_VgpuConfigApi 82 #define __nvoc_class_id_VgpuConfigApi 0x4d560a 83 #endif /* __nvoc_class_id_VgpuConfigApi */ 84 85 86 typedef struct KERNEL_MIG_GPU_INSTANCE KERNEL_MIG_GPU_INSTANCE; 87 88 /* vGPU events info lookup node*/ 89 typedef struct VGPU_EVENT_INFO_NODE 90 { 91 NvHandle hClient; 92 NvHandle hVgpuConfig; 93 struct VgpuConfigApi *pVgpuConfigApi; 94 } VGPU_CONFIG_EVENT_INFO_NODE; 95 96 MAKE_LIST(VGPU_CONFIG_EVENT_INFO_NODE_LIST, VGPU_CONFIG_EVENT_INFO_NODE); 97 98 /* This structure represents vGPU guest's (VM's) information */ 99 typedef struct 100 { 101 VM_ID_TYPE vmIdType; 102 VM_ID guestVmId; 103 NvU8 vmName[NVA081_VM_NAME_SIZE]; /* Used only on KVM */ 104 } KERNEL_GUEST_VM_INFO; 105 106 /* This structure represents vgpu device's FB information 107 * which is visible to that guest. Here, 'offset' is offset 108 * from start of physical FB addresses in host FB space. 109 */ 110 typedef struct VGPU_DEVICE_GUEST_FB_INFO 111 { 112 NvU64 offset; 113 NvU64 length; 114 NvBool bValid; 115 } VGPU_DEVICE_GUEST_FB_INFO; 116 117 typedef struct 118 { 119 NvU64 hbmBaseAddr; 120 NvU64 size; 121 } HBM_REGION_INFO; 122 123 /* This structure represents guest vgpu device's (assigned to VM) information. 124 For VGPU-GSP, only KERNEL_HOST_VGPU_DEVICE is avaliable on kernel. */ 125 typedef struct KERNEL_HOST_VGPU_DEVICE 126 { 127 NvU32 vgpuType; 128 NvHandle hMigClient; /*Internal RM client to dup smcPartition*/ 129 NvHandle hMigDevice; /*Internal RM device to dup smcPartition*/ 130 struct KERNEL_VGPU_GUEST *vgpuGuest; 131 NvU32 gfid; 132 NvU32 swizzId; 133 NvU16 placementId; 134 NvU32 numPluginChannels; 135 NvU32 chidOffset[RM_ENGINE_TYPE_LAST]; 136 NvU32 channelCount[RM_ENGINE_TYPE_LAST]; /*Number of channels available to the VF*/ 137 NvU8 vgpuUuid[RM_SHA1_GID_SIZE]; 138 void *pVgpuVfioRef; 139 struct REQUEST_VGPU_INFO_NODE *pRequestVgpuInfoNode; 140 struct PhysMemSubAlloc *pPhysMemSubAlloc; 141 struct HOST_VGPU_DEVICE *pHostVgpuDevice; 142 HBM_REGION_INFO *hbmRegionList; 143 NvU32 numValidHbmRegions; 144 // Legacy fields 145 NvHandle hPluginFBAllocationClient; 146 VGPU_DEVICE_GUEST_FB_INFO vgpuDeviceGuestFbInfo; 147 NvU32 *pGuestFbSegment; 148 NvU64 guestFbSegmentPageSize; 149 NvBool bOfflinedPageInfoValid; 150 NvU32 offlinedPageCount; /* offlined page count */ 151 NvU64 offlinedPageGpa[NV2080_CTRL_FB_OFFLINED_PAGES_MAX_PAGES]; 152 MEMORY_DESCRIPTOR *pGspPluginHeapMemDesc; 153 NvBool bDisableDefaultSmcExecPartRestore; 154 struct GPUMGR_SAVE_COMPUTE_INSTANCE savedExecPartitions[NVC637_CTRL_MAX_EXEC_PARTITIONS]; 155 } KERNEL_HOST_VGPU_DEVICE; 156 157 MAKE_LIST(KERNEL_HOST_VGPU_DEVICE_LIST, KERNEL_HOST_VGPU_DEVICE); 158 159 /* vGPU guest definition */ 160 typedef struct KERNEL_VGPU_GUEST 161 { 162 KERNEL_GUEST_VM_INFO guestVmInfo; // guest VM's information 163 NvU32 numVgpuDevices; 164 } KERNEL_VGPU_GUEST; 165 166 MAKE_LIST(KERNEL_VGPU_GUEST_LIST, KERNEL_VGPU_GUEST); 167 168 #define NV_VGPU_MAX_FB_SIZE_GB 512 169 170 MAKE_BITVECTOR(PLACEMENT_REGION_BIT_VECTOR, NV_VGPU_MAX_FB_SIZE_GB); 171 172 /* pGPU information */ 173 typedef struct 174 { 175 NvU32 gpuPciId; 176 NvU32 supportedTypeIds[MAX_VGPU_TYPES_PER_PGPU]; 177 NvU32 numActiveVgpu; 178 NvU32 numVgpuTypes; 179 NvU32 vgpuConfigState; 180 KERNEL_HOST_VGPU_DEVICE_LIST listHostVgpuDeviceHead; 181 VGPU_TYPE *vgpuTypes[MAX_VGPU_TYPES_PER_PGPU]; 182 NvBool isAttached; 183 // Per VF per engine ChidOffset. Used for reserving guest channels per engine 184 NvU32 chidOffset[VGPU_MAX_GFID][RM_ENGINE_TYPE_LAST]; 185 NvU16 creatablePlacementIds[MAX_VGPU_TYPES_PER_PGPU][MAX_VGPU_DEVICES_PER_PGPU]; 186 NvU32 supportedVmmuOffsets[MAX_VGPU_TYPES_PER_PGPU][MAX_VGPU_DEVICES_PER_PGPU]; 187 NvU64 gspHeapOffsets[MAX_VGPU_TYPES_PER_PGPU][MAX_VGPU_DEVICES_PER_PGPU]; 188 NvU32 guestVmmuCount[MAX_VGPU_TYPES_PER_PGPU]; 189 NvU16 placementRegionSize; 190 PLACEMENT_REGION_BIT_VECTOR usedPlacementRegionMap; 191 VGPU_CONFIG_EVENT_INFO_NODE_LIST listVgpuConfigEventsHead; 192 NvBool sriovEnabled; 193 NvBool heterogeneousTimesliceSizesSupported; 194 NvU32 numCreatedVgpu; // Used only on KVM 195 vgpu_vf_pci_info vfPciInfo[MAX_VF_COUNT_PER_GPU]; // Used only on KVM 196 NvU64 createdVfMask; // Used only on KVM 197 NvBool miniQuarterEnabled; // Used only on ESXi (vGPU profile) 198 NvBool computeMediaEngineEnabled; // Used only on ESXi (vGPU profile) 199 200 /*! 201 * SwizzId Map. HW currently uses only 14 swizzIds. Every bit position 202 * in this mask represents swizzID and a "1" in bitMask states SwzzId 203 * in already assigned to a vGPU device. 204 */ 205 NvU64 assignedSwizzIdMask; 206 NvU32 fractionalMultiVgpu; 207 } KERNEL_PHYS_GPU_INFO; 208 209 /* vGPU info received from mdev kernel module for KVM */ 210 typedef struct REQUEST_VGPU_INFO_NODE 211 { 212 NvU8 mdevUuid[VGPU_UUID_SIZE]; 213 NvU32 gpuPciId; 214 NvU32 gpuPciBdf; 215 NvU32 swizzId; 216 NvU16 vgpuId; 217 KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice; 218 } REQUEST_VGPU_INFO_NODE; 219 220 MAKE_LIST(REQUEST_VGPU_INFO_NODE_LIST, REQUEST_VGPU_INFO_NODE); 221 222 223 // Private field names are wrapped in PRIVATE_FIELD, which does nothing for 224 // the matching C source file, but causes diagnostics to be issued if another 225 // source file references the field. 226 #ifdef NVOC_KERNEL_VGPU_MGR_H_PRIVATE_ACCESS_ALLOWED 227 #define PRIVATE_FIELD(x) x 228 #else 229 #define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x) 230 #endif 231 232 233 struct KernelVgpuMgr { 234 235 // Metadata 236 const struct NVOC_RTTI *__nvoc_rtti; 237 238 // Parent (i.e. superclass or base class) object pointers 239 struct Object __nvoc_base_Object; 240 241 // Ancestor object pointers for `staticCast` feature 242 struct Object *__nvoc_pbase_Object; // obj super 243 struct KernelVgpuMgr *__nvoc_pbase_KernelVgpuMgr; // kvgpumgr 244 245 // Data members 246 KERNEL_PHYS_GPU_INFO pgpuInfo[32]; 247 NvU32 pgpuCount; 248 VGPU_TYPE_LIST listVgpuTypeHead; 249 KERNEL_VGPU_GUEST_LIST listVgpuGuestHead; 250 NvU32 user_min_supported_version; 251 NvU32 user_max_supported_version; 252 OBJEHEAP *pHeap; 253 REQUEST_VGPU_INFO_NODE_LIST listRequestVgpuHead; 254 }; 255 256 #ifndef __NVOC_CLASS_KernelVgpuMgr_TYPEDEF__ 257 #define __NVOC_CLASS_KernelVgpuMgr_TYPEDEF__ 258 typedef struct KernelVgpuMgr KernelVgpuMgr; 259 #endif /* __NVOC_CLASS_KernelVgpuMgr_TYPEDEF__ */ 260 261 #ifndef __nvoc_class_id_KernelVgpuMgr 262 #define __nvoc_class_id_KernelVgpuMgr 0xa793dd 263 #endif /* __nvoc_class_id_KernelVgpuMgr */ 264 265 // Casting support 266 extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelVgpuMgr; 267 268 #define __staticCast_KernelVgpuMgr(pThis) \ 269 ((pThis)->__nvoc_pbase_KernelVgpuMgr) 270 271 #ifdef __nvoc_kernel_vgpu_mgr_h_disabled 272 #define __dynamicCast_KernelVgpuMgr(pThis) ((KernelVgpuMgr*)NULL) 273 #else //__nvoc_kernel_vgpu_mgr_h_disabled 274 #define __dynamicCast_KernelVgpuMgr(pThis) \ 275 ((KernelVgpuMgr*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelVgpuMgr))) 276 #endif //__nvoc_kernel_vgpu_mgr_h_disabled 277 278 NV_STATUS __nvoc_objCreateDynamic_KernelVgpuMgr(KernelVgpuMgr**, Dynamic*, NvU32, va_list); 279 280 NV_STATUS __nvoc_objCreate_KernelVgpuMgr(KernelVgpuMgr**, Dynamic*, NvU32); 281 #define __objCreate_KernelVgpuMgr(ppNewObj, pParent, createFlags) \ 282 __nvoc_objCreate_KernelVgpuMgr((ppNewObj), staticCast((pParent), Dynamic), (createFlags)) 283 284 285 // Wrapper macros 286 287 // Dispatch functions 288 NV_STATUS kvgpumgrConstruct_IMPL(struct KernelVgpuMgr *arg_pKernelVgpuMgr); 289 290 #define __nvoc_kvgpumgrConstruct(arg_pKernelVgpuMgr) kvgpumgrConstruct_IMPL(arg_pKernelVgpuMgr) 291 void kvgpumgrDestruct_IMPL(struct KernelVgpuMgr *pKernelVgpuMgr); 292 293 #define __nvoc_kvgpumgrDestruct(pKernelVgpuMgr) kvgpumgrDestruct_IMPL(pKernelVgpuMgr) 294 #undef PRIVATE_FIELD 295 296 297 NV_STATUS 298 kvgpumgrGetPgpuIndex(struct KernelVgpuMgr *pKernelVgpuMgr, NvU32 gpuPciId, NvU32* index); 299 300 NV_STATUS 301 kvgpumgrGetVgpuTypeInfo(NvU32 vgpuTypeId, VGPU_TYPE **vgpuType); 302 303 NV_STATUS 304 kvgpumgrSetSupportedPlacementIds(struct OBJGPU *pGpu); 305 306 NV_STATUS 307 kvgpumgrUpdateHeterogeneousInfo(struct OBJGPU *pGpu, NvU32 vgpuTypeId, NvU16 *placementId, 308 NvU64 *guestFbLength, NvU64 *guestFbOffset, 309 NvU64 *gspHeapOffset); 310 311 NV_STATUS 312 kvgpumgrPgpuAddVgpuType(struct OBJGPU *pGpu, NvBool discardVgpuTypes, NVA081_CTRL_VGPU_INFO *pVgpuInfo); 313 314 NV_STATUS 315 kvgpumgrGetConfigEventInfoFromDb(NvHandle hClient, NvHandle hVgpuConfig, 316 VGPU_CONFIG_EVENT_INFO_NODE **ppVgpuConfigEventInfoNode, 317 NvU32 pgpuIndex); 318 319 NV_STATUS 320 kvgpumgrAttachGpu(NvU32 gpuPciId); 321 322 NV_STATUS 323 kvgpumgrDetachGpu(NvU32 gpuPciId); 324 325 NV_STATUS 326 kvgpumgrGuestRegister(struct OBJGPU *pGpu, 327 NvU32 gfid, 328 NvU32 vgpuType, 329 NvU32 vmPid, 330 VM_ID_TYPE vmIdType, 331 VM_ID guestVmId, 332 NvHandle hPluginFBAllocationClient, 333 NvU32 numChannels, 334 NvU32 numPluginChannels, 335 NvU32 swizzId, 336 NvU32 vgpuDeviceInstanceId, 337 NvBool bDisableDefaultSmcExecPartRestore, 338 NvU16 placementId, 339 NvU8 *pVgpuDevName, 340 KERNEL_HOST_VGPU_DEVICE **ppKernelHostVgpuDevice); 341 342 NV_STATUS 343 kvgpumgrGuestUnregister(struct OBJGPU *pGpu, KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice); 344 345 NV_STATUS 346 kvgpumgrGetMaxInstanceOfVgpu(NvU32 vgpuTypeId, NvU32 *maxInstanceVgpu); 347 348 NV_STATUS 349 kvgpumgrCheckVgpuTypeCreatable(struct OBJGPU *pGpu, KERNEL_PHYS_GPU_INFO *pPhysGpuInfo, VGPU_TYPE *vgpuTypeInfo); 350 351 NV_STATUS 352 kvgpumgrEnumerateVgpuPerPgpu(struct OBJGPU *pGpu, NV2080_CTRL_VGPU_MGR_INTERNAL_ENUMERATE_VGPU_PER_PGPU_PARAMS *pParams); 353 354 NV_STATUS 355 kvgpumgrClearGuestVmInfo(struct OBJGPU *pGpu, KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice); 356 357 NV_STATUS 358 kvgpumgrGetSwizzId(struct OBJGPU *pGpu, 359 KERNEL_PHYS_GPU_INFO *pPhysGpuInfo, 360 NvU32 partitionFlag, 361 NvU32 *swizzId); 362 363 NV_STATUS 364 kvgpumgrHeterogeneousGetChidOffset(NvU32 vgpuTypeId, NvU16 placementId, 365 NvU32 numChannels, NvU64 *pChidOffset); 366 367 NV_STATUS 368 kvgpumgrValidateSwizzId(struct OBJGPU *pGpu, 369 NvU32 vgpuTypeId, 370 NvU32 swizzId); 371 372 NV_STATUS 373 kvgpumgrGetVgpuFbUsage(struct OBJGPU *pGpu, NVA081_CTRL_VGPU_CONFIG_GET_VGPU_FB_USAGE_PARAMS *pParams); 374 375 NV_STATUS 376 kvgpumgrSetVgpuEncoderCapacity(struct OBJGPU *pGpu, NvU8 *vgpuUuid, NvU32 encoderCapacity); 377 378 NV_STATUS 379 kvgpumgrCreateRequestVgpu(NvU32 gpuPciId, const NvU8 *pMdevUuid, 380 NvU32 vgpuTypeId, NvU16 *vgpuId, NvU32 gpuPciBdf); 381 382 NV_STATUS 383 kvgpumgrDeleteRequestVgpu(const NvU8 *pMdevUuid, NvU16 vgpuId); 384 385 NV_STATUS 386 kvgpumgrGetAvailableInstances(NvU32 *avail_instances, struct OBJGPU *pGpu, VGPU_TYPE *vgpuTypeInfo, 387 NvU32 pgpuIndex, NvU8 devfn); 388 389 NV_STATUS 390 kvgpumgrGetHostVgpuDeviceFromMdevUuid(NvU32 gpuPciId, const NvU8 *pMdevUuid, 391 KERNEL_HOST_VGPU_DEVICE **ppKernelHostVgpuDevice); 392 393 NV_STATUS 394 kvgpumgrGetHostVgpuDeviceFromVgpuUuid(NvU32 gpuPciId, NvU8 *vgpuUuid, 395 KERNEL_HOST_VGPU_DEVICE **ppKernelHostVgpuDevice); 396 397 NV_STATUS 398 kvgpumgrGetCreatableVgpuTypes(struct OBJGPU *pGpu, struct KernelVgpuMgr *pKernelVgpuMgr, NvU32 pgpuIndex, NvU32* numVgpuTypes, NvU32* vgpuTypes); 399 400 NvU64 401 kvgpumgrGetEccAndPrReservedFb(struct OBJGPU *pGpu); 402 403 NvU32 404 kvgpumgrGetPgpuDevIdEncoding(struct OBJGPU *pGpu, NvU8 *pgpuString, NvU32 strSize); 405 406 NvU32 407 kvgpumgrGetPgpuSubdevIdEncoding(struct OBJGPU *pGpu, NvU8 *pgpuString, NvU32 strSize); 408 409 NvU32 410 kvgpumgrGetPgpuFSEncoding(struct OBJGPU *pGpu, NvU8 *pgpuString, NvU32 strSize); 411 412 NvU32 413 kvgpumgrGetPgpuCapEncoding(struct OBJGPU *pGpu, NvU8 *pgpuString, NvU32 strSize); 414 415 NvBool 416 kvgpumgrCheckPgpuMigrationSupport(struct OBJGPU *pGpu); 417 418 NV_STATUS 419 kvgpumgrGetHostVgpuVersion(NvU32 *user_min_supported_version, 420 NvU32 *user_max_supported_version); 421 422 NV_STATUS 423 kvgpumgrSetHostVgpuVersion(NvU32 user_min_supported_version, 424 NvU32 user_max_supported_version); 425 426 NV_STATUS 427 kvgpumgrGetPartitionFlag(NvU32 vgpuTypeId, 428 NvU32 *partitionFlag); 429 430 NV_STATUS 431 kvgpumgrProcessVfInfo(NvU32 gpuPciId, NvU8 cmd, NvU32 domain, NvU32 bus, NvU32 slot, NvU32 function, NvBool isMdevAttached, vgpu_vf_pci_info *vf_info); 432 433 NV_STATUS 434 kvgpumgrSendAllVgpuTypesToGsp(struct OBJGPU *pGpu); 435 436 NvBool 437 kvgpumgrIsHeterogeneousVgpuSupported(void); 438 439 NvBool 440 kvgpumgrIsVgpuWarmUpdateSupported(void); 441 442 NV_STATUS 443 kvgpumgrGetHostVgpuDeviceFromGfid(NvU32 gpuPciId, NvU32 gfid, 444 KERNEL_HOST_VGPU_DEVICE** ppHostVgpuDevice); 445 NV_STATUS 446 kvgpuMgrRestoreSmcExecPart(struct OBJGPU *pGpu,KERNEL_HOST_VGPU_DEVICE *pKernelHostVgpuDevice, 447 KERNEL_MIG_GPU_INSTANCE *pKernelMIGGpuInstance); 448 NV_STATUS 449 kvgpumgrSetVgpuType(struct OBJGPU *pGpu, KERNEL_PHYS_GPU_INFO *pPhysGpuInfo, NvU32 vgpuTypeId); 450 451 #endif // __kernel_vgpu_mgr_h__ 452 453 #ifdef __cplusplus 454 } // extern "C" 455 #endif 456 457 #endif // _G_KERNEL_VGPU_MGR_NVOC_H_ 458