1 /*
2 * SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
3 * SPDX-License-Identifier: MIT
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24 #ifndef _COMMON_NVSWITCH_H_
25 #define _COMMON_NVSWITCH_H_
26
27 #ifdef INCLUDE_NVLINK_LIB
28 #include "nvlink.h"
29 #endif
30
31 #include "export_nvswitch.h"
32 #include "error_nvswitch.h"
33 #include "io_nvswitch.h"
34 #include "rom_nvswitch.h"
35 #include "haldef_nvswitch.h"
36 #include "nvctassert.h"
37 #include "flcn/flcnable_nvswitch.h"
38 #include "inforom/inforom_nvswitch.h"
39 #include "spi_nvswitch.h"
40 #include "smbpbi_nvswitch.h"
41 #include "nvCpuUuid.h"
42 #include "fsprpc_nvswitch.h"
43
44 #include "soe/cci/cpld_machx03.h"
45
46 #define NVSWITCH_GET_BIT(v, p) (((v) >> (p)) & 1)
47 #define NVSWITCH_SET_BIT(v, p) ((v) | NVBIT(p))
48 #define NVSWITCH_CLEAR_BIT(v, p) ((v) & ~NVBIT(p))
49 #define NVSWITCH_MASK_BITS(n) (~(0xFFFFFFFF << (n)))
50
nvswitch_test_flags(NvU32 val,NvU32 flags)51 static NV_INLINE NvBool nvswitch_test_flags(NvU32 val, NvU32 flags)
52 {
53 return !!(val & flags);
54 }
55
nvswitch_set_flags(NvU32 * val,NvU32 flags)56 static NV_INLINE void nvswitch_set_flags(NvU32 *val, NvU32 flags)
57 {
58 *val |= flags;
59 }
60
nvswitch_clear_flags(NvU32 * val,NvU32 flags)61 static NV_INLINE void nvswitch_clear_flags(NvU32 *val, NvU32 flags)
62 {
63 *val &= ~flags;
64 }
65
66 // Destructive operation to reverse bits in a mask
67 #define NVSWITCH_REVERSE_BITMASK_32(numBits, mask) \
68 { \
69 NvU32 i, reverse = 0; \
70 FOR_EACH_INDEX_IN_MASK(32, i, mask) \
71 { \
72 reverse |= NVBIT((numBits - 1) - i); \
73 } \
74 FOR_EACH_INDEX_IN_MASK_END; \
75 \
76 mask = reverse; \
77 }
78
79 #define NVSWITCH_CHECK_STATUS(_d, _status) \
80 if (_status != NVL_SUCCESS) \
81 { \
82 NVSWITCH_PRINT(_d, MMIO, "%s(%d): status=%d\n", \
83 __FUNCTION__, __LINE__, \
84 _status); \
85 }
86
87 #define IS_RTLSIM(device) (device->is_rtlsim)
88 #define IS_FMODEL(device) (device->is_fmodel)
89 #define IS_EMULATION(device) (device->is_emulation)
90
91 #define NVSWITCH_DEVICE_NAME "nvswitch"
92 #define NVSWITCH_LINK_NAME "link"
93
94 // Max size of sprintf("%d", valid_instance) compile time check
95 #if NVSWITCH_DEVICE_INSTANCE_MAX < 100
96 #define NVSWITCH_INSTANCE_LEN 2
97 #endif
98
99 #define NV_ARRAY_ELEMENTS(x) ((sizeof(x)/sizeof((x)[0])))
100
101 #define NVSWITCH_DBG_LEVEL(_d) (_d == NULL ? NVSWITCH_DBG_LEVEL_INFO : ((nvswitch_device *)_d)->regkeys.debug_level)
102
103 #if defined(DEVELOP) || defined(DEBUG) || defined(NV_MODS)
104 #define NVSWITCH_PRINT(_d, _lvl, _fmt, ...) \
105 ((NVSWITCH_DBG_LEVEL(_d) <= NVSWITCH_DBG_LEVEL_ ## _lvl) ? \
106 nvswitch_os_print(NVSWITCH_DBG_LEVEL_ ## _lvl, \
107 "%s[%-5s]: " _fmt, \
108 ((_d == NULL) ? \
109 "nvswitchx" : \
110 ((nvswitch_device *)_d)->name), \
111 #_lvl, \
112 ## __VA_ARGS__) : \
113 ((void)(0)) \
114 )
115 #else
116 #define NVSWITCH_PRINT(_d, _lvl, _fmt, ...) ((void)0)
117 #endif
118
119 #if defined(DEVELOP) || defined(DEBUG) || defined(NV_MODS)
120 #define nvswitch_os_malloc(_size) \
121 nvswitch_os_malloc_trace(_size, __FILE__, __LINE__)
122 #else
123 #define nvswitch_os_malloc(_size) \
124 nvswitch_os_malloc_trace(_size, NULL, 0)
125 #endif
126
127 // LS10 Saved LED state
128 #define ACCESS_LINK_LED_STATE CPLD_MACHXO3_ACCESS_LINK_LED_CTL_NVL_CABLE_LED
129
130 //
131 // This macro should be used to check assertion statements and print Error messages.
132 //
133 #if defined(DEVELOP) || defined(DEBUG) || defined(NV_MODS)
134 void nvswitch_assert_log
135 (
136 const char *function,
137 const char *file,
138 NvU32 line
139 );
140
141 #define NVSWITCH_ASSERT(_cond) \
142 ((void)((!(_cond)) ? nvswitch_assert_log(__FUNCTION__, __FILE__, __LINE__) : 0))
143
144 #else
145 void nvswitch_assert_log(void);
146
147 #define NVSWITCH_ASSERT(_cond) \
148 ((void)((!(_cond)) ? nvswitch_assert_log() : 0))
149 #endif
150
151 #define NVSWITCH_ASSERT_ERROR_INFO(errorCategory, errorInfo) NVSWITCH_ASSERT(0x0)
152 #define NVSWITCH_ASSERT_INFO(errCode, errLinkMask, errSubcode) NVSWITCH_ASSERT(0x0)
153
154 //
155 // This macro should be used cautiously as it prints information in the release
156 // drivers.
157 //
158 #define NVSWITCH_PRINT_SXID(_d, _sxid, _fmt, ...) \
159 do \
160 { \
161 NVSWITCH_ASSERT(nvswitch_translate_hw_error(_sxid) != NVSWITCH_NVLINK_HW_GENERIC); \
162 nvswitch_os_print(NVSWITCH_DBG_LEVEL_ERROR, \
163 "nvidia-%s: SXid (PCI:" NVLINK_PCI_DEV_FMT "): %05d, " _fmt, \
164 (_d)->name, NVLINK_PCI_DEV_FMT_ARGS(&(_d)->nvlink_device->pciInfo), _sxid, \
165 ##__VA_ARGS__); \
166 nvswitch_lib_smbpbi_log_sxid(_d, _sxid, _fmt, ##__VA_ARGS__); \
167 nvswitch_inforom_bbx_add_sxid(_d, _sxid, 0, 0, 0); \
168 } while(0)
169
170 #define NVSWITCH_PRINT_SXID_NO_BBX(_d, _sxid, _fmt, ...) \
171 do \
172 { \
173 NVSWITCH_ASSERT(nvswitch_translate_hw_error(_sxid) != NVSWITCH_NVLINK_HW_GENERIC); \
174 nvswitch_os_print(NVSWITCH_DBG_LEVEL_ERROR, \
175 "nvidia-%s: SXid (PCI:" NVLINK_PCI_DEV_FMT "): %05d, " _fmt, \
176 (_d)->name, NVLINK_PCI_DEV_FMT_ARGS(&(_d)->nvlink_device->pciInfo), _sxid, \
177 ##__VA_ARGS__); \
178 nvswitch_lib_smbpbi_log_sxid(_d, _sxid, _fmt, ##__VA_ARGS__); \
179 } while(0)
180
181 #define NVSWITCH_DEV_CMD_DISPATCH_WITH_PRIVATE_DATA(cmd, function, type, private)\
182 case cmd: \
183 { \
184 if (sizeof(type) == size) \
185 { \
186 retval = function(device, params, private); \
187 } \
188 else \
189 { \
190 retval = -NVL_BAD_ARGS; \
191 } \
192 break; \
193 }
194
195 #define NVSWITCH_DEV_CMD_DISPATCH_HELPER(cmd, supported, function, type) \
196 case cmd: \
197 { \
198 if (!supported) \
199 { \
200 retval = -NVL_ERR_NOT_SUPPORTED; \
201 } \
202 else if (sizeof(type) == size) \
203 { \
204 retval = function(device, params); \
205 } \
206 else \
207 { \
208 retval = -NVL_BAD_ARGS; \
209 } \
210 break; \
211 }
212
213 #define NVSWITCH_DEV_CMD_DISPATCH(cmd, function, type) \
214 NVSWITCH_DEV_CMD_DISPATCH_HELPER(cmd, NV_TRUE, function, type)
215
216 #define NVSWITCH_MODS_CMDS_SUPPORTED NV_FALSE
217
218 #define NVSWITCH_DEV_CMD_DISPATCH_MODS(cmd, function, type) \
219 NVSWITCH_DEV_CMD_DISPATCH_HELPER(cmd, NVSWITCH_MODS_CMDS_SUPPORTED, function, type)
220
221 #define NVSWITCH_MAX_NUM_LINKS 100
222 #if NVSWITCH_MAX_NUM_LINKS <= 100
223 #define NVSWITCH_LINK_INSTANCE_LEN 2
224 #endif
225
226 extern const nvlink_link_handlers nvswitch_link_handlers;
227
228 //
229 // link_info is used to store private link information
230 //
231 typedef struct
232 {
233 char name[sizeof(NVSWITCH_LINK_NAME) + NVSWITCH_LINK_INSTANCE_LEN];
234 } LINK_INFO;
235
236 typedef struct
237 {
238 NvU32 external_fabric_mgmt;
239 NvU32 txtrain_control;
240 NvU32 crossbar_DBI;
241 NvU32 link_DBI;
242 NvU32 ac_coupled_mask;
243 NvU32 ac_coupled_mask2;
244 NvU32 swap_clk;
245 NvU32 link_enable_mask;
246 NvU32 link_enable_mask2;
247 NvU32 bandwidth_shaper;
248 NvU32 ssg_control;
249 NvU32 skip_buffer_ready;
250 NvU32 enable_pm;
251 NvU32 chiplib_forced_config_link_mask;
252 NvU32 chiplib_forced_config_link_mask2;
253 NvU32 soe_dma_self_test;
254 NvU32 soe_disable;
255 NvU32 soe_enable;
256 NvU32 soe_boot_core;
257 NvU32 cci_control;
258 NvU32 cci_link_train_disable_mask;
259 NvU32 cci_link_train_disable_mask2;
260 NvU32 cci_max_onboard_attempts;
261 NvU32 cci_error_log_enable;
262 NvU32 latency_counter;
263 NvU32 nvlink_speed_control;
264 NvU32 inforom_bbx_periodic_flush;
265 NvU32 inforom_bbx_write_periodicity;
266 NvU32 inforom_bbx_write_min_duration;
267 NvU32 ato_control;
268 NvU32 sto_control;
269 NvU32 minion_disable;
270 NvU32 set_ucode_target;
271 NvU32 set_simmode;
272 NvU32 set_smf_settings;
273 NvU32 select_uphy_tables;
274 NvU32 link_training_mode;
275 NvU32 i2c_access_control;
276 NvU32 force_kernel_i2c;
277 NvU32 link_recal_settings;
278 NvU32 crc_bit_error_rate_short;
279 NvU32 crc_bit_error_rate_long;
280 NvU32 lp_threshold;
281 NvU32 minion_intr;
282 NvU32 surpress_link_errors_for_gpu_reset;
283 NvU32 block_code_mode;
284 NvU32 reference_clock_mode;
285 NvU32 debug_level;
286 } NVSWITCH_REGKEY_TYPE;
287
288 //
289 // Background tasks
290 //
291 typedef struct NVSWITCH_TASK
292 {
293 struct NVSWITCH_TASK *prev;
294 struct NVSWITCH_TASK *next;
295 void (*task_fn_vdptr)(nvswitch_device *, void *);
296 void (*task_fn_devptr)(nvswitch_device *);
297 void *task_args;
298 NvU64 period_nsec;
299 NvU64 last_run_nsec;
300 NvU32 flags;
301 } NVSWITCH_TASK_TYPE;
302
303 #define NVSWITCH_TASK_TYPE_FLAGS_RUN_EVEN_IF_DEVICE_NOT_INITIALIZED 0x1 // Run even the if not initialized
304 #define NVSWITCH_TASK_TYPE_FLAGS_RUN_ONCE 0x2 // Only run the task once. Memory for task struct and args will be freed by dispatcher after running.
305 #define NVSWITCH_TASK_TYPE_FLAGS_VOID_PTR_ARGS 0x4 // Function accepts args as void * args.
306
307 //
308 // Wrapper struct for deffered SXID errors
309 //
310 typedef struct
311 {
312 NvU32 nvlipt_instance;
313 NvU32 link;
314 } NVSWITCH_DEFERRED_ERROR_REPORTING_ARGS;
315
316 //
317 // PLL
318 //
319 typedef struct
320 {
321 NvU32 src_freq_khz;
322 NvU32 M;
323 NvU32 N;
324 NvU32 PL;
325 NvU32 dist_mode;
326 NvU32 refclk_div;
327 NvU32 vco_freq_khz;
328 NvU32 freq_khz;
329 } NVSWITCH_PLL_INFO;
330
331 // Per-unit interrupt masks
332 typedef struct
333 {
334 NvU32 fatal;
335 NvU32 nonfatal;
336 NvU32 correctable;
337 } NVSWITCH_INTERRUPT_MASK;
338
339 // BIOS Image
340 typedef struct
341 {
342 // Size of the image.
343 NvU32 size;
344
345 // pointer to the BIOS image.
346 NvU8* pImage;
347 } NVSWITCH_BIOS_IMAGE;
348
349 struct NVSWITCH_CLIENT_EVENT
350 {
351 NVListRec entry;
352 NvU32 eventId;
353 void *private_driver_data;
354 };
355
356 typedef struct
357 {
358 NvU8 port_event_type; // 0 = port up, 1 = port down, 2 = error invalid entry
359 NvU64 local_port_event_num; // Count of preceding port events (local port event log)
360 NvU64 global_port_event_num; // Count of preceding port events (globally)
361 NvU32 link_id; // Link that event occured on
362 NvU64 time; // Platform time, in ns
363 } NVSWITCH_PORT_EVENT_TYPE;
364
365 #define NVSWITCH_PORT_EVENT_LOG_SIZE 1024
366
367 typedef struct
368 {
369 NvU32 port_event_start; // Start index within CB (circular buffer)
370 NvU32 port_event_count; // Count of current port events in CB
371 NvU64 port_event_total; // Count of total port events logged
372 NvU32 port_event_log_size; // CB size
373 NVSWITCH_PORT_EVENT_TYPE *port_event_log;
374 NvBool overwritable; // Old entries can be overwritten
375 NvBool bOverflow; // True when log has been overflowed and no
376 // longer contains all port events that occurred
377 } NVSWITCH_PORT_EVENT_LOG_TYPE;
378
379
380 //
381 // common device information
382 //
383 struct nvswitch_device
384 {
385 #ifdef INCLUDE_NVLINK_LIB
386 nvlink_device *nvlink_device;
387 #endif
388
389 char name[sizeof(NVSWITCH_DEVICE_NAME) + NVSWITCH_INSTANCE_LEN];
390
391 void *os_handle;
392 NvU32 os_instance;
393
394 NvBool is_emulation;
395 NvBool is_rtlsim;
396 NvBool is_fmodel;
397
398 NVSWITCH_REGKEY_TYPE regkeys;
399
400 // Tasks
401 NVSWITCH_TASK_TYPE *tasks;
402
403 // Errors
404 NvU64 error_total; // Total errors recorded across all error logs
405 NVSWITCH_ERROR_LOG_TYPE log_FATAL_ERRORS;
406 NVSWITCH_ERROR_LOG_TYPE log_NONFATAL_ERRORS;
407
408 // Port Events
409 NVSWITCH_PORT_EVENT_LOG_TYPE log_PORT_EVENTS;
410
411 NVSWITCH_FIRMWARE firmware;
412
413 // HAL connectivity
414 nvswitch_hal hal;
415
416 // SOE
417 FLCNABLE *pSoe;
418 // CCI
419 struct CCI *pCci;
420
421 NvU8 current_led_state;
422 NvU8 next_led_state;
423 NvU64 tp_counter_previous_sum[NVSWITCH_NVLINK_MAX_LINKS];
424
425 // DMA
426 NvU32 dma_addr_width;
427
428 // InfoROM
429 struct inforom *pInforom;
430
431 // I2C
432 struct NVSWITCH_OBJI2C *pI2c;
433
434 // SMBPBI
435 struct smbpbi *pSmbpbi;
436
437 // NVSWITCH_LINK_TYPE
438 NvBool bModeContinuousALI;
439 NVSWITCH_LINK_TYPE link[NVSWITCH_MAX_LINK_COUNT];
440
441 // PLL
442 NVSWITCH_PLL_INFO switch_pll;
443
444 // Device specific information
445 NvU32 chip_arch; // NVSWITCH_GET_INFO_INDEX_ARCH_*
446 NvU32 chip_impl; // NVSWITCH_GET_INFO_INDEX_IMPL_*
447 //
448 NvU32 chip_id; // NV_PSMC/PMC_BOOT_42_CHIP_ID_*
449 void * chip_device;
450
451 // UUID in big-endian format
452 NvUuid uuid;
453
454 // Fabric Manager timeout value for the heartbeat
455 NvU32 fm_timeout;
456
457 // Fabric State
458 NVSWITCH_DRIVER_FABRIC_STATE driver_fabric_state;
459 NVSWITCH_DEVICE_FABRIC_STATE device_fabric_state;
460 NVSWITCH_DEVICE_BLACKLIST_REASON device_blacklist_reason;
461 NvU64 fabric_state_timestamp;
462 NvU32 fabric_state_sequence_number;
463
464 // Full BIOS image
465 NVSWITCH_BIOS_IMAGE biosImage;
466
467 // List of client events
468 NVListRec client_events_list;
469
470 // To be removed once newer vbios is on TOT.
471 NvBool bIsNvlinkVbiosTableVersion2;
472
473 // Trusted NVLink Mode
474 NVSWITCH_DEVICE_TNVL_MODE tnvl_mode;
475 };
476
477 #define NVSWITCH_IS_DEVICE_VALID(device) \
478 ((device != NULL) && \
479 (device->nvlink_device->type == NVLINK_DEVICE_TYPE_NVSWITCH))
480
481 #define NVSWITCH_IS_DEVICE_ACCESSIBLE(device) \
482 (NVSWITCH_IS_DEVICE_VALID(device) && \
483 (device->nvlink_device->pciInfo.bars[0].pBar != NULL))
484
485 #define NVSWITCH_IS_DEVICE_INITIALIZED(device) \
486 (NVSWITCH_IS_DEVICE_ACCESSIBLE(device) && \
487 (device->nvlink_device->initialized))
488
489 //
490 // Error Function defines
491 //
492
493 NvlStatus
494 nvswitch_construct_error_log
495 (
496 NVSWITCH_ERROR_LOG_TYPE *errors,
497 NvU32 error_log_size,
498 NvBool overwritable
499 );
500
501 void
502 nvswitch_destroy_error_log
503 (
504 nvswitch_device *device,
505 NVSWITCH_ERROR_LOG_TYPE *errors
506 );
507
508 void
509 nvswitch_record_error
510 (
511 nvswitch_device *device,
512 NVSWITCH_ERROR_LOG_TYPE *errors,
513 NvU32 error_type, // NVSWITCH_ERR_*
514 NvU32 instance,
515 NvU32 subinstance,
516 NVSWITCH_ERROR_SRC_TYPE error_src, // NVSWITCH_ERROR_SRC_*
517 NVSWITCH_ERROR_SEVERITY_TYPE severity, // NVSWITCH_ERROR_SEVERITY_*
518 NvBool error_resolved,
519 void *data,
520 NvU32 data_size,
521 NvU32 line,
522 const char *description
523 );
524
525 void
526 nvswitch_discard_errors
527 (
528 NVSWITCH_ERROR_LOG_TYPE *errors,
529 NvU32 error_discard_count
530 );
531
532 void
533 nvswitch_get_error
534 (
535 nvswitch_device *device,
536 NVSWITCH_ERROR_LOG_TYPE *errors,
537 NVSWITCH_ERROR_TYPE *error_entry,
538 NvU32 error_idx,
539 NvU32 *error_count
540 );
541
542 void
543 nvswitch_get_next_error
544 (
545 nvswitch_device *device,
546 NVSWITCH_ERROR_LOG_TYPE *errors,
547 NVSWITCH_ERROR_TYPE *error_entry,
548 NvU32 *error_count,
549 NvBool remove_from_list
550 );
551
552 void
553 nvswitch_get_link_handlers
554 (
555 nvlink_link_handlers *nvswitch_link_handlers
556 );
557
558 //
559 // Timeout checking
560 //
561
562 typedef struct NVSWITCH_TIMEOUT
563 {
564 NvU64 timeout_ns;
565 } NVSWITCH_TIMEOUT;
566
567 #define NVSWITCH_INTERVAL_1USEC_IN_NS 1000LL
568 #define NVSWITCH_INTERVAL_50USEC_IN_NS 50000LL
569 #define NVSWITCH_INTERVAL_1MSEC_IN_NS 1000000LL
570 #define NVSWITCH_INTERVAL_5MSEC_IN_NS 5000000LL
571 #define NVSWITCH_INTERVAL_750MSEC_IN_NS 750000000LL
572 #define NVSWITCH_INTERVAL_1SEC_IN_NS 1000000000LL
573 #define NVSWITCH_INTERVAL_4SEC_IN_NS 4000000000LL
574
575 #define NVSWITCH_HEARTBEAT_INTERVAL_NS NVSWITCH_INTERVAL_1SEC_IN_NS
576
577 // This should only be used for short delays
578 #define NVSWITCH_NSEC_DELAY(nsec_delay) \
579 do \
580 { \
581 if (!IS_FMODEL(device)) \
582 { \
583 NVSWITCH_TIMEOUT timeout; \
584 nvswitch_timeout_create(nsec_delay, &timeout); \
585 do { } \
586 while (!nvswitch_timeout_check(&timeout)); \
587 } \
588 } while(0)
589
590 // Access link LED states on LS10 Systems
591 #define ACCESS_LINK_LED_STATE_FAULT 0U
592 #define ACCESS_LINK_LED_STATE_OFF 1U
593 #define ACCESS_LINK_LED_STATE_INITIALIZE 2U
594 #define ACCESS_LINK_LED_STATE_UP_WARM 3U
595 #define ACCESS_LINK_LED_STATE_UP_ACTIVE 4U
596 #define ACCESS_LINK_NUM_LED_STATES 5U
597
598 #define NVSWITCH_GET_CAP(tbl,cap,field) (((NvU8)tbl[((1?cap##field)>=cap##_TBL_SIZE) ? 0/0 : (1?cap##field)]) & (0?cap##field))
599 #define NVSWITCH_SET_CAP(tbl,cap,field) ((tbl[((1?cap##field)>=cap##_TBL_SIZE) ? 0/0 : (1?cap##field)]) |= (0?cap##field))
600
601 NvBool nvswitch_is_lr10_device_id(NvU32 device_id);
602 NvBool nvswitch_is_ls10_device_id(NvU32 device_id);
603
604 NvU32 nvswitch_reg_read_32(nvswitch_device *device, NvU32 offset);
605 void nvswitch_reg_write_32(nvswitch_device *device, NvU32 offset, NvU32 data);
606 NvU64 nvswitch_read_64bit_counter(nvswitch_device *device, NvU32 lo_offset, NvU32 hi_offset);
607 void nvswitch_timeout_create(NvU64 timeout_ns, NVSWITCH_TIMEOUT *time);
608 NvBool nvswitch_timeout_check(NVSWITCH_TIMEOUT *time);
609 NvlStatus nvswitch_task_create(nvswitch_device *device,
610 void (*task_fn)(nvswitch_device *device),
611 NvU64 period_nsec, NvU32 flags);
612 NvlStatus nvswitch_task_create_args(nvswitch_device* device, void *fn_args,
613 void (*task_fn)(nvswitch_device* device, void *fn_args),
614 NvU64 period_nsec, NvU32 flags);
615 void nvswitch_tasks_destroy(nvswitch_device *device);
616
617 void nvswitch_free_chipdevice(nvswitch_device *device);
618 NvlStatus nvswitch_create_link(nvswitch_device *device, NvU32 link_number, nvlink_link **link);
619 nvlink_link* nvswitch_get_link(nvswitch_device *device, NvU8 link_id);
620 NvU64 nvswitch_get_enabled_link_mask(nvswitch_device *device);
621 void nvswitch_destroy_link(nvlink_link *link);
622 NvlStatus nvswitch_validate_pll_config(nvswitch_device *device,
623 NVSWITCH_PLL_INFO *switch_pll,
624 NVSWITCH_PLL_LIMITS default_pll_limits);
625
626 NvlStatus nvswitch_poll_sublink_state(nvswitch_device *device, nvlink_link *link);
627 void nvswitch_setup_link_loopback_mode(nvswitch_device *device, NvU32 linkNumber);
628 void nvswitch_reset_persistent_link_hw_state(nvswitch_device *device, NvU32 linkNumber);
629 void nvswitch_store_topology_information(nvswitch_device *device, nvlink_link *link);
630
631 NvlStatus nvswitch_launch_ALI(nvswitch_device *device);
632 NvlStatus nvswitch_launch_ALI_link_training(nvswitch_device *device, nvlink_link *link, NvBool bSync);
633 NvlStatus nvswitch_inband_read_data(nvswitch_device *device, NvU8 *dest, NvU32 linkId, NvU32 *dataSize);
634 void nvswitch_filter_messages(nvswitch_device *device, NvU32 linkId);
635 NvlStatus nvswitch_reset_and_train_link(nvswitch_device *device, nvlink_link *link);
636 NvlStatus nvswitch_set_training_mode(nvswitch_device *device);
637 NvBool nvswitch_is_link_in_reset(nvswitch_device *device, nvlink_link *link);
638 void nvswitch_apply_recal_settings(nvswitch_device *device, nvlink_link *link);
639 void nvswitch_init_buffer_ready(nvswitch_device *device, nvlink_link *link, NvBool bNportBufferReady);
640 NvBool nvswitch_does_link_need_termination_enabled(nvswitch_device *device, nvlink_link *link);
641 NvlStatus nvswitch_link_termination_setup(nvswitch_device *device, nvlink_link* link);
642 void nvswitch_record_port_event(nvswitch_device *device, NVSWITCH_PORT_EVENT_LOG_TYPE *port_events, NvU32 link_id, NvU8 port_event_type);
643 NvlStatus nvswitch_ctrl_get_port_events(nvswitch_device *device, NVSWITCH_GET_PORT_EVENTS_PARAMS *p);
644
645 #endif //_COMMON_NVSWITCH_H_
646