xref: /openbsd/sys/arch/m88k/include/frame.h (revision 54d1fe64)
1 /*	$OpenBSD: frame.h,v 1.4 2007/11/15 21:24:12 miod Exp $ */
2 /*
3  * Copyright (c) 1996 Nivas Madhur
4  * Mach Operating System
5  * Copyright (c) 1993-1992 Carnegie Mellon University
6  * All Rights Reserved.
7  *
8  * Permission to use, copy, modify and distribute this software and its
9  * documentation is hereby granted, provided that both the copyright
10  * notice and this permission notice appear in all copies of the
11  * software, derivative works or modified versions, and any portions
12  * thereof, and that both notices appear in supporting documentation.
13  *
14  * CARNEGIE MELLON AND OMRON ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS IS"
15  * CONDITION.  CARNEGIE MELLON AND OMRON DISCLAIM ANY LIABILITY OF ANY KIND
16  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
17  *
18  * Carnegie Mellon requests users of this software to return to
19  *
20  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
21  *  School of Computer Science
22  *  Carnegie Mellon University
23  *  Pittsburgh PA 15213-3890
24  *
25  * any improvements or extensions that they make and grant Carnegie Mellon
26  * the rights to redistribute these changes.
27  */
28 /*
29  * Motorola 88100 exception frame definitions
30  *
31  */
32 /*
33  */
34 #ifndef _M88K_FRAME_H_
35 #define _M88K_FRAME_H_
36 
37 #include <machine/reg.h>
38 
39 struct trapframe {
40 	struct reg	tf_regs;
41 	register_t	tf_vector;	/* exception vector number */
42 	register_t	tf_mask;	/* interrupt mask level */
43 	register_t	tf_flags;	/* exception handling flags */
44 	register_t	tf_scratch1;	/* reserved for use by locore */
45 	register_t	tf_ipfsr;	/* P BUS status */
46 	register_t	tf_dpfsr;	/* P BUS status */
47 	void		*tf_cpu;	/* cpu_info pointer */
48 };
49 
50 #define	tf_r		tf_regs.r
51 #define	tf_sp		tf_regs.r[31]
52 #define	tf_epsr		tf_regs.epsr
53 #define	tf_fpsr		tf_regs.fpsr
54 #define	tf_fpcr		tf_regs.fpcr
55 #define	tf_sxip		tf_regs.sxip
56 #define	tf_snip		tf_regs.snip
57 #define	tf_sfip		tf_regs.sfip
58 #define	tf_exip		tf_regs.sxip
59 #define	tf_enip		tf_regs.snip
60 #define	tf_ssbr		tf_regs.ssbr
61 #define	tf_dmt0		tf_regs.dmt0
62 #define	tf_dmd0		tf_regs.dmd0
63 #define	tf_dma0		tf_regs.dma0
64 #define	tf_dmt1		tf_regs.dmt1
65 #define	tf_dmd1		tf_regs.dmd1
66 #define	tf_dma1		tf_regs.dma1
67 #define	tf_dmt2		tf_regs.dmt2
68 #define	tf_dmd2		tf_regs.dmd2
69 #define	tf_dma2		tf_regs.dma2
70 #define	tf_duap		tf_regs.ssbr
71 #define	tf_dsr		tf_regs.dmt0
72 #define	tf_dlar		tf_regs.dmd0
73 #define	tf_dpar		tf_regs.dma0
74 #define	tf_isr		tf_regs.dmt1
75 #define	tf_ilar		tf_regs.dmd1
76 #define	tf_ipar		tf_regs.dma1
77 #define	tf_isap		tf_regs.dmt2
78 #define	tf_dsap		tf_regs.dmd2
79 #define	tf_iuap		tf_regs.dma2
80 #define	tf_fpecr	tf_regs.fpecr
81 #define	tf_fphs1	tf_regs.fphs1
82 #define	tf_fpls1	tf_regs.fpls1
83 #define	tf_fphs2	tf_regs.fphs2
84 #define	tf_fpls2	tf_regs.fpls2
85 #define	tf_fppt		tf_regs.fppt
86 #define	tf_fprh		tf_regs.fprh
87 #define	tf_fprl		tf_regs.fprl
88 #define	tf_fpit		tf_regs.fpit
89 
90 #endif /* _M88K_FRAME_H_ */
91