1 /* $NetBSD: i915_trace.h,v 1.23 2021/12/19 12:42:06 riastradh Exp $ */
2
3 /*-
4 * Copyright (c) 2013, 2018 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Taylor R. Campbell.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #ifndef _I915_TRACE_H_
33 #define _I915_TRACE_H_
34
35 #include <sys/types.h>
36 #include <sys/sdt.h>
37
38 #include "i915_drv.h"
39 #include "i915_request.h"
40
41 #include "display/intel_display_types.h"
42
43 /* Must come last. */
44 #include <drm/drm_trace_netbsd.h>
45
46 DEFINE_TRACE3(i915,, cpu__fifo__underrun,
47 "enum pipe_drmhack"/*pipe*/,
48 "uint32_t"/*frame*/,
49 "uint32_t"/*scanline*/);
50 static inline void
trace_intel_cpu_fifo_underrun(struct drm_i915_private * dev_priv,enum pipe pipe)51 trace_intel_cpu_fifo_underrun(struct drm_i915_private *dev_priv,
52 enum pipe pipe)
53 {
54 TRACE3(i915,, cpu__fifo__underrun,
55 pipe,
56 dev_priv->drm.driver->get_vblank_counter(&dev_priv->drm, pipe),
57 intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, pipe)));
58 }
59
60 DEFINE_TRACE3(i915,, pch__fifo__underrun,
61 "enum pipe_drmhack"/*pipe*/,
62 "uint32_t"/*frame*/,
63 "uint32_t"/*scanline*/);
64 static inline void
trace_intel_pch_fifo_underrun(struct drm_i915_private * dev_priv,enum pipe pipe)65 trace_intel_pch_fifo_underrun(struct drm_i915_private *dev_priv,
66 enum pipe pipe)
67 {
68 TRACE3(i915,, pch__fifo__underrun,
69 pipe,
70 dev_priv->drm.driver->get_vblank_counter(&dev_priv->drm, pipe),
71 intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, pipe)));
72 }
73
74 DEFINE_TRACE5(i915,, gem__evict,
75 "int"/*devno*/,
76 "struct i915_address_space *"/*vm*/,
77 "uint64_t"/*size*/,
78 "uint64_t"/*align*/,
79 "unsigned"/*flags*/);
80 static inline void
trace_i915_gem_evict(struct i915_address_space * vm,uint64_t size,uint64_t align,unsigned flags)81 trace_i915_gem_evict(struct i915_address_space *vm,
82 uint64_t size, uint64_t align, unsigned flags)
83 {
84 TRACE5(i915,, gem__evict,
85 vm->i915->drm.primary->index, vm, size, align, flags);
86 }
87
88 DEFINE_TRACE6(i915,, gem__evict__node,
89 "int"/*devno*/,
90 "struct i915_address_space *"/*vm*/,
91 "uint64_t"/*start*/,
92 "uint64_t"/*size*/,
93 "unsigned long"/*color*/,
94 "unsigned"/*flags*/);
95 static inline void
trace_i915_gem_evict_node(struct i915_address_space * vm,struct drm_mm_node * node,unsigned flags)96 trace_i915_gem_evict_node(struct i915_address_space *vm,
97 struct drm_mm_node *node, unsigned flags)
98 {
99 TRACE6(i915,, gem__evict__node,
100 vm->i915->drm.primary->index, vm,
101 node->start, node->size, node->color,
102 flags);
103 }
104
105 DEFINE_TRACE2(i915,, gem__evict__vm,
106 "int"/*devno*/,
107 "struct i915_address_space *"/*vm*/);
108 static inline void
trace_i915_gem_evict_vm(struct i915_address_space * vm)109 trace_i915_gem_evict_vm(struct i915_address_space *vm)
110 {
111 TRACE2(i915,, gem__evict__vm, vm->i915->drm.primary->index, vm);
112 }
113
114 DEFINE_TRACE1(i915,, gem__object__clflush,
115 "struct drm_i915_gem_object *"/*obj*/);
116 static inline void
trace_i915_gem_object_clflush(struct drm_i915_gem_object * obj)117 trace_i915_gem_object_clflush(struct drm_i915_gem_object *obj)
118 {
119 TRACE1(i915,, gem__object__clflush, obj);
120 }
121
122 DEFINE_TRACE2(i915,, gem__object__create,
123 "struct drm_i915_gem_object *"/*obj*/,
124 "size_t"/*size*/);
125 static inline void
trace_i915_gem_object_create(struct drm_i915_gem_object * obj)126 trace_i915_gem_object_create(struct drm_i915_gem_object *obj)
127 {
128 TRACE2(i915,, gem__object__create, obj, obj->base.size);
129 }
130
131 DEFINE_TRACE1(i915,, gem__object__destroy,
132 "struct drm_i915_gem_object *"/*obj*/);
133 static inline void
trace_i915_gem_object_destroy(struct drm_i915_gem_object * obj)134 trace_i915_gem_object_destroy(struct drm_i915_gem_object *obj)
135 {
136 TRACE1(i915,, gem__object__destroy, obj);
137 }
138
139 DEFINE_TRACE4(i915,, gem__object__fault,
140 "struct drm_i915_gem_object *"/*obj*/,
141 "pgoff_t"/*page_offset*/,
142 "bool"/*gtt*/,
143 "bool"/*write*/);
144 static inline void
trace_i915_gem_object_fault(struct drm_i915_gem_object * obj,pgoff_t page_offset,bool gtt,bool write)145 trace_i915_gem_object_fault(struct drm_i915_gem_object *obj,
146 pgoff_t page_offset, bool gtt, bool write)
147 {
148 TRACE4(i915,, gem__object__fault, obj, page_offset, gtt, write);
149 }
150
151 /* XXX Not sure about size/offset types here. */
152 DEFINE_TRACE3(i915,, gem__object__pread,
153 "struct drm_i915_gem_object *"/*obj*/,
154 "off_t"/*offset*/,
155 "size_t"/*size*/);
156 static inline void
trace_i915_gem_object_pread(struct drm_i915_gem_object * obj,off_t offset,size_t size)157 trace_i915_gem_object_pread(struct drm_i915_gem_object *obj, off_t offset,
158 size_t size)
159 {
160 TRACE3(i915,, gem__object__pread, obj, offset, size);
161 }
162
163 DEFINE_TRACE3(i915,, gem__object__write,
164 "struct drm_i915_gem_object *"/*obj*/,
165 "off_t"/*offset*/,
166 "size_t"/*size*/);
167 static inline void
trace_i915_gem_object_pwrite(struct drm_i915_gem_object * obj,off_t offset,size_t size)168 trace_i915_gem_object_pwrite(struct drm_i915_gem_object *obj, off_t offset,
169 size_t size)
170 {
171 TRACE3(i915,, gem__object__write, obj, offset, size);
172 }
173
174 #define I915_DEFINE_TRACE_REQ(M, F, N) \
175 DEFINE_TRACE6(M, F, N, \
176 "uint32_t"/*devno*/, \
177 "uint64_t"/*ctx*/, \
178 "uint16_t"/*class*/, \
179 "uint16_t"/*instance*/, \
180 "uint32_t"/*seqno*/, \
181 "uint32_t"/*flags*/)
182
183 #define I915_TRACE_REQ(M, F, N, R, FLAGS) \
184 TRACE6(M, F, N, \
185 (R)->i915->drm.primary->index, \
186 (R)->fence.context, \
187 (R)->engine->uabi_class, \
188 (R)->engine->uabi_instance, \
189 (R)->fence.seqno, \
190 (FLAGS))
191
192 I915_DEFINE_TRACE_REQ(i915,, request__queue);
193 static inline void
trace_i915_request_queue(struct i915_request * request,uint32_t flags)194 trace_i915_request_queue(struct i915_request *request, uint32_t flags)
195 {
196 I915_TRACE_REQ(i915,, request__queue, request, flags);
197 }
198
199 I915_DEFINE_TRACE_REQ(i915,, request__add);
200 static inline void
trace_i915_request_add(struct i915_request * request)201 trace_i915_request_add(struct i915_request *request)
202 {
203 I915_TRACE_REQ(i915,, request__add, request, 0);
204 }
205
206 I915_DEFINE_TRACE_REQ(i915,, request__submit);
207 static inline void
trace_i915_request_submit(struct i915_request * request)208 trace_i915_request_submit(struct i915_request *request)
209 {
210 I915_TRACE_REQ(i915,, request__submit, request, 0);
211 }
212
213 I915_DEFINE_TRACE_REQ(i915,, request__execute);
214 static inline void
trace_i915_request_execute(struct i915_request * request)215 trace_i915_request_execute(struct i915_request *request)
216 {
217 I915_TRACE_REQ(i915,, request__execute, request, 0);
218 }
219
220 I915_DEFINE_TRACE_REQ(i915,, request__in);
221 static inline void
trace_i915_request_in(struct i915_request * request,unsigned port)222 trace_i915_request_in(struct i915_request *request, unsigned port)
223 {
224 /* XXX prio */
225 I915_TRACE_REQ(i915,, request__in, request, port);
226 }
227
228 I915_DEFINE_TRACE_REQ(i915,, request__out);
229 static inline void
trace_i915_request_out(struct i915_request * request)230 trace_i915_request_out(struct i915_request *request)
231 {
232 I915_TRACE_REQ(i915,, request__out,
233 request, i915_request_completed(request));
234 }
235
236 I915_DEFINE_TRACE_REQ(i915,, request__retire);
237 static inline void
trace_i915_request_retire(struct i915_request * request)238 trace_i915_request_retire(struct i915_request *request)
239 {
240 I915_TRACE_REQ(i915,, request__retire, request, 0);
241 }
242
243 I915_DEFINE_TRACE_REQ(i915,, request__wait__begin);
244 static inline void
trace_i915_request_wait_begin(struct i915_request * request,unsigned int flags)245 trace_i915_request_wait_begin(struct i915_request *request, unsigned int flags)
246 {
247 I915_TRACE_REQ(i915,, request__wait__begin, request, flags);
248 }
249
250 I915_DEFINE_TRACE_REQ(i915,, request__wait__end);
251 static inline void
trace_i915_request_wait_end(struct i915_request * request)252 trace_i915_request_wait_end(struct i915_request *request)
253 {
254 I915_TRACE_REQ(i915,, request__wait__end, request, 0);
255 }
256
257 DEFINE_TRACE3(i915,, register__read,
258 "uint32_t"/*reg*/, "uint64_t"/*value*/, "size_t"/*len*/);
259 DEFINE_TRACE3(i915,, register__write,
260 "uint32_t"/*reg*/, "uint64_t"/*value*/, "size_t"/*len*/);
261 static inline void
trace_i915_reg_rw(bool write,i915_reg_t reg,uint64_t value,size_t len,bool trace)262 trace_i915_reg_rw(bool write, i915_reg_t reg, uint64_t value, size_t len,
263 bool trace)
264 {
265 uint32_t regoff __trace_used = i915_mmio_reg_offset(reg);
266
267 if (!trace)
268 return;
269 if (write) {
270 TRACE3(i915,, register__read, regoff, value, len);
271 } else {
272 TRACE3(i915,, register__write, regoff, value, len);
273 }
274 }
275
276 DEFINE_TRACE5(i915,, vma__bind,
277 "struct drm_i915_gem_object *"/*obj*/,
278 "struct i915_address_space *"/*vm*/,
279 "uint64_t"/*offset*/,
280 "uint64_t"/*size*/,
281 "uint64_t"/*flags*/);
282 static inline void
trace_i915_vma_bind(struct i915_vma * vma,uint64_t flags)283 trace_i915_vma_bind(struct i915_vma *vma, uint64_t flags)
284 {
285 TRACE5(i915,, vma__bind,
286 vma->obj, vma->vm, vma->node.start, vma->node.size, flags);
287 }
288
289 DEFINE_TRACE4(i915,, vma__unbind,
290 "struct drm_i915_gem_object *"/*obj*/,
291 "struct i915_address_space *"/*vm*/,
292 "uint64_t"/*offset*/,
293 "uint64_t"/*size*/);
294 static inline void
trace_i915_vma_unbind(struct i915_vma * vma)295 trace_i915_vma_unbind(struct i915_vma *vma)
296 {
297 TRACE4(i915,, vma__unbind,
298 vma->obj, vma->vm, vma->node.start, vma->node.size);
299 }
300
301 DEFINE_TRACE1(i915,, gpu__freq__change,
302 "int"/*freq*/);
303 static inline void
trace_intel_gpu_freq_change(int freq)304 trace_intel_gpu_freq_change(int freq)
305 {
306 TRACE1(i915,, gpu__freq__change, freq);
307 }
308
309 DEFINE_TRACE3(i915,, context__create,
310 "int"/*devno*/,
311 "struct i915_gem_context *"/*ctx*/,
312 "struct i915_address_space *"/*vm*/);
313 static inline void
trace_i915_context_create(struct i915_gem_context * ctx)314 trace_i915_context_create(struct i915_gem_context *ctx)
315 {
316 TRACE3(i915,, context__create,
317 ctx->i915->drm.primary->index,
318 ctx,
319 rcu_access_pointer(ctx->vm));
320 }
321
322 DEFINE_TRACE3(i915,, context__free,
323 "int"/*devno*/,
324 "struct i915_gem_context *"/*ctx*/,
325 "struct i915_address_space *"/*vm*/);
326 static inline void
trace_i915_context_free(struct i915_gem_context * ctx)327 trace_i915_context_free(struct i915_gem_context *ctx)
328 {
329 TRACE3(i915,, context__free,
330 ctx->i915->drm.primary->index,
331 ctx,
332 rcu_access_pointer(ctx->vm));
333 }
334
335 DEFINE_TRACE4(i915,, page_directory_entry_alloc,
336 "struct i915_address_space *"/*vm*/,
337 "uint32_t"/*pdpe*/,
338 "uint64_t"/*start*/,
339 "uint64_t"/*pde_shift*/);
340 static inline void
trace_i915_page_directory_entry_alloc(struct i915_address_space * vm,uint32_t pdpe,uint64_t start,uint64_t pde_shift)341 trace_i915_page_directory_entry_alloc(struct i915_address_space *vm,
342 uint32_t pdpe, uint64_t start, uint64_t pde_shift)
343 {
344 TRACE4(i915,, page_directory_entry_alloc, vm, pdpe, start, pde_shift);
345 }
346
347 DEFINE_TRACE4(i915,, page_directory_pointer_entry_alloc,
348 "struct i915_address_space *"/*vm*/,
349 "uint32_t"/*pml4e*/,
350 "uint64_t"/*start*/,
351 "uint64_t"/*pde_shift*/);
352 static inline void
trace_i915_page_directory_pointer_entry_alloc(struct i915_address_space * vm,uint32_t pml4e,uint64_t start,uint64_t pde_shift)353 trace_i915_page_directory_pointer_entry_alloc(struct i915_address_space *vm,
354 uint32_t pml4e, uint64_t start, uint64_t pde_shift)
355 {
356 TRACE4(i915,, page_directory_pointer_entry_alloc,
357 vm, pml4e, start, pde_shift);
358 }
359
360 DEFINE_TRACE4(i915,, page_table_entry_alloc,
361 "struct i915_address_space *"/*vm*/,
362 "uint32_t"/*pde*/,
363 "uint64_t"/*start*/,
364 "uint64_t"/*pde_shift*/);
365 static inline void
trace_i915_page_table_entry_alloc(struct i915_address_space * vm,uint32_t pde,uint64_t start,uint64_t pde_shift)366 trace_i915_page_table_entry_alloc(struct i915_address_space *vm, uint32_t pde,
367 uint64_t start, uint64_t pde_shift)
368 {
369 TRACE4(i915,, page_table_entry_alloc, vm, pde, start, pde_shift);
370 }
371
372 DEFINE_TRACE6(i915,, page_table_entry_map,
373 "struct i915_address_space *"/*vm*/,
374 "uint32_t"/*pde*/,
375 "struct i915_page_table *"/*pt*/,
376 "uint32_t"/*first*/,
377 "uint32_t"/*count*/,
378 "uint32_t"/*bits*/);
379 static inline void
trace_i915_page_table_entry_map(struct i915_address_space * vm,uint32_t pde,struct i915_page_table * pt,uint32_t first,uint32_t count,uint32_t bits)380 trace_i915_page_table_entry_map(struct i915_address_space *vm, uint32_t pde,
381 struct i915_page_table *pt, uint32_t first, uint32_t count, uint32_t bits)
382 {
383 TRACE6(i915,, page_table_entry_map, vm, pde, pt, first, count, bits);
384 }
385
386 DEFINE_TRACE2(i915,, ppgtt__create,
387 "int"/*devno*/,
388 "struct i915_address_space *"/*vm*/);
389 static inline void
trace_i915_ppgtt_create(struct i915_address_space * vm)390 trace_i915_ppgtt_create(struct i915_address_space *vm)
391 {
392 TRACE2(i915,, ppgtt__create, vm->i915->drm.primary->index, vm);
393 }
394
395 DEFINE_TRACE2(i915,, ppgtt__release,
396 "int"/*devno*/,
397 "struct i915_address_space *"/*vm*/);
398 static inline void
trace_i915_ppgtt_release(struct i915_address_space * vm)399 trace_i915_ppgtt_release(struct i915_address_space *vm)
400 {
401 TRACE2(i915,, ppgtt__release, vm->i915->drm.primary->index, vm);
402 }
403
404 #define VM_TO_TRACE_NAME(vm) (i915_is_ggtt(vm) ? "G" : "P")
405
406 DEFINE_TRACE4(i915,, va__alloc,
407 "struct i915_address_space *"/*vm*/,
408 "uint64_t"/*start*/,
409 "uint64_t"/*end*/,
410 "const char *"/*name*/);
411 static inline void
trace_i915_va_alloc(struct i915_address_space * vm,uint64_t start,uint64_t length,const char * name)412 trace_i915_va_alloc(struct i915_address_space *vm, uint64_t start,
413 uint64_t length, const char *name)
414 {
415 /* XXX Why start/end upstream? */
416 TRACE4(i915,, va__alloc, vm, start, start + length - 1, name);
417 }
418
419 DEFINE_TRACE3(i915,, gem__shrink,
420 "int"/*devno*/,
421 "unsigned long"/*target*/,
422 "unsigned"/*flags*/);
423 static inline void
trace_i915_gem_shrink(struct drm_i915_private * dev_priv,unsigned long target,unsigned flags)424 trace_i915_gem_shrink(struct drm_i915_private *dev_priv, unsigned long target,
425 unsigned flags)
426 {
427 TRACE3(i915,, gem__shrink,
428 dev_priv->drm.primary->index, target, flags);
429 }
430
431 DEFINE_TRACE5(i915,, pipe__update__start,
432 "enum pipe_drmhack"/*pipe*/,
433 "uint32_t"/*frame*/,
434 "int"/*scanline*/,
435 "uint32_t"/*min*/,
436 "uint32_t"/*max*/);
437 static inline void
trace_intel_pipe_update_start(struct intel_crtc * crtc)438 trace_intel_pipe_update_start(struct intel_crtc *crtc)
439 {
440 TRACE5(i915,, pipe__update__start,
441 crtc->pipe,
442 crtc->base.dev->driver->get_vblank_counter(crtc->base.dev,
443 crtc->pipe),
444 intel_get_crtc_scanline(crtc),
445 crtc->debug.min_vbl,
446 crtc->debug.max_vbl);
447 }
448
449 DEFINE_TRACE5(i915,, pipe__update__vblank__evaded,
450 "enum pipe_drmhack"/*pipe*/,
451 "uint32_t"/*frame*/,
452 "int"/*scanline*/,
453 "uint32_t"/*min*/,
454 "uint32_t"/*max*/);
455 static inline void
trace_intel_pipe_update_vblank_evaded(struct intel_crtc * crtc)456 trace_intel_pipe_update_vblank_evaded(struct intel_crtc *crtc)
457 {
458 TRACE5(i915,, pipe__update__vblank__evaded,
459 crtc->pipe,
460 crtc->debug.start_vbl_count,
461 crtc->debug.scanline_start,
462 crtc->debug.min_vbl,
463 crtc->debug.max_vbl);
464 }
465
466 DEFINE_TRACE3(i915,, pipe__update__end,
467 "enum pipe_drmhack"/*pipe*/,
468 "uint32_t"/*frame*/,
469 "int"/*scanline*/);
470 static inline void
trace_intel_pipe_update_end(struct intel_crtc * crtc,uint32_t frame,int scanline)471 trace_intel_pipe_update_end(struct intel_crtc *crtc, uint32_t frame,
472 int scanline)
473 {
474 TRACE3(i915,, pipe__update__end, crtc->pipe, frame, scanline);
475 }
476
477 DEFINE_TRACE2(i915,, update__plane,
478 "struct drm_plane *"/*plane*/,
479 "struct intel_crtc *"/*crtc*/);
480
481 static inline void
trace_intel_update_plane(struct drm_plane * plane,struct intel_crtc * crtc)482 trace_intel_update_plane(struct drm_plane *plane, struct intel_crtc *crtc)
483 {
484 TRACE2(i915,, update__plane, plane, crtc);
485 }
486
487 DEFINE_TRACE2(i915,, disable__plane,
488 "struct drm_plane *"/*plane*/,
489 "struct intel_crtc *"/*crtc*/);
490
491 static inline void
trace_intel_disable_plane(struct drm_plane * plane,struct intel_crtc * crtc)492 trace_intel_disable_plane(struct drm_plane *plane, struct intel_crtc *crtc)
493 {
494 TRACE2(i915,, disable__plane, plane, crtc);
495 }
496
497 DEFINE_TRACE1(i915,, pipe__enable,
498 "struct intel_crtc *"/*crtc*/);
499
500 static inline void
trace_intel_pipe_enable(struct intel_crtc * crtc)501 trace_intel_pipe_enable(struct intel_crtc *crtc)
502 {
503 TRACE1(i915,, pipe__enable, crtc);
504 }
505
506 DEFINE_TRACE1(i915,, pipe__disable,
507 "struct intel_crtc *"/*crtc*/);
508
509 static inline void
trace_intel_pipe_disable(struct intel_crtc * crtc)510 trace_intel_pipe_disable(struct intel_crtc *crtc)
511 {
512 TRACE1(i915,, pipe__disable, crtc);
513 }
514
515 DEFINE_TRACE3(i915,, memory_cxsr,
516 "struct drm_i915_private *"/*dev_priv*/,
517 "bool"/*was_enabled*/,
518 "bool"/*enable*/);
519 static inline void
trace_intel_memory_cxsr(struct drm_i915_private * dev_priv,bool was_enabled,bool enable)520 trace_intel_memory_cxsr(struct drm_i915_private *dev_priv, bool was_enabled,
521 bool enable)
522 {
523 TRACE3(i915,, memory_cxsr, dev_priv, was_enabled, enable);
524 }
525
526 DEFINE_TRACE2(i915,, g4x_wm,
527 "struct intel_crtc *"/*crtc*/,
528 "struct g4x_wm_values *"/*wm*/);
529 static inline void
trace_g4x_wm(struct intel_crtc * crtc,const struct g4x_wm_values * wm)530 trace_g4x_wm(struct intel_crtc *crtc, const struct g4x_wm_values *wm)
531 {
532 TRACE2(i915,, g4x_wm, crtc, wm);
533 }
534
535 DEFINE_TRACE2(i915,, vlv_wm,
536 "struct intel_crtc *"/*crtc*/,
537 "struct vlv_wm_values *"/*wm*/);
538 static inline void
trace_vlv_wm(struct intel_crtc * crtc,const struct vlv_wm_values * wm)539 trace_vlv_wm(struct intel_crtc *crtc, const struct vlv_wm_values *wm)
540 {
541 TRACE2(i915,, vlv_wm, crtc, wm);
542 }
543
544 DEFINE_TRACE4(i915,, vlv_fifo_size,
545 "struct intel_crtc *"/*crtc*/,
546 "int"/*sprite0_start*/,
547 "int"/*sprite1_start*/,
548 "int"/*fifo_size*/);
549 static inline void
trace_vlv_fifo_size(struct intel_crtc * crtc,int sprite0_start,int sprite1_start,int fifo_size)550 trace_vlv_fifo_size(struct intel_crtc *crtc, int sprite0_start,
551 int sprite1_start, int fifo_size)
552 {
553 TRACE4(i915,, vlv_fifo_size, crtc, sprite0_start, sprite1_start,
554 fifo_size);
555 }
556
557 #endif /* _I915_TRACE_H_ */
558