1 /*
2 * Copyright (c) 1982, 1986, 1988 Regents of the University of California.
3 * All rights reserved. The Berkeley software License Agreement
4 * specifies the terms and conditions for redistribution.
5 *
6 * @(#)autoconf.c 7.13 (Berkeley) 12/16/90
7 */
8
9 #include "sys/param.h"
10 #include "sys/reboot.h"
11
12 #include "../include/cpu.h"
13 #include "../vax/nexus.h"
14 #include "../include/pte.h"
15 #include "../include/mtpr.h"
16 #include "../uba/ubareg.h"
17 #include "../mba/mbareg.h"
18
19 #include "savax.h"
20
21 #ifdef VAX8200
22 #include "../bi/bireg.h"
23 #endif
24
25 #if VAX8600 || VAX8200 || VAX780
26 /*
27 * These are used on CPU's that do configuration.
28 */
29 struct uba_regs *ubaddrspace[MAXNUBA];
30 caddr_t uioaddrspace[MAXNUBA];
31 struct mba_regs *mbaddrspace[MAXNMBA];
32 #endif
33
34 #if VAX750
35 #define UTR(i) ((struct uba_regs *)(NEX750+(i)))
36 #define UMA(i) ((caddr_t)UMEM750(i)+UBAIOADDR)
37 #define MTR(i) ((struct mba_regs *)(NEX750+(i)))
38
39 struct uba_regs *ubaddr750[] = { UTR(8), UTR(9) };
40 caddr_t uioaddr750[] = { UMA(0), UMA(1) };
41 struct mba_regs *mbaddr750[] = { MTR(4), MTR(5), MTR(6), MTR(7) };
42
43 #undef UTR
44 #undef UMA
45 #undef MTR
46 #endif
47
48 #if VAX730
49 #define UTR(i) ((struct uba_regs *)(NEX730+(i)))
50 #define UMA ((caddr_t)UMEM730+UBAIOADDR)
51
52 struct uba_regs *ubaddr730[] = { UTR(3) };
53 caddr_t uioaddr730[] = { UMA };
54
55 #undef UTR
56 #undef UMA
57 #endif
58
59 #if VAX630 || VAX650
60 /*
61 * The map registers start at 20088000 on the ka630, so
62 * subtract a 2k offset to make things work.
63 *
64 * This could stand serious cleanup.
65 */
66 struct uba_regs *ubaddr630[] =
67 { (struct uba_regs *)((caddr_t)QBAMAP630 - 0x800) };
68 caddr_t uioaddr630[] = { (caddr_t)QIOPAGE630 };
69
70 int (*v_getc)(), (*v_putc)();
71
72 #ifndef SMALL
73 /*
74 * Virtual console configuration tables.
75 */
76 extern qv_init(),qd_init();
77
78 int (*vcons_init[])() = {
79 qd_init,
80 qv_init,
81 0
82 };
83 #endif
84 #endif
85
86 #ifndef SMALL
87 extern int boothowto;
88 int debug = 0;
89 #endif
90 int cpuspeed = 1;
91
configure()92 configure()
93 {
94 union cpusid cpusid;
95 register int i;
96
97 #ifndef SMALL
98 if (boothowto & RB_KDB) /* XXX */
99 debug = 1;
100 #endif
101 cpusid.cpusid = mfpr(SID);
102 cpu = cpusid.cpuany.cp_type;
103 switch (cpu) {
104
105 #if VAX8600
106 case VAX_8600:
107 #ifndef SMALL
108 if (debug)
109 printf("cpu: 8600\nsbia 0:\n");
110 #endif
111 cpuspeed = 6;
112 probenexi(NEXA8600, (caddr_t)UMEMA8600(0)+UBAIOADDR, 0);
113 probenexi(NEXB8600, (caddr_t)UMEMB8600(0)+UBAIOADDR, 1);
114 break;
115 #endif
116
117 #if VAX780
118 case VAX_780:
119 #ifndef SMALL
120 if (debug)
121 printf("cpu: 780\n");
122 #endif
123 cpuspeed = 2;
124 probenexi(NEX780, (caddr_t)UMEM780(0)+UBAIOADDR, 0);
125 break;
126 #endif
127
128 #if VAX8200
129 case VAX_8200: {
130 register struct bi_node *bi;
131
132 cpuspeed = 2;
133 for (i = 0, bi = BI_BASE(0); i < NNODEBI; i++, bi++) {
134 if (badaddr((caddr_t)bi, sizeof (long)))
135 continue;
136 #ifdef notdef
137 /* clear bus errors */
138 bi->biic.bi_ber = ~(BIBER_MBZ|BIBER_NMR|BIBER_UPEN);
139 #endif
140 #ifndef SMALL
141 if (debug)
142 printf("node%d: ", i);
143 #endif
144 switch (bi->biic.bi_dtype) {
145
146 case BIDT_DWBUA:
147 if (nuba >= MAXNUBA) /* sorry */
148 break;
149 #ifndef SMALL
150 if (debug)
151 printf("uba%d\n", nuba);
152 #endif
153 ubaddrspace[nuba] = (struct uba_regs *)bi;
154 uioaddrspace[nuba] = (caddr_t)UMEM8200(i) +
155 UBAIOADDR;
156 ((struct dwbua_regs *)bi)->bua_csr |=
157 BUACSR_UPI;
158 nuba++;
159 break;
160
161 case BIDT_KDB50:
162 if (nkdb < MAXNKDB) {
163 kdbaddr[nkdb++] = (caddr_t)bi;
164 #ifndef SMALL
165 if (debug)
166 printf("kdb%d\n", nkdb);
167 #endif
168 }
169 break;
170 #ifndef SMALL
171 default:
172 if (debug)
173 printf("unknown type %x\n",
174 bi->biic.bi_dtype);
175 break;
176 #endif
177 }
178 }
179 ubaddr = ubaddrspace;
180 uioaddr = uioaddrspace;
181 }
182 break;
183 #endif
184
185 #if VAX750
186 case VAX_750:
187 #ifndef SMALL
188 if (debug)
189 printf("cpu: 750 -- assuming standard config\n");
190 #endif
191 mbaddr = mbaddr750;
192 ubaddr = ubaddr750;
193 uioaddr = uioaddr750;
194 nmba = sizeof (mbaddr750) / sizeof (mbaddr750[0]);
195 nuba = 2;
196 break;
197 #endif
198
199 #if VAX730
200 case VAX_730:
201 #ifndef SMALL
202 if (debug)
203 printf("cpu: 730 -- assuming standard config\n");
204 #endif
205 ubaddr = ubaddr730;
206 uioaddr = uioaddr730;
207 nuba = 1;
208 break;
209 #endif
210
211 #if VAX630
212 case VAX_630:
213 #ifndef SMALL
214 if (debug)
215 printf("cpu: uVAX II\n");
216 #endif
217 ubaddr = ubaddr630;
218 uioaddr = uioaddr630;
219 nuba = 1;
220 break;
221 #endif
222
223 #if VAX650
224 case VAX_650:
225 #ifndef SMALL
226 if (debug)
227 printf("cpu: uVAX 3000\n");
228 #endif
229 ubaddr = ubaddr630;
230 uioaddr = uioaddr630;
231 nuba = 1;
232 break;
233 #endif
234 }
235
236 /*
237 * Forward into the past...
238 */
239 /*
240 for (i = 0; i < nmba; i++)
241 if (!badaddr(mbaddr[i], sizeof(long)))
242 mbaddr[i]->mba_cr = MBCR_INIT;
243 */
244
245 switch (cpu) {
246
247 #if VAX750 || VAX730
248 case VAX_750:
249 case VAX_730:
250 mtpr(IUR, 0);
251 break;
252 #endif
253
254 #if VAX630 || VAX650
255 case VAX_630:
256 case VAX_650:
257 mtpr(IUR, 0);
258 *((char *)QIOPAGE630 + QIPCR) = Q_LMEAE;
259 #if !defined(SMALL)
260 /*
261 * configure the console
262 */
263 for(i = 0; vcons_init[i] && !(*vcons_init[i])(); i++)
264 ;
265 #endif
266 break;
267 #endif
268 }
269
270 /* give unibus devices a chance to recover... */
271 if (nuba > 0)
272 DELAY(500000);
273 }
274
275 #if VAX8600 || VAX780
probenexi(nxp,umembase,sbia)276 probenexi(nxp, umembase, sbia)
277 register struct nexus *nxp;
278 caddr_t umembase;
279 int sbia;
280 {
281 register int i;
282 union nexcsr nexcsr;
283 int first = 1;
284
285 for (i = 0; i < 16; i++, nxp++) {
286 if (badaddr(nxp, sizeof(long)))
287 continue;
288 nexcsr = nxp->nexcsr;
289 if (nexcsr.nex_csr & NEX_APD)
290 continue;
291 #ifndef SMALL
292 if (debug) {
293 if (first && sbia != 0)
294 printf("sbia %d:\n", sbia);
295 printf("tr%d: ", i);
296 first = 0;
297 }
298 #endif
299 switch (nexcsr.nex_type) {
300 default:
301 #ifndef SMALL
302 if (debug)
303 printf("nexid %2x\n", nexcsr.nex_type);
304 #endif
305 break;
306
307 case NEX_MEM4:
308 case NEX_MEM4I:
309 case NEX_MEM16:
310 case NEX_MEM16I:
311 case NEX_MEM64L:
312 case NEX_MEM64LI:
313 case NEX_MEM64U:
314 case NEX_MEM64UI:
315 case NEX_MEM64I:
316 #ifndef SMALL
317 if (debug)
318 printf("mem\n");
319 #endif
320 break;
321
322 case NEX_CI:
323 #ifndef SMALL
324 if (debug)
325 printf("ci\n");
326 #endif
327 break;
328
329 case NEX_DR32:
330 #ifndef SMALL
331 if (debug)
332 printf("dr32\n");
333 #endif
334 break;
335
336 case NEX_MPM0:
337 case NEX_MPM1:
338 case NEX_MPM2:
339 case NEX_MPM3:
340 #ifndef SMALL
341 if (debug)
342 printf("mpm\n");
343 #endif
344 break;
345
346 case NEX_MBA:
347 if (nmba >= MAXNMBA) {
348 #ifndef SMALL
349 if (debug)
350 printf("unsupported mba\n");
351 #endif
352 break;
353 }
354 #ifndef SMALL
355 if (debug)
356 printf("mba%d\n", nmba);
357 #endif
358 mbaddrspace[nmba] = (struct mba_regs *)nxp;
359 nmba++;
360 break;
361
362 case NEX_UBA0:
363 case NEX_UBA1:
364 case NEX_UBA2:
365 case NEX_UBA3:
366 if (nuba >= MAXNUBA) {
367 #ifndef SMALL
368 if (debug)
369 printf("unsupported uba\n");
370 #endif
371 break;
372 }
373 #ifndef SMALL
374 if (debug)
375 printf("uba%d umem%d", nuba,
376 nexcsr.nex_type&3);
377 #endif
378 ubaddrspace[nuba] = (struct uba_regs *)nxp;
379 uioaddrspace[nuba] = umembase +
380 (nexcsr.nex_csr & 3) * (512*NBPG);
381 #ifndef SMALL
382 if (debug)
383 printf(" (%x)\n", uioaddrspace[nuba]);
384 #endif
385 nuba++;
386 ((struct uba_regs *)nxp)->uba_cr = UBACR_ADINIT;
387 break;
388 }
389 }
390 mbaddr = mbaddrspace;
391 ubaddr = ubaddrspace;
392 uioaddr = uioaddrspace;
393 #undef UTR
394 #undef UMA
395 #undef MTR
396 }
397 #endif /* VAX780 || VAX8600 */
398