| /dports/sysutils/u-boot-utilite/u-boot-2015.07/include/ |
| H A D | exynos_lcd.h | 25 typedef struct vidinfo { struct
33 u_char vl_freq; /* Frequency */
34 u_char vl_clkp; /* Clock polarity */
38 u_char vl_dp; /* Data polarity */
39 u_char vl_bpix; /* Bits per pixel */
44 u_char vl_hbpd; /* Wait end of line */
49 u_char vl_vbpd; /* Wait end of frame */
52 unsigned int win_id;
53 unsigned int init_delay;
54 unsigned int power_on_delay;
[all …]
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|
| /dports/sysutils/u-boot-orangepi-plus-2e/u-boot-2021.07/include/ |
| H A D | exynos_lcd.h | 24 typedef struct vidinfo { struct
32 u_char vl_freq; /* Frequency */
33 u_char vl_clkp; /* Clock polarity */
37 u_char vl_dp; /* Data polarity */
38 u_char vl_bpix; /* Bits per pixel */
51 unsigned int win_id;
52 unsigned int init_delay;
53 unsigned int power_on_delay;
54 unsigned int reset_delay;
55 unsigned int interface_mode;
[all …]
|