1 /*
2 * Virtio PCI Bindings
3 *
4 * Copyright IBM, Corp. 2007
5 * Copyright (c) 2009 CodeSourcery
6 *
7 * Authors:
8 * Anthony Liguori <aliguori@us.ibm.com>
9 * Paul Brook <paul@codesourcery.com>
10 *
11 * This work is licensed under the terms of the GNU GPL, version 2. See
12 * the COPYING file in the top-level directory.
13 *
14 * Contributions after 2012-01-13 are licensed under the terms of the
15 * GNU GPL, version 2 or (at your option) any later version.
16 */
17
18 #include "qemu/osdep.h"
19
20 #include "exec/memop.h"
21 #include "standard-headers/linux/virtio_pci.h"
22 #include "standard-headers/linux/virtio_ids.h"
23 #include "hw/boards.h"
24 #include "hw/virtio/virtio.h"
25 #include "migration/qemu-file-types.h"
26 #include "hw/pci/pci.h"
27 #include "hw/pci/pci_bus.h"
28 #include "hw/qdev-properties.h"
29 #include "qapi/error.h"
30 #include "qemu/error-report.h"
31 #include "qemu/log.h"
32 #include "qemu/module.h"
33 #include "hw/pci/msi.h"
34 #include "hw/pci/msix.h"
35 #include "hw/loader.h"
36 #include "sysemu/kvm.h"
37 #include "hw/virtio/virtio-pci.h"
38 #include "qemu/range.h"
39 #include "hw/virtio/virtio-bus.h"
40 #include "qapi/visitor.h"
41 #include "sysemu/replay.h"
42 #include "trace.h"
43
44 #define VIRTIO_PCI_REGION_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_present(dev))
45
46 #undef VIRTIO_PCI_CONFIG
47
48 /* The remaining space is defined by each driver as the per-driver
49 * configuration space */
50 #define VIRTIO_PCI_CONFIG_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_enabled(dev))
51
52 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size,
53 VirtIOPCIProxy *dev);
54 static void virtio_pci_reset(DeviceState *qdev);
55
56 /* virtio device */
57 /* DeviceState to VirtIOPCIProxy. For use off data-path. TODO: use QOM. */
to_virtio_pci_proxy(DeviceState * d)58 static inline VirtIOPCIProxy *to_virtio_pci_proxy(DeviceState *d)
59 {
60 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
61 }
62
63 /* DeviceState to VirtIOPCIProxy. Note: used on datapath,
64 * be careful and test performance if you change this.
65 */
to_virtio_pci_proxy_fast(DeviceState * d)66 static inline VirtIOPCIProxy *to_virtio_pci_proxy_fast(DeviceState *d)
67 {
68 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
69 }
70
virtio_pci_notify(DeviceState * d,uint16_t vector)71 static void virtio_pci_notify(DeviceState *d, uint16_t vector)
72 {
73 VirtIOPCIProxy *proxy = to_virtio_pci_proxy_fast(d);
74
75 if (msix_enabled(&proxy->pci_dev)) {
76 if (vector != VIRTIO_NO_VECTOR) {
77 msix_notify(&proxy->pci_dev, vector);
78 }
79 } else {
80 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
81 pci_set_irq(&proxy->pci_dev, qatomic_read(&vdev->isr) & 1);
82 }
83 }
84
virtio_pci_save_config(DeviceState * d,QEMUFile * f)85 static void virtio_pci_save_config(DeviceState *d, QEMUFile *f)
86 {
87 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
88 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
89
90 pci_device_save(&proxy->pci_dev, f);
91 msix_save(&proxy->pci_dev, f);
92 if (msix_present(&proxy->pci_dev))
93 qemu_put_be16(f, vdev->config_vector);
94 }
95
96 static const VMStateDescription vmstate_virtio_pci_modern_queue_state = {
97 .name = "virtio_pci/modern_queue_state",
98 .version_id = 1,
99 .minimum_version_id = 1,
100 .fields = (const VMStateField[]) {
101 VMSTATE_UINT16(num, VirtIOPCIQueue),
102 VMSTATE_UNUSED(1), /* enabled was stored as be16 */
103 VMSTATE_BOOL(enabled, VirtIOPCIQueue),
104 VMSTATE_UINT32_ARRAY(desc, VirtIOPCIQueue, 2),
105 VMSTATE_UINT32_ARRAY(avail, VirtIOPCIQueue, 2),
106 VMSTATE_UINT32_ARRAY(used, VirtIOPCIQueue, 2),
107 VMSTATE_END_OF_LIST()
108 }
109 };
110
virtio_pci_modern_state_needed(void * opaque)111 static bool virtio_pci_modern_state_needed(void *opaque)
112 {
113 VirtIOPCIProxy *proxy = opaque;
114
115 return virtio_pci_modern(proxy);
116 }
117
118 static const VMStateDescription vmstate_virtio_pci_modern_state_sub = {
119 .name = "virtio_pci/modern_state",
120 .version_id = 1,
121 .minimum_version_id = 1,
122 .needed = &virtio_pci_modern_state_needed,
123 .fields = (const VMStateField[]) {
124 VMSTATE_UINT32(dfselect, VirtIOPCIProxy),
125 VMSTATE_UINT32(gfselect, VirtIOPCIProxy),
126 VMSTATE_UINT32_ARRAY(guest_features, VirtIOPCIProxy, 2),
127 VMSTATE_STRUCT_ARRAY(vqs, VirtIOPCIProxy, VIRTIO_QUEUE_MAX, 0,
128 vmstate_virtio_pci_modern_queue_state,
129 VirtIOPCIQueue),
130 VMSTATE_END_OF_LIST()
131 }
132 };
133
134 static const VMStateDescription vmstate_virtio_pci = {
135 .name = "virtio_pci",
136 .version_id = 1,
137 .minimum_version_id = 1,
138 .fields = (const VMStateField[]) {
139 VMSTATE_END_OF_LIST()
140 },
141 .subsections = (const VMStateDescription * const []) {
142 &vmstate_virtio_pci_modern_state_sub,
143 NULL
144 }
145 };
146
virtio_pci_has_extra_state(DeviceState * d)147 static bool virtio_pci_has_extra_state(DeviceState *d)
148 {
149 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
150
151 return proxy->flags & VIRTIO_PCI_FLAG_MIGRATE_EXTRA;
152 }
153
virtio_pci_save_extra_state(DeviceState * d,QEMUFile * f)154 static void virtio_pci_save_extra_state(DeviceState *d, QEMUFile *f)
155 {
156 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
157
158 vmstate_save_state(f, &vmstate_virtio_pci, proxy, NULL);
159 }
160
virtio_pci_load_extra_state(DeviceState * d,QEMUFile * f)161 static int virtio_pci_load_extra_state(DeviceState *d, QEMUFile *f)
162 {
163 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
164
165 return vmstate_load_state(f, &vmstate_virtio_pci, proxy, 1);
166 }
167
virtio_pci_save_queue(DeviceState * d,int n,QEMUFile * f)168 static void virtio_pci_save_queue(DeviceState *d, int n, QEMUFile *f)
169 {
170 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
171 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
172
173 if (msix_present(&proxy->pci_dev))
174 qemu_put_be16(f, virtio_queue_vector(vdev, n));
175 }
176
virtio_pci_load_config(DeviceState * d,QEMUFile * f)177 static int virtio_pci_load_config(DeviceState *d, QEMUFile *f)
178 {
179 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
180 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
181 uint16_t vector;
182
183 int ret;
184 ret = pci_device_load(&proxy->pci_dev, f);
185 if (ret) {
186 return ret;
187 }
188 msix_unuse_all_vectors(&proxy->pci_dev);
189 msix_load(&proxy->pci_dev, f);
190 if (msix_present(&proxy->pci_dev)) {
191 qemu_get_be16s(f, &vector);
192
193 if (vector != VIRTIO_NO_VECTOR && vector >= proxy->nvectors) {
194 return -EINVAL;
195 }
196 } else {
197 vector = VIRTIO_NO_VECTOR;
198 }
199 vdev->config_vector = vector;
200 if (vector != VIRTIO_NO_VECTOR) {
201 msix_vector_use(&proxy->pci_dev, vector);
202 }
203 return 0;
204 }
205
virtio_pci_load_queue(DeviceState * d,int n,QEMUFile * f)206 static int virtio_pci_load_queue(DeviceState *d, int n, QEMUFile *f)
207 {
208 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
209 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
210
211 uint16_t vector;
212 if (msix_present(&proxy->pci_dev)) {
213 qemu_get_be16s(f, &vector);
214 if (vector != VIRTIO_NO_VECTOR && vector >= proxy->nvectors) {
215 return -EINVAL;
216 }
217 } else {
218 vector = VIRTIO_NO_VECTOR;
219 }
220 virtio_queue_set_vector(vdev, n, vector);
221 if (vector != VIRTIO_NO_VECTOR) {
222 msix_vector_use(&proxy->pci_dev, vector);
223 }
224
225 return 0;
226 }
227
228 typedef struct VirtIOPCIIDInfo {
229 /* virtio id */
230 uint16_t vdev_id;
231 /* pci device id for the transitional device */
232 uint16_t trans_devid;
233 uint16_t class_id;
234 } VirtIOPCIIDInfo;
235
236 static const VirtIOPCIIDInfo virtio_pci_id_info[] = {
237 {
238 .vdev_id = VIRTIO_ID_CRYPTO,
239 .class_id = PCI_CLASS_OTHERS,
240 }, {
241 .vdev_id = VIRTIO_ID_FS,
242 .class_id = PCI_CLASS_STORAGE_OTHER,
243 }, {
244 .vdev_id = VIRTIO_ID_NET,
245 .trans_devid = PCI_DEVICE_ID_VIRTIO_NET,
246 .class_id = PCI_CLASS_NETWORK_ETHERNET,
247 }, {
248 .vdev_id = VIRTIO_ID_BLOCK,
249 .trans_devid = PCI_DEVICE_ID_VIRTIO_BLOCK,
250 .class_id = PCI_CLASS_STORAGE_SCSI,
251 }, {
252 .vdev_id = VIRTIO_ID_CONSOLE,
253 .trans_devid = PCI_DEVICE_ID_VIRTIO_CONSOLE,
254 .class_id = PCI_CLASS_COMMUNICATION_OTHER,
255 }, {
256 .vdev_id = VIRTIO_ID_SCSI,
257 .trans_devid = PCI_DEVICE_ID_VIRTIO_SCSI,
258 .class_id = PCI_CLASS_STORAGE_SCSI
259 }, {
260 .vdev_id = VIRTIO_ID_9P,
261 .trans_devid = PCI_DEVICE_ID_VIRTIO_9P,
262 .class_id = PCI_BASE_CLASS_NETWORK,
263 }, {
264 .vdev_id = VIRTIO_ID_BALLOON,
265 .trans_devid = PCI_DEVICE_ID_VIRTIO_BALLOON,
266 .class_id = PCI_CLASS_OTHERS,
267 }, {
268 .vdev_id = VIRTIO_ID_RNG,
269 .trans_devid = PCI_DEVICE_ID_VIRTIO_RNG,
270 .class_id = PCI_CLASS_OTHERS,
271 },
272 };
273
virtio_pci_get_id_info(uint16_t vdev_id)274 static const VirtIOPCIIDInfo *virtio_pci_get_id_info(uint16_t vdev_id)
275 {
276 const VirtIOPCIIDInfo *info = NULL;
277 int i;
278
279 for (i = 0; i < ARRAY_SIZE(virtio_pci_id_info); i++) {
280 if (virtio_pci_id_info[i].vdev_id == vdev_id) {
281 info = &virtio_pci_id_info[i];
282 break;
283 }
284 }
285
286 if (!info) {
287 /* The device id is invalid or not added to the id_info yet. */
288 error_report("Invalid virtio device(id %u)", vdev_id);
289 abort();
290 }
291
292 return info;
293 }
294
295 /*
296 * Get the Transitional Device ID for the specific device, return
297 * zero if the device is non-transitional.
298 */
virtio_pci_get_trans_devid(uint16_t device_id)299 uint16_t virtio_pci_get_trans_devid(uint16_t device_id)
300 {
301 return virtio_pci_get_id_info(device_id)->trans_devid;
302 }
303
304 /*
305 * Get the Class ID for the specific device.
306 */
virtio_pci_get_class_id(uint16_t device_id)307 uint16_t virtio_pci_get_class_id(uint16_t device_id)
308 {
309 return virtio_pci_get_id_info(device_id)->class_id;
310 }
311
virtio_pci_ioeventfd_enabled(DeviceState * d)312 static bool virtio_pci_ioeventfd_enabled(DeviceState *d)
313 {
314 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
315
316 return (proxy->flags & VIRTIO_PCI_FLAG_USE_IOEVENTFD) != 0;
317 }
318
319 #define QEMU_VIRTIO_PCI_QUEUE_MEM_MULT 0x1000
320
virtio_pci_queue_mem_mult(struct VirtIOPCIProxy * proxy)321 static inline int virtio_pci_queue_mem_mult(struct VirtIOPCIProxy *proxy)
322 {
323 return (proxy->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ) ?
324 QEMU_VIRTIO_PCI_QUEUE_MEM_MULT : 4;
325 }
326
virtio_pci_ioeventfd_assign(DeviceState * d,EventNotifier * notifier,int n,bool assign)327 static int virtio_pci_ioeventfd_assign(DeviceState *d, EventNotifier *notifier,
328 int n, bool assign)
329 {
330 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
331 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
332 VirtQueue *vq = virtio_get_queue(vdev, n);
333 bool legacy = virtio_pci_legacy(proxy);
334 bool modern = virtio_pci_modern(proxy);
335 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
336 MemoryRegion *modern_mr = &proxy->notify.mr;
337 MemoryRegion *modern_notify_mr = &proxy->notify_pio.mr;
338 MemoryRegion *legacy_mr = &proxy->bar;
339 hwaddr modern_addr = virtio_pci_queue_mem_mult(proxy) *
340 virtio_get_queue_index(vq);
341 hwaddr legacy_addr = VIRTIO_PCI_QUEUE_NOTIFY;
342
343 if (assign) {
344 if (modern) {
345 memory_region_add_eventfd(modern_mr, modern_addr, 0,
346 false, n, notifier);
347 if (modern_pio) {
348 memory_region_add_eventfd(modern_notify_mr, 0, 2,
349 true, n, notifier);
350 }
351 }
352 if (legacy) {
353 memory_region_add_eventfd(legacy_mr, legacy_addr, 2,
354 true, n, notifier);
355 }
356 } else {
357 if (modern) {
358 memory_region_del_eventfd(modern_mr, modern_addr, 0,
359 false, n, notifier);
360 if (modern_pio) {
361 memory_region_del_eventfd(modern_notify_mr, 0, 2,
362 true, n, notifier);
363 }
364 }
365 if (legacy) {
366 memory_region_del_eventfd(legacy_mr, legacy_addr, 2,
367 true, n, notifier);
368 }
369 }
370 return 0;
371 }
372
virtio_pci_start_ioeventfd(VirtIOPCIProxy * proxy)373 static void virtio_pci_start_ioeventfd(VirtIOPCIProxy *proxy)
374 {
375 virtio_bus_start_ioeventfd(&proxy->bus);
376 }
377
virtio_pci_stop_ioeventfd(VirtIOPCIProxy * proxy)378 static void virtio_pci_stop_ioeventfd(VirtIOPCIProxy *proxy)
379 {
380 virtio_bus_stop_ioeventfd(&proxy->bus);
381 }
382
virtio_ioport_write(void * opaque,uint32_t addr,uint32_t val)383 static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
384 {
385 VirtIOPCIProxy *proxy = opaque;
386 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
387 uint16_t vector;
388 hwaddr pa;
389
390 switch (addr) {
391 case VIRTIO_PCI_GUEST_FEATURES:
392 /* Guest does not negotiate properly? We have to assume nothing. */
393 if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
394 val = virtio_bus_get_vdev_bad_features(&proxy->bus);
395 }
396 virtio_set_features(vdev, val);
397 break;
398 case VIRTIO_PCI_QUEUE_PFN:
399 pa = (hwaddr)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
400 if (pa == 0) {
401 virtio_pci_reset(DEVICE(proxy));
402 }
403 else
404 virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
405 break;
406 case VIRTIO_PCI_QUEUE_SEL:
407 if (val < VIRTIO_QUEUE_MAX)
408 vdev->queue_sel = val;
409 break;
410 case VIRTIO_PCI_QUEUE_NOTIFY:
411 if (val < VIRTIO_QUEUE_MAX) {
412 virtio_queue_notify(vdev, val);
413 }
414 break;
415 case VIRTIO_PCI_STATUS:
416 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
417 virtio_pci_stop_ioeventfd(proxy);
418 }
419
420 virtio_set_status(vdev, val & 0xFF);
421
422 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
423 virtio_pci_start_ioeventfd(proxy);
424 }
425
426 if (vdev->status == 0) {
427 virtio_pci_reset(DEVICE(proxy));
428 }
429
430 /* Linux before 2.6.34 drives the device without enabling
431 the PCI device bus master bit. Enable it automatically
432 for the guest. This is a PCI spec violation but so is
433 initiating DMA with bus master bit clear. */
434 if (val == (VIRTIO_CONFIG_S_ACKNOWLEDGE | VIRTIO_CONFIG_S_DRIVER)) {
435 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND,
436 proxy->pci_dev.config[PCI_COMMAND] |
437 PCI_COMMAND_MASTER, 1);
438 }
439 break;
440 case VIRTIO_MSI_CONFIG_VECTOR:
441 if (vdev->config_vector != VIRTIO_NO_VECTOR) {
442 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
443 }
444 /* Make it possible for guest to discover an error took place. */
445 if (val < proxy->nvectors) {
446 msix_vector_use(&proxy->pci_dev, val);
447 } else {
448 val = VIRTIO_NO_VECTOR;
449 }
450 vdev->config_vector = val;
451 break;
452 case VIRTIO_MSI_QUEUE_VECTOR:
453 vector = virtio_queue_vector(vdev, vdev->queue_sel);
454 if (vector != VIRTIO_NO_VECTOR) {
455 msix_vector_unuse(&proxy->pci_dev, vector);
456 }
457 /* Make it possible for guest to discover an error took place. */
458 if (val < proxy->nvectors) {
459 msix_vector_use(&proxy->pci_dev, val);
460 } else {
461 val = VIRTIO_NO_VECTOR;
462 }
463 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
464 break;
465 default:
466 qemu_log_mask(LOG_GUEST_ERROR,
467 "%s: unexpected address 0x%x value 0x%x\n",
468 __func__, addr, val);
469 break;
470 }
471 }
472
virtio_ioport_read(VirtIOPCIProxy * proxy,uint32_t addr)473 static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
474 {
475 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
476 uint32_t ret = 0xFFFFFFFF;
477
478 switch (addr) {
479 case VIRTIO_PCI_HOST_FEATURES:
480 ret = vdev->host_features;
481 break;
482 case VIRTIO_PCI_GUEST_FEATURES:
483 ret = vdev->guest_features;
484 break;
485 case VIRTIO_PCI_QUEUE_PFN:
486 ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
487 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
488 break;
489 case VIRTIO_PCI_QUEUE_NUM:
490 ret = virtio_queue_get_num(vdev, vdev->queue_sel);
491 break;
492 case VIRTIO_PCI_QUEUE_SEL:
493 ret = vdev->queue_sel;
494 break;
495 case VIRTIO_PCI_STATUS:
496 ret = vdev->status;
497 break;
498 case VIRTIO_PCI_ISR:
499 /* reading from the ISR also clears it. */
500 ret = qatomic_xchg(&vdev->isr, 0);
501 pci_irq_deassert(&proxy->pci_dev);
502 break;
503 case VIRTIO_MSI_CONFIG_VECTOR:
504 ret = vdev->config_vector;
505 break;
506 case VIRTIO_MSI_QUEUE_VECTOR:
507 ret = virtio_queue_vector(vdev, vdev->queue_sel);
508 break;
509 default:
510 break;
511 }
512
513 return ret;
514 }
515
virtio_pci_config_read(void * opaque,hwaddr addr,unsigned size)516 static uint64_t virtio_pci_config_read(void *opaque, hwaddr addr,
517 unsigned size)
518 {
519 VirtIOPCIProxy *proxy = opaque;
520 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
521 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev);
522 uint64_t val = 0;
523
524 if (vdev == NULL) {
525 return UINT64_MAX;
526 }
527
528 if (addr < config) {
529 return virtio_ioport_read(proxy, addr);
530 }
531 addr -= config;
532
533 switch (size) {
534 case 1:
535 val = virtio_config_readb(vdev, addr);
536 break;
537 case 2:
538 val = virtio_config_readw(vdev, addr);
539 if (virtio_is_big_endian(vdev)) {
540 val = bswap16(val);
541 }
542 break;
543 case 4:
544 val = virtio_config_readl(vdev, addr);
545 if (virtio_is_big_endian(vdev)) {
546 val = bswap32(val);
547 }
548 break;
549 }
550 return val;
551 }
552
virtio_pci_config_write(void * opaque,hwaddr addr,uint64_t val,unsigned size)553 static void virtio_pci_config_write(void *opaque, hwaddr addr,
554 uint64_t val, unsigned size)
555 {
556 VirtIOPCIProxy *proxy = opaque;
557 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev);
558 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
559
560 if (vdev == NULL) {
561 return;
562 }
563
564 if (addr < config) {
565 virtio_ioport_write(proxy, addr, val);
566 return;
567 }
568 addr -= config;
569 /*
570 * Virtio-PCI is odd. Ioports are LE but config space is target native
571 * endian.
572 */
573 switch (size) {
574 case 1:
575 virtio_config_writeb(vdev, addr, val);
576 break;
577 case 2:
578 if (virtio_is_big_endian(vdev)) {
579 val = bswap16(val);
580 }
581 virtio_config_writew(vdev, addr, val);
582 break;
583 case 4:
584 if (virtio_is_big_endian(vdev)) {
585 val = bswap32(val);
586 }
587 virtio_config_writel(vdev, addr, val);
588 break;
589 }
590 }
591
592 static const MemoryRegionOps virtio_pci_config_ops = {
593 .read = virtio_pci_config_read,
594 .write = virtio_pci_config_write,
595 .impl = {
596 .min_access_size = 1,
597 .max_access_size = 4,
598 },
599 .endianness = DEVICE_LITTLE_ENDIAN,
600 };
601
virtio_address_space_lookup(VirtIOPCIProxy * proxy,hwaddr * off,int len)602 static MemoryRegion *virtio_address_space_lookup(VirtIOPCIProxy *proxy,
603 hwaddr *off, int len)
604 {
605 int i;
606 VirtIOPCIRegion *reg;
607
608 for (i = 0; i < ARRAY_SIZE(proxy->regs); ++i) {
609 reg = &proxy->regs[i];
610 if (*off >= reg->offset &&
611 *off + len <= reg->offset + reg->size) {
612 *off -= reg->offset;
613 return ®->mr;
614 }
615 }
616
617 return NULL;
618 }
619
620 /* Below are generic functions to do memcpy from/to an address space,
621 * without byteswaps, with input validation.
622 *
623 * As regular address_space_* APIs all do some kind of byteswap at least for
624 * some host/target combinations, we are forced to explicitly convert to a
625 * known-endianness integer value.
626 * It doesn't really matter which endian format to go through, so the code
627 * below selects the endian that causes the least amount of work on the given
628 * host.
629 *
630 * Note: host pointer must be aligned.
631 */
632 static
virtio_address_space_write(VirtIOPCIProxy * proxy,hwaddr addr,const uint8_t * buf,int len)633 void virtio_address_space_write(VirtIOPCIProxy *proxy, hwaddr addr,
634 const uint8_t *buf, int len)
635 {
636 uint64_t val;
637 MemoryRegion *mr;
638
639 /* address_space_* APIs assume an aligned address.
640 * As address is under guest control, handle illegal values.
641 */
642 addr &= ~(len - 1);
643
644 mr = virtio_address_space_lookup(proxy, &addr, len);
645 if (!mr) {
646 return;
647 }
648
649 /* Make sure caller aligned buf properly */
650 assert(!(((uintptr_t)buf) & (len - 1)));
651
652 switch (len) {
653 case 1:
654 val = pci_get_byte(buf);
655 break;
656 case 2:
657 val = pci_get_word(buf);
658 break;
659 case 4:
660 val = pci_get_long(buf);
661 break;
662 default:
663 /* As length is under guest control, handle illegal values. */
664 return;
665 }
666 memory_region_dispatch_write(mr, addr, val, size_memop(len) | MO_LE,
667 MEMTXATTRS_UNSPECIFIED);
668 }
669
670 static void
virtio_address_space_read(VirtIOPCIProxy * proxy,hwaddr addr,uint8_t * buf,int len)671 virtio_address_space_read(VirtIOPCIProxy *proxy, hwaddr addr,
672 uint8_t *buf, int len)
673 {
674 uint64_t val;
675 MemoryRegion *mr;
676
677 /* address_space_* APIs assume an aligned address.
678 * As address is under guest control, handle illegal values.
679 */
680 addr &= ~(len - 1);
681
682 mr = virtio_address_space_lookup(proxy, &addr, len);
683 if (!mr) {
684 return;
685 }
686
687 /* Make sure caller aligned buf properly */
688 assert(!(((uintptr_t)buf) & (len - 1)));
689
690 memory_region_dispatch_read(mr, addr, &val, size_memop(len) | MO_LE,
691 MEMTXATTRS_UNSPECIFIED);
692 switch (len) {
693 case 1:
694 pci_set_byte(buf, val);
695 break;
696 case 2:
697 pci_set_word(buf, val);
698 break;
699 case 4:
700 pci_set_long(buf, val);
701 break;
702 default:
703 /* As length is under guest control, handle illegal values. */
704 break;
705 }
706 }
707
virtio_pci_ats_ctrl_trigger(PCIDevice * pci_dev,bool enable)708 static void virtio_pci_ats_ctrl_trigger(PCIDevice *pci_dev, bool enable)
709 {
710 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
711 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
712 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
713
714 vdev->device_iotlb_enabled = enable;
715
716 if (k->toggle_device_iotlb) {
717 k->toggle_device_iotlb(vdev);
718 }
719 }
720
pcie_ats_config_write(PCIDevice * dev,uint32_t address,uint32_t val,int len)721 static void pcie_ats_config_write(PCIDevice *dev, uint32_t address,
722 uint32_t val, int len)
723 {
724 uint32_t off;
725 uint16_t ats_cap = dev->exp.ats_cap;
726
727 if (!ats_cap || address < ats_cap) {
728 return;
729 }
730 off = address - ats_cap;
731 if (off >= PCI_EXT_CAP_ATS_SIZEOF) {
732 return;
733 }
734
735 if (range_covers_byte(off, len, PCI_ATS_CTRL + 1)) {
736 virtio_pci_ats_ctrl_trigger(dev, !!(val & PCI_ATS_CTRL_ENABLE));
737 }
738 }
739
virtio_write_config(PCIDevice * pci_dev,uint32_t address,uint32_t val,int len)740 static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
741 uint32_t val, int len)
742 {
743 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
744 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
745 struct virtio_pci_cfg_cap *cfg;
746
747 pci_default_write_config(pci_dev, address, val, len);
748
749 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) {
750 pcie_cap_flr_write_config(pci_dev, address, val, len);
751 }
752
753 if (proxy->flags & VIRTIO_PCI_FLAG_ATS) {
754 pcie_ats_config_write(pci_dev, address, val, len);
755 }
756
757 if (range_covers_byte(address, len, PCI_COMMAND)) {
758 if (!(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
759 virtio_set_disabled(vdev, true);
760 virtio_pci_stop_ioeventfd(proxy);
761 virtio_set_status(vdev, vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK);
762 } else {
763 virtio_set_disabled(vdev, false);
764 }
765 }
766
767 if (proxy->config_cap &&
768 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap,
769 pci_cfg_data),
770 sizeof cfg->pci_cfg_data)) {
771 uint32_t off;
772 uint32_t caplen;
773
774 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap);
775 off = le32_to_cpu(cfg->cap.offset);
776 caplen = le32_to_cpu(cfg->cap.length);
777
778 if (caplen == 1 || caplen == 2 || caplen == 4) {
779 assert(caplen <= sizeof cfg->pci_cfg_data);
780 virtio_address_space_write(proxy, off, cfg->pci_cfg_data, caplen);
781 }
782 }
783 }
784
virtio_read_config(PCIDevice * pci_dev,uint32_t address,int len)785 static uint32_t virtio_read_config(PCIDevice *pci_dev,
786 uint32_t address, int len)
787 {
788 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
789 struct virtio_pci_cfg_cap *cfg;
790
791 if (proxy->config_cap &&
792 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap,
793 pci_cfg_data),
794 sizeof cfg->pci_cfg_data)) {
795 uint32_t off;
796 uint32_t caplen;
797
798 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap);
799 off = le32_to_cpu(cfg->cap.offset);
800 caplen = le32_to_cpu(cfg->cap.length);
801
802 if (caplen == 1 || caplen == 2 || caplen == 4) {
803 assert(caplen <= sizeof cfg->pci_cfg_data);
804 virtio_address_space_read(proxy, off, cfg->pci_cfg_data, caplen);
805 }
806 }
807
808 return pci_default_read_config(pci_dev, address, len);
809 }
810
kvm_virtio_pci_vq_vector_use(VirtIOPCIProxy * proxy,unsigned int vector)811 static int kvm_virtio_pci_vq_vector_use(VirtIOPCIProxy *proxy,
812 unsigned int vector)
813 {
814 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
815 int ret;
816
817 if (irqfd->users == 0) {
818 KVMRouteChange c = kvm_irqchip_begin_route_changes(kvm_state);
819 ret = kvm_irqchip_add_msi_route(&c, vector, &proxy->pci_dev);
820 if (ret < 0) {
821 return ret;
822 }
823 kvm_irqchip_commit_route_changes(&c);
824 irqfd->virq = ret;
825 }
826 irqfd->users++;
827 return 0;
828 }
829
kvm_virtio_pci_vq_vector_release(VirtIOPCIProxy * proxy,unsigned int vector)830 static void kvm_virtio_pci_vq_vector_release(VirtIOPCIProxy *proxy,
831 unsigned int vector)
832 {
833 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
834 if (--irqfd->users == 0) {
835 kvm_irqchip_release_virq(kvm_state, irqfd->virq);
836 }
837 }
838
kvm_virtio_pci_irqfd_use(VirtIOPCIProxy * proxy,EventNotifier * n,unsigned int vector)839 static int kvm_virtio_pci_irqfd_use(VirtIOPCIProxy *proxy,
840 EventNotifier *n,
841 unsigned int vector)
842 {
843 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
844 return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, irqfd->virq);
845 }
846
kvm_virtio_pci_irqfd_release(VirtIOPCIProxy * proxy,EventNotifier * n,unsigned int vector)847 static void kvm_virtio_pci_irqfd_release(VirtIOPCIProxy *proxy,
848 EventNotifier *n ,
849 unsigned int vector)
850 {
851 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
852 int ret;
853
854 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, irqfd->virq);
855 assert(ret == 0);
856 }
virtio_pci_get_notifier(VirtIOPCIProxy * proxy,int queue_no,EventNotifier ** n,unsigned int * vector)857 static int virtio_pci_get_notifier(VirtIOPCIProxy *proxy, int queue_no,
858 EventNotifier **n, unsigned int *vector)
859 {
860 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
861 VirtQueue *vq;
862
863 if (queue_no == VIRTIO_CONFIG_IRQ_IDX) {
864 *n = virtio_config_get_guest_notifier(vdev);
865 *vector = vdev->config_vector;
866 } else {
867 if (!virtio_queue_get_num(vdev, queue_no)) {
868 return -1;
869 }
870 *vector = virtio_queue_vector(vdev, queue_no);
871 vq = virtio_get_queue(vdev, queue_no);
872 *n = virtio_queue_get_guest_notifier(vq);
873 }
874 return 0;
875 }
876
kvm_virtio_pci_vector_use_one(VirtIOPCIProxy * proxy,int queue_no)877 static int kvm_virtio_pci_vector_use_one(VirtIOPCIProxy *proxy, int queue_no)
878 {
879 unsigned int vector;
880 int ret;
881 EventNotifier *n;
882 PCIDevice *dev = &proxy->pci_dev;
883 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
884 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
885
886 ret = virtio_pci_get_notifier(proxy, queue_no, &n, &vector);
887 if (ret < 0) {
888 return ret;
889 }
890 if (vector >= msix_nr_vectors_allocated(dev)) {
891 return 0;
892 }
893 ret = kvm_virtio_pci_vq_vector_use(proxy, vector);
894 if (ret < 0) {
895 goto undo;
896 }
897 /*
898 * If guest supports masking, set up irqfd now.
899 * Otherwise, delay until unmasked in the frontend.
900 */
901 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
902 ret = kvm_virtio_pci_irqfd_use(proxy, n, vector);
903 if (ret < 0) {
904 kvm_virtio_pci_vq_vector_release(proxy, vector);
905 goto undo;
906 }
907 }
908
909 return 0;
910 undo:
911
912 vector = virtio_queue_vector(vdev, queue_no);
913 if (vector >= msix_nr_vectors_allocated(dev)) {
914 return ret;
915 }
916 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
917 ret = virtio_pci_get_notifier(proxy, queue_no, &n, &vector);
918 if (ret < 0) {
919 return ret;
920 }
921 kvm_virtio_pci_irqfd_release(proxy, n, vector);
922 }
923 return ret;
924 }
kvm_virtio_pci_vector_vq_use(VirtIOPCIProxy * proxy,int nvqs)925 static int kvm_virtio_pci_vector_vq_use(VirtIOPCIProxy *proxy, int nvqs)
926 {
927 int queue_no;
928 int ret = 0;
929 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
930
931 for (queue_no = 0; queue_no < nvqs; queue_no++) {
932 if (!virtio_queue_get_num(vdev, queue_no)) {
933 return -1;
934 }
935 ret = kvm_virtio_pci_vector_use_one(proxy, queue_no);
936 }
937 return ret;
938 }
939
kvm_virtio_pci_vector_config_use(VirtIOPCIProxy * proxy)940 static int kvm_virtio_pci_vector_config_use(VirtIOPCIProxy *proxy)
941 {
942 return kvm_virtio_pci_vector_use_one(proxy, VIRTIO_CONFIG_IRQ_IDX);
943 }
944
kvm_virtio_pci_vector_release_one(VirtIOPCIProxy * proxy,int queue_no)945 static void kvm_virtio_pci_vector_release_one(VirtIOPCIProxy *proxy,
946 int queue_no)
947 {
948 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
949 unsigned int vector;
950 EventNotifier *n;
951 int ret;
952 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
953 PCIDevice *dev = &proxy->pci_dev;
954
955 ret = virtio_pci_get_notifier(proxy, queue_no, &n, &vector);
956 if (ret < 0) {
957 return;
958 }
959 if (vector >= msix_nr_vectors_allocated(dev)) {
960 return;
961 }
962 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
963 kvm_virtio_pci_irqfd_release(proxy, n, vector);
964 }
965 kvm_virtio_pci_vq_vector_release(proxy, vector);
966 }
967
kvm_virtio_pci_vector_vq_release(VirtIOPCIProxy * proxy,int nvqs)968 static void kvm_virtio_pci_vector_vq_release(VirtIOPCIProxy *proxy, int nvqs)
969 {
970 int queue_no;
971 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
972
973 for (queue_no = 0; queue_no < nvqs; queue_no++) {
974 if (!virtio_queue_get_num(vdev, queue_no)) {
975 break;
976 }
977 kvm_virtio_pci_vector_release_one(proxy, queue_no);
978 }
979 }
980
kvm_virtio_pci_vector_config_release(VirtIOPCIProxy * proxy)981 static void kvm_virtio_pci_vector_config_release(VirtIOPCIProxy *proxy)
982 {
983 kvm_virtio_pci_vector_release_one(proxy, VIRTIO_CONFIG_IRQ_IDX);
984 }
985
virtio_pci_one_vector_unmask(VirtIOPCIProxy * proxy,unsigned int queue_no,unsigned int vector,MSIMessage msg,EventNotifier * n)986 static int virtio_pci_one_vector_unmask(VirtIOPCIProxy *proxy,
987 unsigned int queue_no,
988 unsigned int vector,
989 MSIMessage msg,
990 EventNotifier *n)
991 {
992 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
993 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
994 VirtIOIRQFD *irqfd;
995 int ret = 0;
996
997 if (proxy->vector_irqfd) {
998 irqfd = &proxy->vector_irqfd[vector];
999 if (irqfd->msg.data != msg.data || irqfd->msg.address != msg.address) {
1000 ret = kvm_irqchip_update_msi_route(kvm_state, irqfd->virq, msg,
1001 &proxy->pci_dev);
1002 if (ret < 0) {
1003 return ret;
1004 }
1005 kvm_irqchip_commit_routes(kvm_state);
1006 }
1007 }
1008
1009 /* If guest supports masking, irqfd is already setup, unmask it.
1010 * Otherwise, set it up now.
1011 */
1012 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
1013 k->guest_notifier_mask(vdev, queue_no, false);
1014 /* Test after unmasking to avoid losing events. */
1015 if (k->guest_notifier_pending &&
1016 k->guest_notifier_pending(vdev, queue_no)) {
1017 event_notifier_set(n);
1018 }
1019 } else {
1020 ret = kvm_virtio_pci_irqfd_use(proxy, n, vector);
1021 }
1022 return ret;
1023 }
1024
virtio_pci_one_vector_mask(VirtIOPCIProxy * proxy,unsigned int queue_no,unsigned int vector,EventNotifier * n)1025 static void virtio_pci_one_vector_mask(VirtIOPCIProxy *proxy,
1026 unsigned int queue_no,
1027 unsigned int vector,
1028 EventNotifier *n)
1029 {
1030 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1031 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
1032
1033 /* If guest supports masking, keep irqfd but mask it.
1034 * Otherwise, clean it up now.
1035 */
1036 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
1037 k->guest_notifier_mask(vdev, queue_no, true);
1038 } else {
1039 kvm_virtio_pci_irqfd_release(proxy, n, vector);
1040 }
1041 }
1042
virtio_pci_vector_unmask(PCIDevice * dev,unsigned vector,MSIMessage msg)1043 static int virtio_pci_vector_unmask(PCIDevice *dev, unsigned vector,
1044 MSIMessage msg)
1045 {
1046 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
1047 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1048 VirtQueue *vq = virtio_vector_first_queue(vdev, vector);
1049 EventNotifier *n;
1050 int ret, index, unmasked = 0;
1051
1052 while (vq) {
1053 index = virtio_get_queue_index(vq);
1054 if (!virtio_queue_get_num(vdev, index)) {
1055 break;
1056 }
1057 if (index < proxy->nvqs_with_notifiers) {
1058 n = virtio_queue_get_guest_notifier(vq);
1059 ret = virtio_pci_one_vector_unmask(proxy, index, vector, msg, n);
1060 if (ret < 0) {
1061 goto undo;
1062 }
1063 ++unmasked;
1064 }
1065 vq = virtio_vector_next_queue(vq);
1066 }
1067 /* unmask config intr */
1068 if (vector == vdev->config_vector) {
1069 n = virtio_config_get_guest_notifier(vdev);
1070 ret = virtio_pci_one_vector_unmask(proxy, VIRTIO_CONFIG_IRQ_IDX, vector,
1071 msg, n);
1072 if (ret < 0) {
1073 goto undo_config;
1074 }
1075 }
1076 return 0;
1077 undo_config:
1078 n = virtio_config_get_guest_notifier(vdev);
1079 virtio_pci_one_vector_mask(proxy, VIRTIO_CONFIG_IRQ_IDX, vector, n);
1080 undo:
1081 vq = virtio_vector_first_queue(vdev, vector);
1082 while (vq && unmasked >= 0) {
1083 index = virtio_get_queue_index(vq);
1084 if (index < proxy->nvqs_with_notifiers) {
1085 n = virtio_queue_get_guest_notifier(vq);
1086 virtio_pci_one_vector_mask(proxy, index, vector, n);
1087 --unmasked;
1088 }
1089 vq = virtio_vector_next_queue(vq);
1090 }
1091 return ret;
1092 }
1093
virtio_pci_vector_mask(PCIDevice * dev,unsigned vector)1094 static void virtio_pci_vector_mask(PCIDevice *dev, unsigned vector)
1095 {
1096 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
1097 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1098 VirtQueue *vq = virtio_vector_first_queue(vdev, vector);
1099 EventNotifier *n;
1100 int index;
1101
1102 while (vq) {
1103 index = virtio_get_queue_index(vq);
1104 n = virtio_queue_get_guest_notifier(vq);
1105 if (!virtio_queue_get_num(vdev, index)) {
1106 break;
1107 }
1108 if (index < proxy->nvqs_with_notifiers) {
1109 virtio_pci_one_vector_mask(proxy, index, vector, n);
1110 }
1111 vq = virtio_vector_next_queue(vq);
1112 }
1113
1114 if (vector == vdev->config_vector) {
1115 n = virtio_config_get_guest_notifier(vdev);
1116 virtio_pci_one_vector_mask(proxy, VIRTIO_CONFIG_IRQ_IDX, vector, n);
1117 }
1118 }
1119
virtio_pci_vector_poll(PCIDevice * dev,unsigned int vector_start,unsigned int vector_end)1120 static void virtio_pci_vector_poll(PCIDevice *dev,
1121 unsigned int vector_start,
1122 unsigned int vector_end)
1123 {
1124 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
1125 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1126 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
1127 int queue_no;
1128 unsigned int vector;
1129 EventNotifier *notifier;
1130 int ret;
1131
1132 for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) {
1133 ret = virtio_pci_get_notifier(proxy, queue_no, ¬ifier, &vector);
1134 if (ret < 0) {
1135 break;
1136 }
1137 if (vector < vector_start || vector >= vector_end ||
1138 !msix_is_masked(dev, vector)) {
1139 continue;
1140 }
1141 if (k->guest_notifier_pending) {
1142 if (k->guest_notifier_pending(vdev, queue_no)) {
1143 msix_set_pending(dev, vector);
1144 }
1145 } else if (event_notifier_test_and_clear(notifier)) {
1146 msix_set_pending(dev, vector);
1147 }
1148 }
1149 /* poll the config intr */
1150 ret = virtio_pci_get_notifier(proxy, VIRTIO_CONFIG_IRQ_IDX, ¬ifier,
1151 &vector);
1152 if (ret < 0) {
1153 return;
1154 }
1155 if (vector < vector_start || vector >= vector_end ||
1156 !msix_is_masked(dev, vector)) {
1157 return;
1158 }
1159 if (k->guest_notifier_pending) {
1160 if (k->guest_notifier_pending(vdev, VIRTIO_CONFIG_IRQ_IDX)) {
1161 msix_set_pending(dev, vector);
1162 }
1163 } else if (event_notifier_test_and_clear(notifier)) {
1164 msix_set_pending(dev, vector);
1165 }
1166 }
1167
virtio_pci_set_guest_notifier_fd_handler(VirtIODevice * vdev,VirtQueue * vq,int n,bool assign,bool with_irqfd)1168 void virtio_pci_set_guest_notifier_fd_handler(VirtIODevice *vdev, VirtQueue *vq,
1169 int n, bool assign,
1170 bool with_irqfd)
1171 {
1172 if (n == VIRTIO_CONFIG_IRQ_IDX) {
1173 virtio_config_set_guest_notifier_fd_handler(vdev, assign, with_irqfd);
1174 } else {
1175 virtio_queue_set_guest_notifier_fd_handler(vq, assign, with_irqfd);
1176 }
1177 }
1178
virtio_pci_set_guest_notifier(DeviceState * d,int n,bool assign,bool with_irqfd)1179 static int virtio_pci_set_guest_notifier(DeviceState *d, int n, bool assign,
1180 bool with_irqfd)
1181 {
1182 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1183 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1184 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev);
1185 VirtQueue *vq = NULL;
1186 EventNotifier *notifier = NULL;
1187
1188 if (n == VIRTIO_CONFIG_IRQ_IDX) {
1189 notifier = virtio_config_get_guest_notifier(vdev);
1190 } else {
1191 vq = virtio_get_queue(vdev, n);
1192 notifier = virtio_queue_get_guest_notifier(vq);
1193 }
1194
1195 if (assign) {
1196 int r = event_notifier_init(notifier, 0);
1197 if (r < 0) {
1198 return r;
1199 }
1200 virtio_pci_set_guest_notifier_fd_handler(vdev, vq, n, true, with_irqfd);
1201 } else {
1202 virtio_pci_set_guest_notifier_fd_handler(vdev, vq, n, false,
1203 with_irqfd);
1204 event_notifier_cleanup(notifier);
1205 }
1206
1207 if (!msix_enabled(&proxy->pci_dev) &&
1208 vdev->use_guest_notifier_mask &&
1209 vdc->guest_notifier_mask) {
1210 vdc->guest_notifier_mask(vdev, n, !assign);
1211 }
1212
1213 return 0;
1214 }
1215
virtio_pci_query_guest_notifiers(DeviceState * d)1216 static bool virtio_pci_query_guest_notifiers(DeviceState *d)
1217 {
1218 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1219 return msix_enabled(&proxy->pci_dev);
1220 }
1221
virtio_pci_set_guest_notifiers(DeviceState * d,int nvqs,bool assign)1222 static int virtio_pci_set_guest_notifiers(DeviceState *d, int nvqs, bool assign)
1223 {
1224 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1225 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1226 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
1227 int r, n;
1228 bool with_irqfd = msix_enabled(&proxy->pci_dev) &&
1229 kvm_msi_via_irqfd_enabled();
1230
1231 nvqs = MIN(nvqs, VIRTIO_QUEUE_MAX);
1232
1233 /*
1234 * When deassigning, pass a consistent nvqs value to avoid leaking
1235 * notifiers. But first check we've actually been configured, exit
1236 * early if we haven't.
1237 */
1238 if (!assign && !proxy->nvqs_with_notifiers) {
1239 return 0;
1240 }
1241 assert(assign || nvqs == proxy->nvqs_with_notifiers);
1242
1243 proxy->nvqs_with_notifiers = nvqs;
1244
1245 /* Must unset vector notifier while guest notifier is still assigned */
1246 if ((proxy->vector_irqfd ||
1247 (vdev->use_guest_notifier_mask && k->guest_notifier_mask)) &&
1248 !assign) {
1249 msix_unset_vector_notifiers(&proxy->pci_dev);
1250 if (proxy->vector_irqfd) {
1251 kvm_virtio_pci_vector_vq_release(proxy, nvqs);
1252 kvm_virtio_pci_vector_config_release(proxy);
1253 g_free(proxy->vector_irqfd);
1254 proxy->vector_irqfd = NULL;
1255 }
1256 }
1257
1258 for (n = 0; n < nvqs; n++) {
1259 if (!virtio_queue_get_num(vdev, n)) {
1260 break;
1261 }
1262
1263 r = virtio_pci_set_guest_notifier(d, n, assign, with_irqfd);
1264 if (r < 0) {
1265 goto assign_error;
1266 }
1267 }
1268 r = virtio_pci_set_guest_notifier(d, VIRTIO_CONFIG_IRQ_IDX, assign,
1269 with_irqfd);
1270 if (r < 0) {
1271 goto config_assign_error;
1272 }
1273 /* Must set vector notifier after guest notifier has been assigned */
1274 if ((with_irqfd ||
1275 (vdev->use_guest_notifier_mask && k->guest_notifier_mask)) &&
1276 assign) {
1277 if (with_irqfd) {
1278 proxy->vector_irqfd =
1279 g_malloc0(sizeof(*proxy->vector_irqfd) *
1280 msix_nr_vectors_allocated(&proxy->pci_dev));
1281 r = kvm_virtio_pci_vector_vq_use(proxy, nvqs);
1282 if (r < 0) {
1283 goto config_assign_error;
1284 }
1285 r = kvm_virtio_pci_vector_config_use(proxy);
1286 if (r < 0) {
1287 goto config_error;
1288 }
1289 }
1290
1291 r = msix_set_vector_notifiers(&proxy->pci_dev, virtio_pci_vector_unmask,
1292 virtio_pci_vector_mask,
1293 virtio_pci_vector_poll);
1294 if (r < 0) {
1295 goto notifiers_error;
1296 }
1297 }
1298
1299 return 0;
1300
1301 notifiers_error:
1302 if (with_irqfd) {
1303 assert(assign);
1304 kvm_virtio_pci_vector_vq_release(proxy, nvqs);
1305 }
1306 config_error:
1307 if (with_irqfd) {
1308 kvm_virtio_pci_vector_config_release(proxy);
1309 }
1310 config_assign_error:
1311 virtio_pci_set_guest_notifier(d, VIRTIO_CONFIG_IRQ_IDX, !assign,
1312 with_irqfd);
1313 assign_error:
1314 /* We get here on assignment failure. Recover by undoing for VQs 0 .. n. */
1315 assert(assign);
1316 while (--n >= 0) {
1317 virtio_pci_set_guest_notifier(d, n, !assign, with_irqfd);
1318 }
1319 g_free(proxy->vector_irqfd);
1320 proxy->vector_irqfd = NULL;
1321 return r;
1322 }
1323
virtio_pci_set_host_notifier_mr(DeviceState * d,int n,MemoryRegion * mr,bool assign)1324 static int virtio_pci_set_host_notifier_mr(DeviceState *d, int n,
1325 MemoryRegion *mr, bool assign)
1326 {
1327 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1328 int offset;
1329
1330 if (n >= VIRTIO_QUEUE_MAX || !virtio_pci_modern(proxy) ||
1331 virtio_pci_queue_mem_mult(proxy) != memory_region_size(mr)) {
1332 return -1;
1333 }
1334
1335 if (assign) {
1336 offset = virtio_pci_queue_mem_mult(proxy) * n;
1337 memory_region_add_subregion_overlap(&proxy->notify.mr, offset, mr, 1);
1338 } else {
1339 memory_region_del_subregion(&proxy->notify.mr, mr);
1340 }
1341
1342 return 0;
1343 }
1344
virtio_pci_vmstate_change(DeviceState * d,bool running)1345 static void virtio_pci_vmstate_change(DeviceState *d, bool running)
1346 {
1347 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1348 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1349
1350 if (running) {
1351 /* Old QEMU versions did not set bus master enable on status write.
1352 * Detect DRIVER set and enable it.
1353 */
1354 if ((proxy->flags & VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION) &&
1355 (vdev->status & VIRTIO_CONFIG_S_DRIVER) &&
1356 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
1357 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND,
1358 proxy->pci_dev.config[PCI_COMMAND] |
1359 PCI_COMMAND_MASTER, 1);
1360 }
1361 virtio_pci_start_ioeventfd(proxy);
1362 } else {
1363 virtio_pci_stop_ioeventfd(proxy);
1364 }
1365 }
1366
1367 /*
1368 * virtio-pci: This is the PCIDevice which has a virtio-pci-bus.
1369 */
1370
virtio_pci_query_nvectors(DeviceState * d)1371 static int virtio_pci_query_nvectors(DeviceState *d)
1372 {
1373 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1374
1375 return proxy->nvectors;
1376 }
1377
virtio_pci_get_dma_as(DeviceState * d)1378 static AddressSpace *virtio_pci_get_dma_as(DeviceState *d)
1379 {
1380 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1381 PCIDevice *dev = &proxy->pci_dev;
1382
1383 return pci_get_address_space(dev);
1384 }
1385
virtio_pci_iommu_enabled(DeviceState * d)1386 static bool virtio_pci_iommu_enabled(DeviceState *d)
1387 {
1388 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1389 PCIDevice *dev = &proxy->pci_dev;
1390 AddressSpace *dma_as = pci_device_iommu_address_space(dev);
1391
1392 if (dma_as == &address_space_memory) {
1393 return false;
1394 }
1395
1396 return true;
1397 }
1398
virtio_pci_queue_enabled(DeviceState * d,int n)1399 static bool virtio_pci_queue_enabled(DeviceState *d, int n)
1400 {
1401 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1402 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1403
1404 if (virtio_vdev_has_feature(vdev, VIRTIO_F_VERSION_1)) {
1405 return proxy->vqs[n].enabled;
1406 }
1407
1408 return virtio_queue_enabled_legacy(vdev, n);
1409 }
1410
virtio_pci_add_mem_cap(VirtIOPCIProxy * proxy,struct virtio_pci_cap * cap)1411 static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy,
1412 struct virtio_pci_cap *cap)
1413 {
1414 PCIDevice *dev = &proxy->pci_dev;
1415 int offset;
1416
1417 offset = pci_add_capability(dev, PCI_CAP_ID_VNDR, 0,
1418 cap->cap_len, &error_abort);
1419
1420 assert(cap->cap_len >= sizeof *cap);
1421 memcpy(dev->config + offset + PCI_CAP_FLAGS, &cap->cap_len,
1422 cap->cap_len - PCI_CAP_FLAGS);
1423
1424 return offset;
1425 }
1426
virtio_pci_set_vector(VirtIODevice * vdev,VirtIOPCIProxy * proxy,int queue_no,uint16_t old_vector,uint16_t new_vector)1427 static void virtio_pci_set_vector(VirtIODevice *vdev,
1428 VirtIOPCIProxy *proxy,
1429 int queue_no, uint16_t old_vector,
1430 uint16_t new_vector)
1431 {
1432 bool kvm_irqfd = (vdev->status & VIRTIO_CONFIG_S_DRIVER_OK) &&
1433 msix_enabled(&proxy->pci_dev) && kvm_msi_via_irqfd_enabled();
1434
1435 if (new_vector == old_vector) {
1436 return;
1437 }
1438
1439 /*
1440 * If the device uses irqfd and the vector changes after DRIVER_OK is
1441 * set, we need to release the old vector and set up the new one.
1442 * Otherwise just need to set the new vector on the device.
1443 */
1444 if (kvm_irqfd && old_vector != VIRTIO_NO_VECTOR) {
1445 kvm_virtio_pci_vector_release_one(proxy, queue_no);
1446 }
1447 /* Set the new vector on the device. */
1448 if (queue_no == VIRTIO_CONFIG_IRQ_IDX) {
1449 vdev->config_vector = new_vector;
1450 } else {
1451 virtio_queue_set_vector(vdev, queue_no, new_vector);
1452 }
1453 /* If the new vector changed need to set it up. */
1454 if (kvm_irqfd && new_vector != VIRTIO_NO_VECTOR) {
1455 kvm_virtio_pci_vector_use_one(proxy, queue_no);
1456 }
1457 }
1458
virtio_pci_add_shm_cap(VirtIOPCIProxy * proxy,uint8_t bar,uint64_t offset,uint64_t length,uint8_t id)1459 int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy,
1460 uint8_t bar, uint64_t offset, uint64_t length,
1461 uint8_t id)
1462 {
1463 struct virtio_pci_cap64 cap = {
1464 .cap.cap_len = sizeof cap,
1465 .cap.cfg_type = VIRTIO_PCI_CAP_SHARED_MEMORY_CFG,
1466 };
1467
1468 cap.cap.bar = bar;
1469 cap.cap.length = cpu_to_le32(length);
1470 cap.length_hi = cpu_to_le32(length >> 32);
1471 cap.cap.offset = cpu_to_le32(offset);
1472 cap.offset_hi = cpu_to_le32(offset >> 32);
1473 cap.cap.id = id;
1474 return virtio_pci_add_mem_cap(proxy, &cap.cap);
1475 }
1476
virtio_pci_common_read(void * opaque,hwaddr addr,unsigned size)1477 static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr,
1478 unsigned size)
1479 {
1480 VirtIOPCIProxy *proxy = opaque;
1481 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1482 uint32_t val = 0;
1483 int i;
1484
1485 if (vdev == NULL) {
1486 return UINT64_MAX;
1487 }
1488
1489 switch (addr) {
1490 case VIRTIO_PCI_COMMON_DFSELECT:
1491 val = proxy->dfselect;
1492 break;
1493 case VIRTIO_PCI_COMMON_DF:
1494 if (proxy->dfselect <= 1) {
1495 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev);
1496
1497 val = (vdev->host_features & ~vdc->legacy_features) >>
1498 (32 * proxy->dfselect);
1499 }
1500 break;
1501 case VIRTIO_PCI_COMMON_GFSELECT:
1502 val = proxy->gfselect;
1503 break;
1504 case VIRTIO_PCI_COMMON_GF:
1505 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) {
1506 val = proxy->guest_features[proxy->gfselect];
1507 }
1508 break;
1509 case VIRTIO_PCI_COMMON_MSIX:
1510 val = vdev->config_vector;
1511 break;
1512 case VIRTIO_PCI_COMMON_NUMQ:
1513 for (i = 0; i < VIRTIO_QUEUE_MAX; ++i) {
1514 if (virtio_queue_get_num(vdev, i)) {
1515 val = i + 1;
1516 }
1517 }
1518 break;
1519 case VIRTIO_PCI_COMMON_STATUS:
1520 val = vdev->status;
1521 break;
1522 case VIRTIO_PCI_COMMON_CFGGENERATION:
1523 val = vdev->generation;
1524 break;
1525 case VIRTIO_PCI_COMMON_Q_SELECT:
1526 val = vdev->queue_sel;
1527 break;
1528 case VIRTIO_PCI_COMMON_Q_SIZE:
1529 val = virtio_queue_get_num(vdev, vdev->queue_sel);
1530 break;
1531 case VIRTIO_PCI_COMMON_Q_MSIX:
1532 val = virtio_queue_vector(vdev, vdev->queue_sel);
1533 break;
1534 case VIRTIO_PCI_COMMON_Q_ENABLE:
1535 val = proxy->vqs[vdev->queue_sel].enabled;
1536 break;
1537 case VIRTIO_PCI_COMMON_Q_NOFF:
1538 /* Simply map queues in order */
1539 val = vdev->queue_sel;
1540 break;
1541 case VIRTIO_PCI_COMMON_Q_DESCLO:
1542 val = proxy->vqs[vdev->queue_sel].desc[0];
1543 break;
1544 case VIRTIO_PCI_COMMON_Q_DESCHI:
1545 val = proxy->vqs[vdev->queue_sel].desc[1];
1546 break;
1547 case VIRTIO_PCI_COMMON_Q_AVAILLO:
1548 val = proxy->vqs[vdev->queue_sel].avail[0];
1549 break;
1550 case VIRTIO_PCI_COMMON_Q_AVAILHI:
1551 val = proxy->vqs[vdev->queue_sel].avail[1];
1552 break;
1553 case VIRTIO_PCI_COMMON_Q_USEDLO:
1554 val = proxy->vqs[vdev->queue_sel].used[0];
1555 break;
1556 case VIRTIO_PCI_COMMON_Q_USEDHI:
1557 val = proxy->vqs[vdev->queue_sel].used[1];
1558 break;
1559 case VIRTIO_PCI_COMMON_Q_RESET:
1560 val = proxy->vqs[vdev->queue_sel].reset;
1561 break;
1562 default:
1563 val = 0;
1564 }
1565
1566 return val;
1567 }
1568
virtio_pci_common_write(void * opaque,hwaddr addr,uint64_t val,unsigned size)1569 static void virtio_pci_common_write(void *opaque, hwaddr addr,
1570 uint64_t val, unsigned size)
1571 {
1572 VirtIOPCIProxy *proxy = opaque;
1573 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1574 uint16_t vector;
1575
1576 if (vdev == NULL) {
1577 return;
1578 }
1579
1580 switch (addr) {
1581 case VIRTIO_PCI_COMMON_DFSELECT:
1582 proxy->dfselect = val;
1583 break;
1584 case VIRTIO_PCI_COMMON_GFSELECT:
1585 proxy->gfselect = val;
1586 break;
1587 case VIRTIO_PCI_COMMON_GF:
1588 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) {
1589 proxy->guest_features[proxy->gfselect] = val;
1590 virtio_set_features(vdev,
1591 (((uint64_t)proxy->guest_features[1]) << 32) |
1592 proxy->guest_features[0]);
1593 }
1594 break;
1595 case VIRTIO_PCI_COMMON_MSIX:
1596 if (vdev->config_vector != VIRTIO_NO_VECTOR) {
1597 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
1598 }
1599 /* Make it possible for guest to discover an error took place. */
1600 if (val < proxy->nvectors) {
1601 msix_vector_use(&proxy->pci_dev, val);
1602 } else {
1603 val = VIRTIO_NO_VECTOR;
1604 }
1605 virtio_pci_set_vector(vdev, proxy, VIRTIO_CONFIG_IRQ_IDX,
1606 vdev->config_vector, val);
1607 break;
1608 case VIRTIO_PCI_COMMON_STATUS:
1609 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
1610 virtio_pci_stop_ioeventfd(proxy);
1611 }
1612
1613 virtio_set_status(vdev, val & 0xFF);
1614
1615 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
1616 virtio_pci_start_ioeventfd(proxy);
1617 }
1618
1619 if (vdev->status == 0) {
1620 virtio_pci_reset(DEVICE(proxy));
1621 }
1622
1623 break;
1624 case VIRTIO_PCI_COMMON_Q_SELECT:
1625 if (val < VIRTIO_QUEUE_MAX) {
1626 vdev->queue_sel = val;
1627 }
1628 break;
1629 case VIRTIO_PCI_COMMON_Q_SIZE:
1630 proxy->vqs[vdev->queue_sel].num = val;
1631 virtio_queue_set_num(vdev, vdev->queue_sel,
1632 proxy->vqs[vdev->queue_sel].num);
1633 virtio_init_region_cache(vdev, vdev->queue_sel);
1634 break;
1635 case VIRTIO_PCI_COMMON_Q_MSIX:
1636 vector = virtio_queue_vector(vdev, vdev->queue_sel);
1637 if (vector != VIRTIO_NO_VECTOR) {
1638 msix_vector_unuse(&proxy->pci_dev, vector);
1639 }
1640 /* Make it possible for guest to discover an error took place. */
1641 if (val < proxy->nvectors) {
1642 msix_vector_use(&proxy->pci_dev, val);
1643 } else {
1644 val = VIRTIO_NO_VECTOR;
1645 }
1646 virtio_pci_set_vector(vdev, proxy, vdev->queue_sel, vector, val);
1647 break;
1648 case VIRTIO_PCI_COMMON_Q_ENABLE:
1649 if (val == 1) {
1650 virtio_queue_set_num(vdev, vdev->queue_sel,
1651 proxy->vqs[vdev->queue_sel].num);
1652 virtio_queue_set_rings(vdev, vdev->queue_sel,
1653 ((uint64_t)proxy->vqs[vdev->queue_sel].desc[1]) << 32 |
1654 proxy->vqs[vdev->queue_sel].desc[0],
1655 ((uint64_t)proxy->vqs[vdev->queue_sel].avail[1]) << 32 |
1656 proxy->vqs[vdev->queue_sel].avail[0],
1657 ((uint64_t)proxy->vqs[vdev->queue_sel].used[1]) << 32 |
1658 proxy->vqs[vdev->queue_sel].used[0]);
1659 proxy->vqs[vdev->queue_sel].enabled = 1;
1660 proxy->vqs[vdev->queue_sel].reset = 0;
1661 virtio_queue_enable(vdev, vdev->queue_sel);
1662 } else {
1663 virtio_error(vdev, "wrong value for queue_enable %"PRIx64, val);
1664 }
1665 break;
1666 case VIRTIO_PCI_COMMON_Q_DESCLO:
1667 proxy->vqs[vdev->queue_sel].desc[0] = val;
1668 break;
1669 case VIRTIO_PCI_COMMON_Q_DESCHI:
1670 proxy->vqs[vdev->queue_sel].desc[1] = val;
1671 break;
1672 case VIRTIO_PCI_COMMON_Q_AVAILLO:
1673 proxy->vqs[vdev->queue_sel].avail[0] = val;
1674 break;
1675 case VIRTIO_PCI_COMMON_Q_AVAILHI:
1676 proxy->vqs[vdev->queue_sel].avail[1] = val;
1677 break;
1678 case VIRTIO_PCI_COMMON_Q_USEDLO:
1679 proxy->vqs[vdev->queue_sel].used[0] = val;
1680 break;
1681 case VIRTIO_PCI_COMMON_Q_USEDHI:
1682 proxy->vqs[vdev->queue_sel].used[1] = val;
1683 break;
1684 case VIRTIO_PCI_COMMON_Q_RESET:
1685 if (val == 1) {
1686 proxy->vqs[vdev->queue_sel].reset = 1;
1687
1688 virtio_queue_reset(vdev, vdev->queue_sel);
1689
1690 proxy->vqs[vdev->queue_sel].reset = 0;
1691 proxy->vqs[vdev->queue_sel].enabled = 0;
1692 }
1693 break;
1694 default:
1695 break;
1696 }
1697 }
1698
1699
virtio_pci_notify_read(void * opaque,hwaddr addr,unsigned size)1700 static uint64_t virtio_pci_notify_read(void *opaque, hwaddr addr,
1701 unsigned size)
1702 {
1703 VirtIOPCIProxy *proxy = opaque;
1704 if (virtio_bus_get_device(&proxy->bus) == NULL) {
1705 return UINT64_MAX;
1706 }
1707
1708 return 0;
1709 }
1710
virtio_pci_notify_write(void * opaque,hwaddr addr,uint64_t val,unsigned size)1711 static void virtio_pci_notify_write(void *opaque, hwaddr addr,
1712 uint64_t val, unsigned size)
1713 {
1714 VirtIOPCIProxy *proxy = opaque;
1715 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1716
1717 unsigned queue = addr / virtio_pci_queue_mem_mult(proxy);
1718
1719 if (vdev != NULL && queue < VIRTIO_QUEUE_MAX) {
1720 trace_virtio_pci_notify_write(addr, val, size);
1721 virtio_queue_notify(vdev, queue);
1722 }
1723 }
1724
virtio_pci_notify_write_pio(void * opaque,hwaddr addr,uint64_t val,unsigned size)1725 static void virtio_pci_notify_write_pio(void *opaque, hwaddr addr,
1726 uint64_t val, unsigned size)
1727 {
1728 VirtIOPCIProxy *proxy = opaque;
1729 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1730
1731 unsigned queue = val;
1732
1733 if (vdev != NULL && queue < VIRTIO_QUEUE_MAX) {
1734 trace_virtio_pci_notify_write_pio(addr, val, size);
1735 virtio_queue_notify(vdev, queue);
1736 }
1737 }
1738
virtio_pci_isr_read(void * opaque,hwaddr addr,unsigned size)1739 static uint64_t virtio_pci_isr_read(void *opaque, hwaddr addr,
1740 unsigned size)
1741 {
1742 VirtIOPCIProxy *proxy = opaque;
1743 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1744 uint64_t val;
1745
1746 if (vdev == NULL) {
1747 return UINT64_MAX;
1748 }
1749
1750 val = qatomic_xchg(&vdev->isr, 0);
1751 pci_irq_deassert(&proxy->pci_dev);
1752 return val;
1753 }
1754
virtio_pci_isr_write(void * opaque,hwaddr addr,uint64_t val,unsigned size)1755 static void virtio_pci_isr_write(void *opaque, hwaddr addr,
1756 uint64_t val, unsigned size)
1757 {
1758 }
1759
virtio_pci_device_read(void * opaque,hwaddr addr,unsigned size)1760 static uint64_t virtio_pci_device_read(void *opaque, hwaddr addr,
1761 unsigned size)
1762 {
1763 VirtIOPCIProxy *proxy = opaque;
1764 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1765 uint64_t val;
1766
1767 if (vdev == NULL) {
1768 return UINT64_MAX;
1769 }
1770
1771 switch (size) {
1772 case 1:
1773 val = virtio_config_modern_readb(vdev, addr);
1774 break;
1775 case 2:
1776 val = virtio_config_modern_readw(vdev, addr);
1777 break;
1778 case 4:
1779 val = virtio_config_modern_readl(vdev, addr);
1780 break;
1781 default:
1782 val = 0;
1783 break;
1784 }
1785 return val;
1786 }
1787
virtio_pci_device_write(void * opaque,hwaddr addr,uint64_t val,unsigned size)1788 static void virtio_pci_device_write(void *opaque, hwaddr addr,
1789 uint64_t val, unsigned size)
1790 {
1791 VirtIOPCIProxy *proxy = opaque;
1792 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1793
1794 if (vdev == NULL) {
1795 return;
1796 }
1797
1798 switch (size) {
1799 case 1:
1800 virtio_config_modern_writeb(vdev, addr, val);
1801 break;
1802 case 2:
1803 virtio_config_modern_writew(vdev, addr, val);
1804 break;
1805 case 4:
1806 virtio_config_modern_writel(vdev, addr, val);
1807 break;
1808 }
1809 }
1810
virtio_pci_modern_regions_init(VirtIOPCIProxy * proxy,const char * vdev_name)1811 static void virtio_pci_modern_regions_init(VirtIOPCIProxy *proxy,
1812 const char *vdev_name)
1813 {
1814 static const MemoryRegionOps common_ops = {
1815 .read = virtio_pci_common_read,
1816 .write = virtio_pci_common_write,
1817 .impl = {
1818 .min_access_size = 1,
1819 .max_access_size = 4,
1820 },
1821 .endianness = DEVICE_LITTLE_ENDIAN,
1822 };
1823 static const MemoryRegionOps isr_ops = {
1824 .read = virtio_pci_isr_read,
1825 .write = virtio_pci_isr_write,
1826 .impl = {
1827 .min_access_size = 1,
1828 .max_access_size = 4,
1829 },
1830 .endianness = DEVICE_LITTLE_ENDIAN,
1831 };
1832 static const MemoryRegionOps device_ops = {
1833 .read = virtio_pci_device_read,
1834 .write = virtio_pci_device_write,
1835 .impl = {
1836 .min_access_size = 1,
1837 .max_access_size = 4,
1838 },
1839 .endianness = DEVICE_LITTLE_ENDIAN,
1840 };
1841 static const MemoryRegionOps notify_ops = {
1842 .read = virtio_pci_notify_read,
1843 .write = virtio_pci_notify_write,
1844 .impl = {
1845 .min_access_size = 1,
1846 .max_access_size = 4,
1847 },
1848 .endianness = DEVICE_LITTLE_ENDIAN,
1849 };
1850 static const MemoryRegionOps notify_pio_ops = {
1851 .read = virtio_pci_notify_read,
1852 .write = virtio_pci_notify_write_pio,
1853 .impl = {
1854 .min_access_size = 1,
1855 .max_access_size = 4,
1856 },
1857 .endianness = DEVICE_LITTLE_ENDIAN,
1858 };
1859 g_autoptr(GString) name = g_string_new(NULL);
1860
1861 g_string_printf(name, "virtio-pci-common-%s", vdev_name);
1862 memory_region_init_io(&proxy->common.mr, OBJECT(proxy),
1863 &common_ops,
1864 proxy,
1865 name->str,
1866 proxy->common.size);
1867
1868 g_string_printf(name, "virtio-pci-isr-%s", vdev_name);
1869 memory_region_init_io(&proxy->isr.mr, OBJECT(proxy),
1870 &isr_ops,
1871 proxy,
1872 name->str,
1873 proxy->isr.size);
1874
1875 g_string_printf(name, "virtio-pci-device-%s", vdev_name);
1876 memory_region_init_io(&proxy->device.mr, OBJECT(proxy),
1877 &device_ops,
1878 proxy,
1879 name->str,
1880 proxy->device.size);
1881
1882 g_string_printf(name, "virtio-pci-notify-%s", vdev_name);
1883 memory_region_init_io(&proxy->notify.mr, OBJECT(proxy),
1884 ¬ify_ops,
1885 proxy,
1886 name->str,
1887 proxy->notify.size);
1888
1889 g_string_printf(name, "virtio-pci-notify-pio-%s", vdev_name);
1890 memory_region_init_io(&proxy->notify_pio.mr, OBJECT(proxy),
1891 ¬ify_pio_ops,
1892 proxy,
1893 name->str,
1894 proxy->notify_pio.size);
1895 }
1896
virtio_pci_modern_region_map(VirtIOPCIProxy * proxy,VirtIOPCIRegion * region,struct virtio_pci_cap * cap,MemoryRegion * mr,uint8_t bar)1897 static void virtio_pci_modern_region_map(VirtIOPCIProxy *proxy,
1898 VirtIOPCIRegion *region,
1899 struct virtio_pci_cap *cap,
1900 MemoryRegion *mr,
1901 uint8_t bar)
1902 {
1903 memory_region_add_subregion(mr, region->offset, ®ion->mr);
1904
1905 cap->cfg_type = region->type;
1906 cap->bar = bar;
1907 cap->offset = cpu_to_le32(region->offset);
1908 cap->length = cpu_to_le32(region->size);
1909 virtio_pci_add_mem_cap(proxy, cap);
1910
1911 }
1912
virtio_pci_modern_mem_region_map(VirtIOPCIProxy * proxy,VirtIOPCIRegion * region,struct virtio_pci_cap * cap)1913 static void virtio_pci_modern_mem_region_map(VirtIOPCIProxy *proxy,
1914 VirtIOPCIRegion *region,
1915 struct virtio_pci_cap *cap)
1916 {
1917 virtio_pci_modern_region_map(proxy, region, cap,
1918 &proxy->modern_bar, proxy->modern_mem_bar_idx);
1919 }
1920
virtio_pci_modern_io_region_map(VirtIOPCIProxy * proxy,VirtIOPCIRegion * region,struct virtio_pci_cap * cap)1921 static void virtio_pci_modern_io_region_map(VirtIOPCIProxy *proxy,
1922 VirtIOPCIRegion *region,
1923 struct virtio_pci_cap *cap)
1924 {
1925 virtio_pci_modern_region_map(proxy, region, cap,
1926 &proxy->io_bar, proxy->modern_io_bar_idx);
1927 }
1928
virtio_pci_modern_mem_region_unmap(VirtIOPCIProxy * proxy,VirtIOPCIRegion * region)1929 static void virtio_pci_modern_mem_region_unmap(VirtIOPCIProxy *proxy,
1930 VirtIOPCIRegion *region)
1931 {
1932 memory_region_del_subregion(&proxy->modern_bar,
1933 ®ion->mr);
1934 }
1935
virtio_pci_modern_io_region_unmap(VirtIOPCIProxy * proxy,VirtIOPCIRegion * region)1936 static void virtio_pci_modern_io_region_unmap(VirtIOPCIProxy *proxy,
1937 VirtIOPCIRegion *region)
1938 {
1939 memory_region_del_subregion(&proxy->io_bar,
1940 ®ion->mr);
1941 }
1942
virtio_pci_pre_plugged(DeviceState * d,Error ** errp)1943 static void virtio_pci_pre_plugged(DeviceState *d, Error **errp)
1944 {
1945 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1946 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1947
1948 if (virtio_pci_modern(proxy)) {
1949 virtio_add_feature(&vdev->host_features, VIRTIO_F_VERSION_1);
1950 }
1951
1952 virtio_add_feature(&vdev->host_features, VIRTIO_F_BAD_FEATURE);
1953 }
1954
1955 /* This is called by virtio-bus just after the device is plugged. */
virtio_pci_device_plugged(DeviceState * d,Error ** errp)1956 static void virtio_pci_device_plugged(DeviceState *d, Error **errp)
1957 {
1958 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1959 VirtioBusState *bus = &proxy->bus;
1960 bool legacy = virtio_pci_legacy(proxy);
1961 bool modern;
1962 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
1963 uint8_t *config;
1964 uint32_t size;
1965 VirtIODevice *vdev = virtio_bus_get_device(bus);
1966
1967 /*
1968 * Virtio capabilities present without
1969 * VIRTIO_F_VERSION_1 confuses guests
1970 */
1971 if (!proxy->ignore_backend_features &&
1972 !virtio_has_feature(vdev->host_features, VIRTIO_F_VERSION_1)) {
1973 virtio_pci_disable_modern(proxy);
1974
1975 if (!legacy) {
1976 error_setg(errp, "Device doesn't support modern mode, and legacy"
1977 " mode is disabled");
1978 error_append_hint(errp, "Set disable-legacy to off\n");
1979
1980 return;
1981 }
1982 }
1983
1984 modern = virtio_pci_modern(proxy);
1985
1986 config = proxy->pci_dev.config;
1987 if (proxy->class_code) {
1988 pci_config_set_class(config, proxy->class_code);
1989 }
1990
1991 if (legacy) {
1992 if (!virtio_legacy_allowed(vdev)) {
1993 /*
1994 * To avoid migration issues, we allow legacy mode when legacy
1995 * check is disabled in the old machine types (< 5.1).
1996 */
1997 if (virtio_legacy_check_disabled(vdev)) {
1998 warn_report("device is modern-only, but for backward "
1999 "compatibility legacy is allowed");
2000 } else {
2001 error_setg(errp,
2002 "device is modern-only, use disable-legacy=on");
2003 return;
2004 }
2005 }
2006 if (virtio_host_has_feature(vdev, VIRTIO_F_IOMMU_PLATFORM)) {
2007 error_setg(errp, "VIRTIO_F_IOMMU_PLATFORM was supported by"
2008 " neither legacy nor transitional device");
2009 return;
2010 }
2011 /*
2012 * Legacy and transitional devices use specific subsystem IDs.
2013 * Note that the subsystem vendor ID (config + PCI_SUBSYSTEM_VENDOR_ID)
2014 * is set to PCI_SUBVENDOR_ID_REDHAT_QUMRANET by default.
2015 */
2016 pci_set_word(config + PCI_SUBSYSTEM_ID, virtio_bus_get_vdev_id(bus));
2017 if (proxy->trans_devid) {
2018 pci_config_set_device_id(config, proxy->trans_devid);
2019 }
2020 } else {
2021 /* pure virtio-1.0 */
2022 pci_set_word(config + PCI_VENDOR_ID,
2023 PCI_VENDOR_ID_REDHAT_QUMRANET);
2024 pci_set_word(config + PCI_DEVICE_ID,
2025 PCI_DEVICE_ID_VIRTIO_10_BASE + virtio_bus_get_vdev_id(bus));
2026 pci_config_set_revision(config, 1);
2027 }
2028 config[PCI_INTERRUPT_PIN] = 1;
2029
2030
2031 if (modern) {
2032 struct virtio_pci_cap cap = {
2033 .cap_len = sizeof cap,
2034 };
2035 struct virtio_pci_notify_cap notify = {
2036 .cap.cap_len = sizeof notify,
2037 .notify_off_multiplier =
2038 cpu_to_le32(virtio_pci_queue_mem_mult(proxy)),
2039 };
2040 struct virtio_pci_cfg_cap cfg = {
2041 .cap.cap_len = sizeof cfg,
2042 .cap.cfg_type = VIRTIO_PCI_CAP_PCI_CFG,
2043 };
2044 struct virtio_pci_notify_cap notify_pio = {
2045 .cap.cap_len = sizeof notify,
2046 .notify_off_multiplier = cpu_to_le32(0x0),
2047 };
2048
2049 struct virtio_pci_cfg_cap *cfg_mask;
2050
2051 virtio_pci_modern_regions_init(proxy, vdev->name);
2052
2053 virtio_pci_modern_mem_region_map(proxy, &proxy->common, &cap);
2054 virtio_pci_modern_mem_region_map(proxy, &proxy->isr, &cap);
2055 virtio_pci_modern_mem_region_map(proxy, &proxy->device, &cap);
2056 virtio_pci_modern_mem_region_map(proxy, &proxy->notify, ¬ify.cap);
2057
2058 if (modern_pio) {
2059 memory_region_init(&proxy->io_bar, OBJECT(proxy),
2060 "virtio-pci-io", 0x4);
2061
2062 pci_register_bar(&proxy->pci_dev, proxy->modern_io_bar_idx,
2063 PCI_BASE_ADDRESS_SPACE_IO, &proxy->io_bar);
2064
2065 virtio_pci_modern_io_region_map(proxy, &proxy->notify_pio,
2066 ¬ify_pio.cap);
2067 }
2068
2069 pci_register_bar(&proxy->pci_dev, proxy->modern_mem_bar_idx,
2070 PCI_BASE_ADDRESS_SPACE_MEMORY |
2071 PCI_BASE_ADDRESS_MEM_PREFETCH |
2072 PCI_BASE_ADDRESS_MEM_TYPE_64,
2073 &proxy->modern_bar);
2074
2075 proxy->config_cap = virtio_pci_add_mem_cap(proxy, &cfg.cap);
2076 cfg_mask = (void *)(proxy->pci_dev.wmask + proxy->config_cap);
2077 pci_set_byte(&cfg_mask->cap.bar, ~0x0);
2078 pci_set_long((uint8_t *)&cfg_mask->cap.offset, ~0x0);
2079 pci_set_long((uint8_t *)&cfg_mask->cap.length, ~0x0);
2080 pci_set_long(cfg_mask->pci_cfg_data, ~0x0);
2081 }
2082
2083 if (proxy->nvectors) {
2084 int err = msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors,
2085 proxy->msix_bar_idx, NULL);
2086 if (err) {
2087 /* Notice when a system that supports MSIx can't initialize it */
2088 if (err != -ENOTSUP) {
2089 warn_report("unable to init msix vectors to %" PRIu32,
2090 proxy->nvectors);
2091 }
2092 proxy->nvectors = 0;
2093 }
2094 }
2095
2096 proxy->pci_dev.config_write = virtio_write_config;
2097 proxy->pci_dev.config_read = virtio_read_config;
2098
2099 if (legacy) {
2100 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev)
2101 + virtio_bus_get_vdev_config_len(bus);
2102 size = pow2ceil(size);
2103
2104 memory_region_init_io(&proxy->bar, OBJECT(proxy),
2105 &virtio_pci_config_ops,
2106 proxy, "virtio-pci", size);
2107
2108 pci_register_bar(&proxy->pci_dev, proxy->legacy_io_bar_idx,
2109 PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar);
2110 }
2111 }
2112
virtio_pci_device_unplugged(DeviceState * d)2113 static void virtio_pci_device_unplugged(DeviceState *d)
2114 {
2115 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
2116 bool modern = virtio_pci_modern(proxy);
2117 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
2118
2119 virtio_pci_stop_ioeventfd(proxy);
2120
2121 if (modern) {
2122 virtio_pci_modern_mem_region_unmap(proxy, &proxy->common);
2123 virtio_pci_modern_mem_region_unmap(proxy, &proxy->isr);
2124 virtio_pci_modern_mem_region_unmap(proxy, &proxy->device);
2125 virtio_pci_modern_mem_region_unmap(proxy, &proxy->notify);
2126 if (modern_pio) {
2127 virtio_pci_modern_io_region_unmap(proxy, &proxy->notify_pio);
2128 }
2129 }
2130 }
2131
virtio_pci_realize(PCIDevice * pci_dev,Error ** errp)2132 static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
2133 {
2134 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
2135 VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev);
2136 bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) &&
2137 !pci_bus_is_root(pci_get_bus(pci_dev));
2138
2139 /* fd-based ioevents can't be synchronized in record/replay */
2140 if (replay_mode != REPLAY_MODE_NONE) {
2141 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD;
2142 }
2143
2144 /*
2145 * virtio pci bar layout used by default.
2146 * subclasses can re-arrange things if needed.
2147 *
2148 * region 0 -- virtio legacy io bar
2149 * region 1 -- msi-x bar
2150 * region 2 -- virtio modern io bar (off by default)
2151 * region 4+5 -- virtio modern memory (64bit) bar
2152 *
2153 */
2154 proxy->legacy_io_bar_idx = 0;
2155 proxy->msix_bar_idx = 1;
2156 proxy->modern_io_bar_idx = 2;
2157 proxy->modern_mem_bar_idx = 4;
2158
2159 proxy->common.offset = 0x0;
2160 proxy->common.size = 0x1000;
2161 proxy->common.type = VIRTIO_PCI_CAP_COMMON_CFG;
2162
2163 proxy->isr.offset = 0x1000;
2164 proxy->isr.size = 0x1000;
2165 proxy->isr.type = VIRTIO_PCI_CAP_ISR_CFG;
2166
2167 proxy->device.offset = 0x2000;
2168 proxy->device.size = 0x1000;
2169 proxy->device.type = VIRTIO_PCI_CAP_DEVICE_CFG;
2170
2171 proxy->notify.offset = 0x3000;
2172 proxy->notify.size = virtio_pci_queue_mem_mult(proxy) * VIRTIO_QUEUE_MAX;
2173 proxy->notify.type = VIRTIO_PCI_CAP_NOTIFY_CFG;
2174
2175 proxy->notify_pio.offset = 0x0;
2176 proxy->notify_pio.size = 0x4;
2177 proxy->notify_pio.type = VIRTIO_PCI_CAP_NOTIFY_CFG;
2178
2179 /* subclasses can enforce modern, so do this unconditionally */
2180 memory_region_init(&proxy->modern_bar, OBJECT(proxy), "virtio-pci",
2181 /* PCI BAR regions must be powers of 2 */
2182 pow2ceil(proxy->notify.offset + proxy->notify.size));
2183
2184 if (proxy->disable_legacy == ON_OFF_AUTO_AUTO) {
2185 proxy->disable_legacy = pcie_port ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
2186 }
2187
2188 if (!virtio_pci_modern(proxy) && !virtio_pci_legacy(proxy)) {
2189 error_setg(errp, "device cannot work as neither modern nor legacy mode"
2190 " is enabled");
2191 error_append_hint(errp, "Set either disable-modern or disable-legacy"
2192 " to off\n");
2193 return;
2194 }
2195
2196 if (pcie_port && pci_is_express(pci_dev)) {
2197 int pos;
2198 uint16_t last_pcie_cap_offset = PCI_CONFIG_SPACE_SIZE;
2199
2200 pos = pcie_endpoint_cap_init(pci_dev, 0);
2201 assert(pos > 0);
2202
2203 pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0,
2204 PCI_PM_SIZEOF, errp);
2205 if (pos < 0) {
2206 return;
2207 }
2208
2209 pci_dev->exp.pm_cap = pos;
2210
2211 /*
2212 * Indicates that this function complies with revision 1.2 of the
2213 * PCI Power Management Interface Specification.
2214 */
2215 pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);
2216
2217 if (proxy->flags & VIRTIO_PCI_FLAG_AER) {
2218 pcie_aer_init(pci_dev, PCI_ERR_VER, last_pcie_cap_offset,
2219 PCI_ERR_SIZEOF, NULL);
2220 last_pcie_cap_offset += PCI_ERR_SIZEOF;
2221 }
2222
2223 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_DEVERR) {
2224 /* Init error enabling flags */
2225 pcie_cap_deverr_init(pci_dev);
2226 }
2227
2228 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_LNKCTL) {
2229 /* Init Link Control Register */
2230 pcie_cap_lnkctl_init(pci_dev);
2231 }
2232
2233 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) {
2234 /* Init Power Management Control Register */
2235 pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL,
2236 PCI_PM_CTRL_STATE_MASK);
2237 }
2238
2239 if (proxy->flags & VIRTIO_PCI_FLAG_ATS) {
2240 pcie_ats_init(pci_dev, last_pcie_cap_offset,
2241 proxy->flags & VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED);
2242 last_pcie_cap_offset += PCI_EXT_CAP_ATS_SIZEOF;
2243 }
2244
2245 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) {
2246 /* Set Function Level Reset capability bit */
2247 pcie_cap_flr_init(pci_dev);
2248 }
2249 } else {
2250 /*
2251 * make future invocations of pci_is_express() return false
2252 * and pci_config_size() return PCI_CONFIG_SPACE_SIZE.
2253 */
2254 pci_dev->cap_present &= ~QEMU_PCI_CAP_EXPRESS;
2255 }
2256
2257 virtio_pci_bus_new(&proxy->bus, sizeof(proxy->bus), proxy);
2258 if (k->realize) {
2259 k->realize(proxy, errp);
2260 }
2261 }
2262
virtio_pci_exit(PCIDevice * pci_dev)2263 static void virtio_pci_exit(PCIDevice *pci_dev)
2264 {
2265 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
2266 bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) &&
2267 !pci_bus_is_root(pci_get_bus(pci_dev));
2268
2269 msix_uninit_exclusive_bar(pci_dev);
2270 if (proxy->flags & VIRTIO_PCI_FLAG_AER && pcie_port &&
2271 pci_is_express(pci_dev)) {
2272 pcie_aer_exit(pci_dev);
2273 }
2274 }
2275
virtio_pci_reset(DeviceState * qdev)2276 static void virtio_pci_reset(DeviceState *qdev)
2277 {
2278 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
2279 VirtioBusState *bus = VIRTIO_BUS(&proxy->bus);
2280 int i;
2281
2282 virtio_bus_reset(bus);
2283 msix_unuse_all_vectors(&proxy->pci_dev);
2284
2285 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
2286 proxy->vqs[i].enabled = 0;
2287 proxy->vqs[i].reset = 0;
2288 proxy->vqs[i].num = 0;
2289 proxy->vqs[i].desc[0] = proxy->vqs[i].desc[1] = 0;
2290 proxy->vqs[i].avail[0] = proxy->vqs[i].avail[1] = 0;
2291 proxy->vqs[i].used[0] = proxy->vqs[i].used[1] = 0;
2292 }
2293 }
2294
virtio_pci_bus_reset_hold(Object * obj,ResetType type)2295 static void virtio_pci_bus_reset_hold(Object *obj, ResetType type)
2296 {
2297 PCIDevice *dev = PCI_DEVICE(obj);
2298 DeviceState *qdev = DEVICE(obj);
2299
2300 virtio_pci_reset(qdev);
2301
2302 if (pci_is_express(dev)) {
2303 pcie_cap_deverr_reset(dev);
2304 pcie_cap_lnkctl_reset(dev);
2305
2306 pci_set_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL, 0);
2307 }
2308 }
2309
2310 static Property virtio_pci_properties[] = {
2311 DEFINE_PROP_BIT("virtio-pci-bus-master-bug-migration", VirtIOPCIProxy, flags,
2312 VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, false),
2313 DEFINE_PROP_BIT("migrate-extra", VirtIOPCIProxy, flags,
2314 VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT, true),
2315 DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags,
2316 VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false),
2317 DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags,
2318 VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false),
2319 DEFINE_PROP_BIT("page-per-vq", VirtIOPCIProxy, flags,
2320 VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, false),
2321 DEFINE_PROP_BOOL("x-ignore-backend-features", VirtIOPCIProxy,
2322 ignore_backend_features, false),
2323 DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags,
2324 VIRTIO_PCI_FLAG_ATS_BIT, false),
2325 DEFINE_PROP_BIT("x-ats-page-aligned", VirtIOPCIProxy, flags,
2326 VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT, true),
2327 DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags,
2328 VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true),
2329 DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags,
2330 VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true),
2331 DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags,
2332 VIRTIO_PCI_FLAG_INIT_PM_BIT, true),
2333 DEFINE_PROP_BIT("x-pcie-flr-init", VirtIOPCIProxy, flags,
2334 VIRTIO_PCI_FLAG_INIT_FLR_BIT, true),
2335 DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags,
2336 VIRTIO_PCI_FLAG_AER_BIT, false),
2337 DEFINE_PROP_END_OF_LIST(),
2338 };
2339
virtio_pci_dc_realize(DeviceState * qdev,Error ** errp)2340 static void virtio_pci_dc_realize(DeviceState *qdev, Error **errp)
2341 {
2342 VirtioPCIClass *vpciklass = VIRTIO_PCI_GET_CLASS(qdev);
2343 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
2344 PCIDevice *pci_dev = &proxy->pci_dev;
2345
2346 if (!(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_PCIE) &&
2347 virtio_pci_modern(proxy)) {
2348 pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
2349 }
2350
2351 vpciklass->parent_dc_realize(qdev, errp);
2352 }
2353
virtio_pci_class_init(ObjectClass * klass,void * data)2354 static void virtio_pci_class_init(ObjectClass *klass, void *data)
2355 {
2356 DeviceClass *dc = DEVICE_CLASS(klass);
2357 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
2358 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass);
2359 ResettableClass *rc = RESETTABLE_CLASS(klass);
2360
2361 device_class_set_props(dc, virtio_pci_properties);
2362 k->realize = virtio_pci_realize;
2363 k->exit = virtio_pci_exit;
2364 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
2365 k->revision = VIRTIO_PCI_ABI_VERSION;
2366 k->class_id = PCI_CLASS_OTHERS;
2367 device_class_set_parent_realize(dc, virtio_pci_dc_realize,
2368 &vpciklass->parent_dc_realize);
2369 rc->phases.hold = virtio_pci_bus_reset_hold;
2370 }
2371
2372 static const TypeInfo virtio_pci_info = {
2373 .name = TYPE_VIRTIO_PCI,
2374 .parent = TYPE_PCI_DEVICE,
2375 .instance_size = sizeof(VirtIOPCIProxy),
2376 .class_init = virtio_pci_class_init,
2377 .class_size = sizeof(VirtioPCIClass),
2378 .abstract = true,
2379 };
2380
2381 static Property virtio_pci_generic_properties[] = {
2382 DEFINE_PROP_ON_OFF_AUTO("disable-legacy", VirtIOPCIProxy, disable_legacy,
2383 ON_OFF_AUTO_AUTO),
2384 DEFINE_PROP_BOOL("disable-modern", VirtIOPCIProxy, disable_modern, false),
2385 DEFINE_PROP_END_OF_LIST(),
2386 };
2387
virtio_pci_base_class_init(ObjectClass * klass,void * data)2388 static void virtio_pci_base_class_init(ObjectClass *klass, void *data)
2389 {
2390 const VirtioPCIDeviceTypeInfo *t = data;
2391 if (t->class_init) {
2392 t->class_init(klass, NULL);
2393 }
2394 }
2395
virtio_pci_generic_class_init(ObjectClass * klass,void * data)2396 static void virtio_pci_generic_class_init(ObjectClass *klass, void *data)
2397 {
2398 DeviceClass *dc = DEVICE_CLASS(klass);
2399
2400 device_class_set_props(dc, virtio_pci_generic_properties);
2401 }
2402
virtio_pci_transitional_instance_init(Object * obj)2403 static void virtio_pci_transitional_instance_init(Object *obj)
2404 {
2405 VirtIOPCIProxy *proxy = VIRTIO_PCI(obj);
2406
2407 proxy->disable_legacy = ON_OFF_AUTO_OFF;
2408 proxy->disable_modern = false;
2409 }
2410
virtio_pci_non_transitional_instance_init(Object * obj)2411 static void virtio_pci_non_transitional_instance_init(Object *obj)
2412 {
2413 VirtIOPCIProxy *proxy = VIRTIO_PCI(obj);
2414
2415 proxy->disable_legacy = ON_OFF_AUTO_ON;
2416 proxy->disable_modern = false;
2417 }
2418
virtio_pci_types_register(const VirtioPCIDeviceTypeInfo * t)2419 void virtio_pci_types_register(const VirtioPCIDeviceTypeInfo *t)
2420 {
2421 char *base_name = NULL;
2422 TypeInfo base_type_info = {
2423 .name = t->base_name,
2424 .parent = t->parent ? t->parent : TYPE_VIRTIO_PCI,
2425 .instance_size = t->instance_size,
2426 .instance_init = t->instance_init,
2427 .instance_finalize = t->instance_finalize,
2428 .class_size = t->class_size,
2429 .abstract = true,
2430 .interfaces = t->interfaces,
2431 };
2432 TypeInfo generic_type_info = {
2433 .name = t->generic_name,
2434 .parent = base_type_info.name,
2435 .class_init = virtio_pci_generic_class_init,
2436 .interfaces = (InterfaceInfo[]) {
2437 { INTERFACE_PCIE_DEVICE },
2438 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
2439 { }
2440 },
2441 };
2442
2443 if (!base_type_info.name) {
2444 /* No base type -> register a single generic device type */
2445 /* use intermediate %s-base-type to add generic device props */
2446 base_name = g_strdup_printf("%s-base-type", t->generic_name);
2447 base_type_info.name = base_name;
2448 base_type_info.class_init = virtio_pci_generic_class_init;
2449
2450 generic_type_info.parent = base_name;
2451 generic_type_info.class_init = virtio_pci_base_class_init;
2452 generic_type_info.class_data = (void *)t;
2453
2454 assert(!t->non_transitional_name);
2455 assert(!t->transitional_name);
2456 } else {
2457 base_type_info.class_init = virtio_pci_base_class_init;
2458 base_type_info.class_data = (void *)t;
2459 }
2460
2461 type_register(&base_type_info);
2462 if (generic_type_info.name) {
2463 type_register(&generic_type_info);
2464 }
2465
2466 if (t->non_transitional_name) {
2467 const TypeInfo non_transitional_type_info = {
2468 .name = t->non_transitional_name,
2469 .parent = base_type_info.name,
2470 .instance_init = virtio_pci_non_transitional_instance_init,
2471 .interfaces = (InterfaceInfo[]) {
2472 { INTERFACE_PCIE_DEVICE },
2473 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
2474 { }
2475 },
2476 };
2477 type_register(&non_transitional_type_info);
2478 }
2479
2480 if (t->transitional_name) {
2481 const TypeInfo transitional_type_info = {
2482 .name = t->transitional_name,
2483 .parent = base_type_info.name,
2484 .instance_init = virtio_pci_transitional_instance_init,
2485 .interfaces = (InterfaceInfo[]) {
2486 /*
2487 * Transitional virtio devices work only as Conventional PCI
2488 * devices because they require PIO ports.
2489 */
2490 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
2491 { }
2492 },
2493 };
2494 type_register(&transitional_type_info);
2495 }
2496 g_free(base_name);
2497 }
2498
virtio_pci_optimal_num_queues(unsigned fixed_queues)2499 unsigned virtio_pci_optimal_num_queues(unsigned fixed_queues)
2500 {
2501 /*
2502 * 1:1 vq to vCPU mapping is ideal because the same vCPU that submitted
2503 * virtqueue buffers can handle their completion. When a different vCPU
2504 * handles completion it may need to IPI the vCPU that submitted the
2505 * request and this adds overhead.
2506 *
2507 * Virtqueues consume guest RAM and MSI-X vectors. This is wasteful in
2508 * guests with very many vCPUs and a device that is only used by a few
2509 * vCPUs. Unfortunately optimizing that case requires manual pinning inside
2510 * the guest, so those users might as well manually set the number of
2511 * queues. There is no upper limit that can be applied automatically and
2512 * doing so arbitrarily would result in a sudden performance drop once the
2513 * threshold number of vCPUs is exceeded.
2514 */
2515 unsigned num_queues = current_machine->smp.cpus;
2516
2517 /*
2518 * The maximum number of MSI-X vectors is PCI_MSIX_FLAGS_QSIZE + 1, but the
2519 * config change interrupt and the fixed virtqueues must be taken into
2520 * account too.
2521 */
2522 num_queues = MIN(num_queues, PCI_MSIX_FLAGS_QSIZE - fixed_queues);
2523
2524 /*
2525 * There is a limit to how many virtqueues a device can have.
2526 */
2527 return MIN(num_queues, VIRTIO_QUEUE_MAX - fixed_queues);
2528 }
2529
2530 /* virtio-pci-bus */
2531
virtio_pci_bus_new(VirtioBusState * bus,size_t bus_size,VirtIOPCIProxy * dev)2532 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size,
2533 VirtIOPCIProxy *dev)
2534 {
2535 DeviceState *qdev = DEVICE(dev);
2536 char virtio_bus_name[] = "virtio-bus";
2537
2538 qbus_init(bus, bus_size, TYPE_VIRTIO_PCI_BUS, qdev, virtio_bus_name);
2539 }
2540
virtio_pci_bus_class_init(ObjectClass * klass,void * data)2541 static void virtio_pci_bus_class_init(ObjectClass *klass, void *data)
2542 {
2543 BusClass *bus_class = BUS_CLASS(klass);
2544 VirtioBusClass *k = VIRTIO_BUS_CLASS(klass);
2545 bus_class->max_dev = 1;
2546 k->notify = virtio_pci_notify;
2547 k->save_config = virtio_pci_save_config;
2548 k->load_config = virtio_pci_load_config;
2549 k->save_queue = virtio_pci_save_queue;
2550 k->load_queue = virtio_pci_load_queue;
2551 k->save_extra_state = virtio_pci_save_extra_state;
2552 k->load_extra_state = virtio_pci_load_extra_state;
2553 k->has_extra_state = virtio_pci_has_extra_state;
2554 k->query_guest_notifiers = virtio_pci_query_guest_notifiers;
2555 k->set_guest_notifiers = virtio_pci_set_guest_notifiers;
2556 k->set_host_notifier_mr = virtio_pci_set_host_notifier_mr;
2557 k->vmstate_change = virtio_pci_vmstate_change;
2558 k->pre_plugged = virtio_pci_pre_plugged;
2559 k->device_plugged = virtio_pci_device_plugged;
2560 k->device_unplugged = virtio_pci_device_unplugged;
2561 k->query_nvectors = virtio_pci_query_nvectors;
2562 k->ioeventfd_enabled = virtio_pci_ioeventfd_enabled;
2563 k->ioeventfd_assign = virtio_pci_ioeventfd_assign;
2564 k->get_dma_as = virtio_pci_get_dma_as;
2565 k->iommu_enabled = virtio_pci_iommu_enabled;
2566 k->queue_enabled = virtio_pci_queue_enabled;
2567 }
2568
2569 static const TypeInfo virtio_pci_bus_info = {
2570 .name = TYPE_VIRTIO_PCI_BUS,
2571 .parent = TYPE_VIRTIO_BUS,
2572 .instance_size = sizeof(VirtioPCIBusState),
2573 .class_size = sizeof(VirtioPCIBusClass),
2574 .class_init = virtio_pci_bus_class_init,
2575 };
2576
virtio_pci_register_types(void)2577 static void virtio_pci_register_types(void)
2578 {
2579 /* Base types: */
2580 type_register_static(&virtio_pci_bus_info);
2581 type_register_static(&virtio_pci_info);
2582 }
2583
2584 type_init(virtio_pci_register_types)
2585
2586