| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/clang/test/CodeGen/RISCV/rvv-intrinsics/ |
| H A D | vmsne.c | 139 size_t vl) { in test_vmsne_vv_i16mf4_b64()
158 size_t vl) { in test_vmsne_vv_i16mf2_b32()
249 size_t vl) { in test_vmsne_vv_i32mf2_b64()
538 size_t vl) { in test_vmsne_vv_u16mf4_b64()
557 size_t vl) { in test_vmsne_vv_u16mf2_b32()
648 size_t vl) { in test_vmsne_vv_u32mf2_b64()
1255 size_t vl) { in test_vmsne_vv_u8mf8_b64_m()
1276 size_t vl) { in test_vmsne_vv_u8mf4_b32_m()
1297 size_t vl) { in test_vmsne_vv_u8mf2_b16_m()
1442 size_t vl) { in test_vmsne_vv_u16m1_b16_m()
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| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/ |
| H A D | vmseq.c | 12 vbool64_t test_vmseq_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vmseq_vv_i8mf8_b64()
21 vbool64_t test_vmseq_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { in test_vmseq_vx_i8mf8_b64()
39 vbool32_t test_vmseq_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { in test_vmseq_vx_i8mf4_b32()
57 vbool16_t test_vmseq_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { in test_vmseq_vx_i8mf2_b16()
66 vbool8_t test_vmseq_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vmseq_vv_i8m1_b8()
75 vbool8_t test_vmseq_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { in test_vmseq_vx_i8m1_b8()
84 vbool4_t test_vmseq_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vmseq_vv_i8m2_b4()
93 vbool4_t test_vmseq_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { in test_vmseq_vx_i8m2_b4()
102 vbool2_t test_vmseq_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vmseq_vv_i8m4_b2()
111 vbool2_t test_vmseq_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { in test_vmseq_vx_i8m4_b2()
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| H A D | vmsge.c | 12 vbool64_t test_vmsge_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vmsge_vv_i8mf8_b64()
21 vbool64_t test_vmsge_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { in test_vmsge_vx_i8mf8_b64()
39 vbool32_t test_vmsge_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { in test_vmsge_vx_i8mf4_b32()
57 vbool16_t test_vmsge_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { in test_vmsge_vx_i8mf2_b16()
66 vbool8_t test_vmsge_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vmsge_vv_i8m1_b8()
75 vbool8_t test_vmsge_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { in test_vmsge_vx_i8m1_b8()
84 vbool4_t test_vmsge_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vmsge_vv_i8m2_b4()
93 vbool4_t test_vmsge_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { in test_vmsge_vx_i8m2_b4()
102 vbool2_t test_vmsge_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vmsge_vv_i8m4_b2()
111 vbool2_t test_vmsge_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { in test_vmsge_vx_i8m4_b2()
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| H A D | vmslt.c | 12 vbool64_t test_vmslt_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vmslt_vv_i8mf8_b64()
21 vbool64_t test_vmslt_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { in test_vmslt_vx_i8mf8_b64()
39 vbool32_t test_vmslt_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { in test_vmslt_vx_i8mf4_b32()
57 vbool16_t test_vmslt_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { in test_vmslt_vx_i8mf2_b16()
66 vbool8_t test_vmslt_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vmslt_vv_i8m1_b8()
75 vbool8_t test_vmslt_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { in test_vmslt_vx_i8m1_b8()
84 vbool4_t test_vmslt_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vmslt_vv_i8m2_b4()
93 vbool4_t test_vmslt_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { in test_vmslt_vx_i8m2_b4()
102 vbool2_t test_vmslt_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vmslt_vv_i8m4_b2()
111 vbool2_t test_vmslt_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { in test_vmslt_vx_i8m4_b2()
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| H A D | vmsgt.c | 12 vbool64_t test_vmsgt_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vmsgt_vv_i8mf8_b64()
21 vbool64_t test_vmsgt_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { in test_vmsgt_vx_i8mf8_b64()
39 vbool32_t test_vmsgt_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { in test_vmsgt_vx_i8mf4_b32()
57 vbool16_t test_vmsgt_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { in test_vmsgt_vx_i8mf2_b16()
66 vbool8_t test_vmsgt_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vmsgt_vv_i8m1_b8()
75 vbool8_t test_vmsgt_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { in test_vmsgt_vx_i8m1_b8()
84 vbool4_t test_vmsgt_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vmsgt_vv_i8m2_b4()
93 vbool4_t test_vmsgt_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { in test_vmsgt_vx_i8m2_b4()
102 vbool2_t test_vmsgt_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vmsgt_vv_i8m4_b2()
111 vbool2_t test_vmsgt_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { in test_vmsgt_vx_i8m4_b2()
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| H A D | vmsle.c | 12 vbool64_t test_vmsle_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vmsle_vv_i8mf8_b64()
21 vbool64_t test_vmsle_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { in test_vmsle_vx_i8mf8_b64()
39 vbool32_t test_vmsle_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { in test_vmsle_vx_i8mf4_b32()
57 vbool16_t test_vmsle_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { in test_vmsle_vx_i8mf2_b16()
66 vbool8_t test_vmsle_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vmsle_vv_i8m1_b8()
75 vbool8_t test_vmsle_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { in test_vmsle_vx_i8m1_b8()
84 vbool4_t test_vmsle_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vmsle_vv_i8m2_b4()
93 vbool4_t test_vmsle_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { in test_vmsle_vx_i8m2_b4()
102 vbool2_t test_vmsle_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vmsle_vv_i8m4_b2()
111 vbool2_t test_vmsle_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { in test_vmsle_vx_i8m4_b2()
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| H A D | vmsne.c | 12 vbool64_t test_vmsne_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vmsne_vv_i8mf8_b64()
21 vbool64_t test_vmsne_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { in test_vmsne_vx_i8mf8_b64()
39 vbool32_t test_vmsne_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { in test_vmsne_vx_i8mf4_b32()
57 vbool16_t test_vmsne_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { in test_vmsne_vx_i8mf2_b16()
66 vbool8_t test_vmsne_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vmsne_vv_i8m1_b8()
75 vbool8_t test_vmsne_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { in test_vmsne_vx_i8m1_b8()
84 vbool4_t test_vmsne_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vmsne_vv_i8m2_b4()
93 vbool4_t test_vmsne_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { in test_vmsne_vx_i8m2_b4()
102 vbool2_t test_vmsne_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vmsne_vv_i8m4_b2()
111 vbool2_t test_vmsne_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { in test_vmsne_vx_i8m4_b2()
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| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/clang/test/CodeGen/RISCV/rvv-intrinsics/ |
| H A D | vmax.c | 13 vint8mf8_t test_vmax_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vmax_vv_i8mf8()
23 vint8mf8_t test_vmax_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { in test_vmax_vx_i8mf8()
43 vint8mf4_t test_vmax_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { in test_vmax_vx_i8mf4()
63 vint8mf2_t test_vmax_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { in test_vmax_vx_i8mf2()
73 vint8m1_t test_vmax_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vmax_vv_i8m1()
83 vint8m1_t test_vmax_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { in test_vmax_vx_i8m1()
93 vint8m2_t test_vmax_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vmax_vv_i8m2()
103 vint8m2_t test_vmax_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { in test_vmax_vx_i8m2()
113 vint8m4_t test_vmax_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vmax_vv_i8m4()
123 vint8m4_t test_vmax_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { in test_vmax_vx_i8m4()
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| H A D | vmsne.c | 154 size_t vl) { in test_vmsne_vv_i16mf4_b64()
175 size_t vl) { in test_vmsne_vv_i16mf2_b32()
276 size_t vl) { in test_vmsne_vv_i32mf2_b64()
597 size_t vl) { in test_vmsne_vv_u16mf4_b64()
618 size_t vl) { in test_vmsne_vv_u16mf2_b32()
719 size_t vl) { in test_vmsne_vv_u32mf2_b64()
1388 size_t vl) { in test_vmsne_vv_u8mf8_b64_m()
1411 size_t vl) { in test_vmsne_vv_u8mf4_b32_m()
1434 size_t vl) { in test_vmsne_vv_u8mf2_b16_m()
1593 size_t vl) { in test_vmsne_vv_u16m1_b16_m()
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| H A D | vasub.c | 594 size_t vl) { in test_vasubu_vv_u16mf4()
615 size_t vl) { in test_vasubu_vv_u16mf2()
716 size_t vl) { in test_vasubu_vv_u32mf2()
1052 size_t vl) { in test_vasub_vv_i16mf4_m()
1075 size_t vl) { in test_vasub_vv_i16mf2_m()
1186 size_t vl) { in test_vasub_vv_i32mf2_m()
1385 size_t vl) { in test_vasubu_vv_u8mf8_m()
1408 size_t vl) { in test_vasubu_vv_u8mf4_m()
1431 size_t vl) { in test_vasubu_vv_u8mf2_m()
1590 size_t vl) { in test_vasubu_vv_u16m1_m()
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| H A D | vmseq.c | 154 size_t vl) { in test_vmseq_vv_i16mf4_b64()
175 size_t vl) { in test_vmseq_vv_i16mf2_b32()
276 size_t vl) { in test_vmseq_vv_i32mf2_b64()
597 size_t vl) { in test_vmseq_vv_u16mf4_b64()
618 size_t vl) { in test_vmseq_vv_u16mf2_b32()
719 size_t vl) { in test_vmseq_vv_u32mf2_b64()
1388 size_t vl) { in test_vmseq_vv_u8mf8_b64_m()
1411 size_t vl) { in test_vmseq_vv_u8mf4_b32_m()
1434 size_t vl) { in test_vmseq_vv_u8mf2_b16_m()
1593 size_t vl) { in test_vmseq_vv_u16m1_b16_m()
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| H A D | vor.c | 13 vint8mf8_t test_vor_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vor_vv_i8mf8()
23 vint8mf8_t test_vor_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { in test_vor_vx_i8mf8()
43 vint8mf4_t test_vor_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { in test_vor_vx_i8mf4()
63 vint8mf2_t test_vor_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { in test_vor_vx_i8mf2()
73 vint8m1_t test_vor_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vor_vv_i8m1()
83 vint8m1_t test_vor_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { in test_vor_vx_i8m1()
93 vint8m2_t test_vor_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vor_vv_i8m2()
103 vint8m2_t test_vor_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { in test_vor_vx_i8m2()
113 vint8m4_t test_vor_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vor_vv_i8m4()
123 vint8m4_t test_vor_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { in test_vor_vx_i8m4()
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| H A D | vsadd.c | 594 size_t vl) { in test_vsaddu_vv_u16mf4()
615 size_t vl) { in test_vsaddu_vv_u16mf2()
716 size_t vl) { in test_vsaddu_vv_u32mf2()
1052 size_t vl) { in test_vsadd_vv_i16mf4_m()
1075 size_t vl) { in test_vsadd_vv_i16mf2_m()
1186 size_t vl) { in test_vsadd_vv_i32mf2_m()
1385 size_t vl) { in test_vsaddu_vv_u8mf8_m()
1408 size_t vl) { in test_vsaddu_vv_u8mf4_m()
1431 size_t vl) { in test_vsaddu_vv_u8mf2_m()
1590 size_t vl) { in test_vsaddu_vv_u16m1_m()
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| H A D | vmsge.c | 13 vbool64_t test_vmsge_vv_i8mf8_b64 (vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vmsge_vv_i8mf8_b64()
23 vbool64_t test_vmsge_vx_i8mf8_b64 (vint8mf8_t op1, int8_t op2, size_t vl) { in test_vmsge_vx_i8mf8_b64()
43 vbool32_t test_vmsge_vx_i8mf4_b32 (vint8mf4_t op1, int8_t op2, size_t vl) { in test_vmsge_vx_i8mf4_b32()
63 vbool16_t test_vmsge_vx_i8mf2_b16 (vint8mf2_t op1, int8_t op2, size_t vl) { in test_vmsge_vx_i8mf2_b16()
73 vbool8_t test_vmsge_vv_i8m1_b8 (vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vmsge_vv_i8m1_b8()
83 vbool8_t test_vmsge_vx_i8m1_b8 (vint8m1_t op1, int8_t op2, size_t vl) { in test_vmsge_vx_i8m1_b8()
93 vbool4_t test_vmsge_vv_i8m2_b4 (vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vmsge_vv_i8m2_b4()
103 vbool4_t test_vmsge_vx_i8m2_b4 (vint8m2_t op1, int8_t op2, size_t vl) { in test_vmsge_vx_i8m2_b4()
113 vbool2_t test_vmsge_vv_i8m4_b2 (vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vmsge_vv_i8m4_b2()
123 vbool2_t test_vmsge_vx_i8m4_b2 (vint8m4_t op1, int8_t op2, size_t vl) { in test_vmsge_vx_i8m4_b2()
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| H A D | vmsle.c | 154 size_t vl) { in test_vmsle_vv_i16mf4_b64()
175 size_t vl) { in test_vmsle_vv_i16mf2_b32()
276 size_t vl) { in test_vmsle_vv_i32mf2_b64()
457 size_t vl) { in test_vmsleu_vv_u8mf8_b64()
478 size_t vl) { in test_vmsleu_vv_u8mf4_b32()
499 size_t vl) { in test_vmsleu_vv_u8mf2_b16()
642 size_t vl) { in test_vmsleu_vv_u16m1_b16()
744 size_t vl) { in test_vmsleu_vv_u32m1_b32()
765 size_t vl) { in test_vmsleu_vv_u32m2_b16()
826 size_t vl) { in test_vmsleu_vv_u64m1_b64()
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| H A D | vrem.c | 13 vint8mf8_t test_vrem_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vrem_vv_i8mf8()
23 vint8mf8_t test_vrem_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { in test_vrem_vx_i8mf8()
43 vint8mf4_t test_vrem_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { in test_vrem_vx_i8mf4()
63 vint8mf2_t test_vrem_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { in test_vrem_vx_i8mf2()
73 vint8m1_t test_vrem_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vrem_vv_i8m1()
83 vint8m1_t test_vrem_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { in test_vrem_vx_i8m1()
93 vint8m2_t test_vrem_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vrem_vv_i8m2()
103 vint8m2_t test_vrem_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { in test_vrem_vx_i8m2()
113 vint8m4_t test_vrem_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vrem_vv_i8m4()
123 vint8m4_t test_vrem_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { in test_vrem_vx_i8m4()
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| H A D | vssub.c | 594 size_t vl) { in test_vssubu_vv_u16mf4()
615 size_t vl) { in test_vssubu_vv_u16mf2()
716 size_t vl) { in test_vssubu_vv_u32mf2()
1052 size_t vl) { in test_vssub_vv_i16mf4_m()
1075 size_t vl) { in test_vssub_vv_i16mf2_m()
1186 size_t vl) { in test_vssub_vv_i32mf2_m()
1385 size_t vl) { in test_vssubu_vv_u8mf8_m()
1408 size_t vl) { in test_vssubu_vv_u8mf4_m()
1431 size_t vl) { in test_vssubu_vv_u8mf2_m()
1590 size_t vl) { in test_vssubu_vv_u16m1_m()
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| H A D | vadd.c | 14 vint8mf8_t test_vadd_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vadd_vv_i8mf8()
24 vint8mf8_t test_vadd_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { in test_vadd_vx_i8mf8()
44 vint8mf4_t test_vadd_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { in test_vadd_vx_i8mf4()
64 vint8mf2_t test_vadd_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { in test_vadd_vx_i8mf2()
74 vint8m1_t test_vadd_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vadd_vv_i8m1()
84 vint8m1_t test_vadd_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { in test_vadd_vx_i8m1()
94 vint8m2_t test_vadd_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vadd_vv_i8m2()
104 vint8m2_t test_vadd_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { in test_vadd_vx_i8m2()
114 vint8m4_t test_vadd_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vadd_vv_i8m4()
124 vint8m4_t test_vadd_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { in test_vadd_vx_i8m4()
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| H A D | vmin.c | 13 vint8mf8_t test_vmin_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vmin_vv_i8mf8()
23 vint8mf8_t test_vmin_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { in test_vmin_vx_i8mf8()
43 vint8mf4_t test_vmin_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { in test_vmin_vx_i8mf4()
63 vint8mf2_t test_vmin_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { in test_vmin_vx_i8mf2()
73 vint8m1_t test_vmin_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vmin_vv_i8m1()
83 vint8m1_t test_vmin_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { in test_vmin_vx_i8m1()
93 vint8m2_t test_vmin_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vmin_vv_i8m2()
103 vint8m2_t test_vmin_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { in test_vmin_vx_i8m2()
113 vint8m4_t test_vmin_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vmin_vv_i8m4()
123 vint8m4_t test_vmin_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { in test_vmin_vx_i8m4()
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| H A D | vmsgt.c | 13 vbool64_t test_vmsgt_vv_i8mf8_b64 (vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vmsgt_vv_i8mf8_b64()
23 vbool64_t test_vmsgt_vx_i8mf8_b64 (vint8mf8_t op1, int8_t op2, size_t vl) { in test_vmsgt_vx_i8mf8_b64()
43 vbool32_t test_vmsgt_vx_i8mf4_b32 (vint8mf4_t op1, int8_t op2, size_t vl) { in test_vmsgt_vx_i8mf4_b32()
63 vbool16_t test_vmsgt_vx_i8mf2_b16 (vint8mf2_t op1, int8_t op2, size_t vl) { in test_vmsgt_vx_i8mf2_b16()
73 vbool8_t test_vmsgt_vv_i8m1_b8 (vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vmsgt_vv_i8m1_b8()
83 vbool8_t test_vmsgt_vx_i8m1_b8 (vint8m1_t op1, int8_t op2, size_t vl) { in test_vmsgt_vx_i8m1_b8()
93 vbool4_t test_vmsgt_vv_i8m2_b4 (vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vmsgt_vv_i8m2_b4()
103 vbool4_t test_vmsgt_vx_i8m2_b4 (vint8m2_t op1, int8_t op2, size_t vl) { in test_vmsgt_vx_i8m2_b4()
113 vbool2_t test_vmsgt_vv_i8m4_b2 (vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vmsgt_vv_i8m4_b2()
123 vbool2_t test_vmsgt_vx_i8m4_b2 (vint8m4_t op1, int8_t op2, size_t vl) { in test_vmsgt_vx_i8m4_b2()
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| H A D | vmslt.c | 154 size_t vl) { in test_vmslt_vv_i16mf4_b64()
175 size_t vl) { in test_vmslt_vv_i16mf2_b32()
276 size_t vl) { in test_vmslt_vv_i32mf2_b64()
457 size_t vl) { in test_vmsltu_vv_u8mf8_b64()
478 size_t vl) { in test_vmsltu_vv_u8mf4_b32()
499 size_t vl) { in test_vmsltu_vv_u8mf2_b16()
642 size_t vl) { in test_vmsltu_vv_u16m1_b16()
744 size_t vl) { in test_vmsltu_vv_u32m1_b32()
765 size_t vl) { in test_vmsltu_vv_u32m2_b16()
826 size_t vl) { in test_vmsltu_vv_u64m1_b64()
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| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/ |
| H A D | vasub.c | 594 size_t vl) { in test_vasubu_vv_u16mf4()
615 size_t vl) { in test_vasubu_vv_u16mf2()
716 size_t vl) { in test_vasubu_vv_u32mf2()
1052 size_t vl) { in test_vasub_vv_i16mf4_m()
1075 size_t vl) { in test_vasub_vv_i16mf2_m()
1186 size_t vl) { in test_vasub_vv_i32mf2_m()
1385 size_t vl) { in test_vasubu_vv_u8mf8_m()
1408 size_t vl) { in test_vasubu_vv_u8mf4_m()
1431 size_t vl) { in test_vasubu_vv_u8mf2_m()
1590 size_t vl) { in test_vasubu_vv_u16m1_m()
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| H A D | vmseq.c | 154 size_t vl) { in test_vmseq_vv_i16mf4_b64()
175 size_t vl) { in test_vmseq_vv_i16mf2_b32()
276 size_t vl) { in test_vmseq_vv_i32mf2_b64()
597 size_t vl) { in test_vmseq_vv_u16mf4_b64()
618 size_t vl) { in test_vmseq_vv_u16mf2_b32()
719 size_t vl) { in test_vmseq_vv_u32mf2_b64()
1388 size_t vl) { in test_vmseq_vv_u8mf8_b64_m()
1411 size_t vl) { in test_vmseq_vv_u8mf4_b32_m()
1434 size_t vl) { in test_vmseq_vv_u8mf2_b16_m()
1593 size_t vl) { in test_vmseq_vv_u16m1_b16_m()
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| H A D | vmsgt.c | 13 vbool64_t test_vmsgt_vv_i8mf8_b64 (vint8mf8_t op1, vint8mf8_t op2, size_t vl) { in test_vmsgt_vv_i8mf8_b64()
23 vbool64_t test_vmsgt_vx_i8mf8_b64 (vint8mf8_t op1, int8_t op2, size_t vl) { in test_vmsgt_vx_i8mf8_b64()
43 vbool32_t test_vmsgt_vx_i8mf4_b32 (vint8mf4_t op1, int8_t op2, size_t vl) { in test_vmsgt_vx_i8mf4_b32()
63 vbool16_t test_vmsgt_vx_i8mf2_b16 (vint8mf2_t op1, int8_t op2, size_t vl) { in test_vmsgt_vx_i8mf2_b16()
73 vbool8_t test_vmsgt_vv_i8m1_b8 (vint8m1_t op1, vint8m1_t op2, size_t vl) { in test_vmsgt_vv_i8m1_b8()
83 vbool8_t test_vmsgt_vx_i8m1_b8 (vint8m1_t op1, int8_t op2, size_t vl) { in test_vmsgt_vx_i8m1_b8()
93 vbool4_t test_vmsgt_vv_i8m2_b4 (vint8m2_t op1, vint8m2_t op2, size_t vl) { in test_vmsgt_vv_i8m2_b4()
103 vbool4_t test_vmsgt_vx_i8m2_b4 (vint8m2_t op1, int8_t op2, size_t vl) { in test_vmsgt_vx_i8m2_b4()
113 vbool2_t test_vmsgt_vv_i8m4_b2 (vint8m4_t op1, vint8m4_t op2, size_t vl) { in test_vmsgt_vv_i8m4_b2()
123 vbool2_t test_vmsgt_vx_i8m4_b2 (vint8m4_t op1, int8_t op2, size_t vl) { in test_vmsgt_vx_i8m4_b2()
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| H A D | vsll.c | 13 vint8mf8_t test_vsll_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { in test_vsll_vv_i8mf8()
23 vint8mf8_t test_vsll_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf8()
43 vint8mf4_t test_vsll_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf4()
63 vint8mf2_t test_vsll_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8mf2()
73 vint8m1_t test_vsll_vv_i8m1(vint8m1_t op1, vuint8m1_t shift, size_t vl) { in test_vsll_vv_i8m1()
83 vint8m1_t test_vsll_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8m1()
93 vint8m2_t test_vsll_vv_i8m2(vint8m2_t op1, vuint8m2_t shift, size_t vl) { in test_vsll_vv_i8m2()
103 vint8m2_t test_vsll_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8m2()
113 vint8m4_t test_vsll_vv_i8m4(vint8m4_t op1, vuint8m4_t shift, size_t vl) { in test_vsll_vv_i8m4()
123 vint8m4_t test_vsll_vx_i8m4(vint8m4_t op1, size_t shift, size_t vl) { in test_vsll_vx_i8m4()
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