1 /* $OpenBSD: float.h,v 1.8 2012/06/25 16:55:13 deraadt Exp $ */ 2 /* 3 (c) Copyright 1986 HEWLETT-PACKARD COMPANY 4 To anyone who acknowledges that this file is provided "AS IS" 5 without any express or implied warranty: 6 permission to use, copy, modify, and distribute this file 7 for any purpose is hereby granted without fee, provided that 8 the above copyright notice and this notice appears in all 9 copies, and that the name of Hewlett-Packard Company not be 10 used in advertising or publicity pertaining to distribution 11 of the software without specific, written prior permission. 12 Hewlett-Packard Company makes no representations about the 13 suitability of this software for any purpose. 14 */ 15 /* @(#)float.h: Revision: 2.14.88.2 Date: 93/12/08 13:27:42 */ 16 17 #include "fpbits.h" 18 #include "hppa.h" 19 20 /* 21 * Declare the basic structures for the 3 different 22 * floating-point precisions. 23 * 24 * Single number 25 * +-------+-------+-------+-------+-------+-------+-------+-------+ 26 * |s| exp | mantissa | 27 * +-------+-------+-------+-------+-------+-------+-------+-------+ 28 */ 29 #define Sall(object) (object) 30 #define Ssign(object) Bitfield_extract( 0, 1,object) 31 #define Ssignedsign(object) Bitfield_signed_extract( 0, 1,object) 32 #define Sexponent(object) Bitfield_extract( 1, 8,object) 33 #define Smantissa(object) Bitfield_mask( 9, 23,object) 34 #define Ssignaling(object) Bitfield_extract( 9, 1,object) 35 #define Ssignalingnan(object) Bitfield_extract( 1, 9,object) 36 #define Shigh2mantissa(object) Bitfield_extract( 9, 2,object) 37 #define Sexponentmantissa(object) Bitfield_mask( 1, 31,object) 38 #define Ssignexponent(object) Bitfield_extract( 0, 9,object) 39 #define Shidden(object) Bitfield_extract( 8, 1,object) 40 #define Shiddenoverflow(object) Bitfield_extract( 7, 1,object) 41 #define Shiddenhigh7mantissa(object) Bitfield_extract( 8, 8,object) 42 #define Shiddenhigh3mantissa(object) Bitfield_extract( 8, 4,object) 43 #define Slow(object) Bitfield_mask( 31, 1,object) 44 #define Slow4(object) Bitfield_mask( 28, 4,object) 45 #define Slow31(object) Bitfield_mask( 1, 31,object) 46 #define Shigh31(object) Bitfield_extract( 0, 31,object) 47 #define Ssignedhigh31(object) Bitfield_signed_extract( 0, 31,object) 48 #define Shigh4(object) Bitfield_extract( 0, 4,object) 49 #define Sbit24(object) Bitfield_extract( 24, 1,object) 50 #define Sbit28(object) Bitfield_extract( 28, 1,object) 51 #define Sbit29(object) Bitfield_extract( 29, 1,object) 52 #define Sbit30(object) Bitfield_extract( 30, 1,object) 53 #define Sbit31(object) Bitfield_mask( 31, 1,object) 54 55 #define Deposit_ssign(object,value) Bitfield_deposit(value,0,1,object) 56 #define Deposit_sexponent(object,value) Bitfield_deposit(value,1,8,object) 57 #define Deposit_smantissa(object,value) Bitfield_deposit(value,9,23,object) 58 #define Deposit_shigh2mantissa(object,value) Bitfield_deposit(value,9,2,object) 59 #define Deposit_sexponentmantissa(object,value) \ 60 Bitfield_deposit(value,1,31,object) 61 #define Deposit_ssignexponent(object,value) Bitfield_deposit(value,0,9,object) 62 #define Deposit_slow(object,value) Bitfield_deposit(value,31,1,object) 63 #define Deposit_shigh4(object,value) Bitfield_deposit(value,0,4,object) 64 65 #define Is_ssign(object) Bitfield_mask( 0, 1,object) 66 #define Is_ssignaling(object) Bitfield_mask( 9, 1,object) 67 #define Is_shidden(object) Bitfield_mask( 8, 1,object) 68 #define Is_shiddenoverflow(object) Bitfield_mask( 7, 1,object) 69 #define Is_slow(object) Bitfield_mask( 31, 1,object) 70 #define Is_sbit24(object) Bitfield_mask( 24, 1,object) 71 #define Is_sbit28(object) Bitfield_mask( 28, 1,object) 72 #define Is_sbit29(object) Bitfield_mask( 29, 1,object) 73 #define Is_sbit30(object) Bitfield_mask( 30, 1,object) 74 #define Is_sbit31(object) Bitfield_mask( 31, 1,object) 75 76 /* 77 * Double number. 78 * +-------+-------+-------+-------+-------+-------+-------+-------+ 79 * |s| exponent | mantissa part 1 | 80 * +-------+-------+-------+-------+-------+-------+-------+-------+ 81 * 82 * +-------+-------+-------+-------+-------+-------+-------+-------+ 83 * | mantissa part 2 | 84 * +-------+-------+-------+-------+-------+-------+-------+-------+ 85 */ 86 #define Dallp1(object) (object) 87 #define Dsign(object) Bitfield_extract( 0, 1,object) 88 #define Dsignedsign(object) Bitfield_signed_extract( 0, 1,object) 89 #define Dexponent(object) Bitfield_extract( 1, 11,object) 90 #define Dmantissap1(object) Bitfield_mask( 12, 20,object) 91 #define Dsignaling(object) Bitfield_extract( 12, 1,object) 92 #define Dsignalingnan(object) Bitfield_extract( 1, 12,object) 93 #define Dhigh2mantissa(object) Bitfield_extract( 12, 2,object) 94 #define Dexponentmantissap1(object) Bitfield_mask( 1, 31,object) 95 #define Dsignexponent(object) Bitfield_extract( 0, 12,object) 96 #define Dhidden(object) Bitfield_extract( 11, 1,object) 97 #define Dhiddenoverflow(object) Bitfield_extract( 10, 1,object) 98 #define Dhiddenhigh7mantissa(object) Bitfield_extract( 11, 8,object) 99 #define Dhiddenhigh3mantissa(object) Bitfield_extract( 11, 4,object) 100 #define Dlowp1(object) Bitfield_mask( 31, 1,object) 101 #define Dlow31p1(object) Bitfield_mask( 1, 31,object) 102 #define Dhighp1(object) Bitfield_extract( 0, 1,object) 103 #define Dhigh4p1(object) Bitfield_extract( 0, 4,object) 104 #define Dhigh31p1(object) Bitfield_extract( 0, 31,object) 105 #define Dsignedhigh31p1(object) Bitfield_signed_extract( 0, 31,object) 106 #define Dbit3p1(object) Bitfield_extract( 3, 1,object) 107 108 #define Deposit_dsign(object,value) Bitfield_deposit(value,0,1,object) 109 #define Deposit_dexponent(object,value) Bitfield_deposit(value,1,11,object) 110 #define Deposit_dmantissap1(object,value) Bitfield_deposit(value,12,20,object) 111 #define Deposit_dhigh2mantissa(object,value) Bitfield_deposit(value,12,2,object) 112 #define Deposit_dexponentmantissap1(object,value) \ 113 Bitfield_deposit(value,1,31,object) 114 #define Deposit_dsignexponent(object,value) Bitfield_deposit(value,0,12,object) 115 #define Deposit_dlowp1(object,value) Bitfield_deposit(value,31,1,object) 116 #define Deposit_dhigh4p1(object,value) Bitfield_deposit(value,0,4,object) 117 118 #define Is_dsign(object) Bitfield_mask( 0, 1,object) 119 #define Is_dsignaling(object) Bitfield_mask( 12, 1,object) 120 #define Is_dhidden(object) Bitfield_mask( 11, 1,object) 121 #define Is_dhiddenoverflow(object) Bitfield_mask( 10, 1,object) 122 #define Is_dlowp1(object) Bitfield_mask( 31, 1,object) 123 #define Is_dhighp1(object) Bitfield_mask( 0, 1,object) 124 #define Is_dbit3p1(object) Bitfield_mask( 3, 1,object) 125 126 #define Dallp2(object) (object) 127 #define Dmantissap2(object) (object) 128 #define Dlowp2(object) Bitfield_mask( 31, 1,object) 129 #define Dlow4p2(object) Bitfield_mask( 28, 4,object) 130 #define Dlow31p2(object) Bitfield_mask( 1, 31,object) 131 #define Dhighp2(object) Bitfield_extract( 0, 1,object) 132 #define Dhigh31p2(object) Bitfield_extract( 0, 31,object) 133 #define Dbit2p2(object) Bitfield_extract( 2, 1,object) 134 #define Dbit3p2(object) Bitfield_extract( 3, 1,object) 135 #define Dbit21p2(object) Bitfield_extract( 21, 1,object) 136 #define Dbit28p2(object) Bitfield_extract( 28, 1,object) 137 #define Dbit29p2(object) Bitfield_extract( 29, 1,object) 138 #define Dbit30p2(object) Bitfield_extract( 30, 1,object) 139 #define Dbit31p2(object) Bitfield_mask( 31, 1,object) 140 141 #define Deposit_dlowp2(object,value) Bitfield_deposit(value,31,1,object) 142 143 #define Is_dlowp2(object) Bitfield_mask( 31, 1,object) 144 #define Is_dhighp2(object) Bitfield_mask( 0, 1,object) 145 #define Is_dbit2p2(object) Bitfield_mask( 2, 1,object) 146 #define Is_dbit3p2(object) Bitfield_mask( 3, 1,object) 147 #define Is_dbit21p2(object) Bitfield_mask( 21, 1,object) 148 #define Is_dbit28p2(object) Bitfield_mask( 28, 1,object) 149 #define Is_dbit29p2(object) Bitfield_mask( 29, 1,object) 150 #define Is_dbit30p2(object) Bitfield_mask( 30, 1,object) 151 #define Is_dbit31p2(object) Bitfield_mask( 31, 1,object) 152 153 /* 154 * Quad number. 155 * +-------+-------+-------+-------+-------+-------+-------+-------+ 156 * |s| exponent | mantissa part 1 | 157 * +-------+-------+-------+-------+-------+-------+-------+-------+ 158 * 159 * +-------+-------+-------+-------+-------+-------+-------+-------+ 160 * | mantissa part 2 | 161 * +-------+-------+-------+-------+-------+-------+-------+-------+ 162 * 163 * +-------+-------+-------+-------+-------+-------+-------+-------+ 164 * | mantissa part 3 | 165 * +-------+-------+-------+-------+-------+-------+-------+-------+ 166 * 167 * +-------+-------+-------+-------+-------+-------+-------+-------+ 168 * | mantissa part 4 | 169 * +-------+-------+-------+-------+-------+-------+-------+-------+ 170 */ 171 typedef struct 172 { 173 union 174 { 175 struct { unsigned qallp1; } u_qallp1; 176 /* Not needed for now... 177 Bitfield_extract( 0, 1,u_qsign,qsign) 178 Bitfield_signed_extract( 0, 1,u_qsignedsign,qsignedsign) 179 Bitfield_extract( 1, 15,u_qexponent,qexponent) 180 Bitfield_extract(16, 16,u_qmantissap1,qmantissap1) 181 Bitfield_extract(16, 1,u_qsignaling,qsignaling) 182 Bitfield_extract(1, 16,u_qsignalingnan,qsignalingnan) 183 Bitfield_extract(16, 2,u_qhigh2mantissa,qhigh2mantissa) 184 Bitfield_extract( 1, 31,u_qexponentmantissap1,qexponentmantissap1) 185 Bitfield_extract( 0, 16,u_qsignexponent,qsignexponent) 186 Bitfield_extract(15, 1,u_qhidden,qhidden) 187 Bitfield_extract(14, 1,u_qhiddenoverflow,qhiddenoverflow) 188 Bitfield_extract(15, 8,u_qhiddenhigh7mantissa,qhiddenhigh7mantissa) 189 Bitfield_extract(15, 4,u_qhiddenhigh3mantissa,qhiddenhigh3mantissa) 190 Bitfield_extract(31, 1,u_qlowp1,qlowp1) 191 Bitfield_extract( 1, 31,u_qlow31p1,qlow31p1) 192 Bitfield_extract( 0, 1,u_qhighp1,qhighp1) 193 Bitfield_extract( 0, 4,u_qhigh4p1,qhigh4p1) 194 Bitfield_extract( 0, 31,u_qhigh31p1,qhigh31p1) 195 */ 196 } quad_u1; 197 union 198 { 199 struct { unsigned qallp2; } u_qallp2; 200 /* Not needed for now... 201 Bitfield_extract(31, 1,u_qlowp2,qlowp2) 202 Bitfield_extract( 1, 31,u_qlow31p2,qlow31p2) 203 Bitfield_extract( 0, 1,u_qhighp2,qhighp2) 204 Bitfield_extract( 0, 31,u_qhigh31p2,qhigh31p2) 205 */ 206 } quad_u2; 207 union 208 { 209 struct { unsigned qallp3; } u_qallp3; 210 /* Not needed for now... 211 Bitfield_extract(31, 1,u_qlowp3,qlowp3) 212 Bitfield_extract( 1, 31,u_qlow31p3,qlow31p3) 213 Bitfield_extract( 0, 1,u_qhighp3,qhighp3) 214 Bitfield_extract( 0, 31,u_qhigh31p3,qhigh31p3) 215 */ 216 } quad_u3; 217 union 218 { 219 struct { unsigned qallp4; } u_qallp4; 220 /* Not need for now... 221 Bitfield_extract(31, 1,u_qlowp4,qlowp4) 222 Bitfield_extract( 1, 31,u_qlow31p4,qlow31p4) 223 Bitfield_extract( 0, 1,u_qhighp4,qhighp4) 224 Bitfield_extract( 0, 31,u_qhigh31p4,qhigh31p4) 225 */ 226 } quad_u4; 227 } quad_floating_point; 228 229 /* Extension - An additional structure to hold the guard, round and 230 * sticky bits during computations. 231 */ 232 #define Extall(object) (object) 233 #define Extsign(object) Bitfield_extract( 0, 1,object) 234 #define Exthigh31(object) Bitfield_extract( 0, 31,object) 235 #define Extlow31(object) Bitfield_extract( 1, 31,object) 236 #define Extlow(object) Bitfield_extract( 31, 1,object) 237 238 /* 239 * Declare the basic structures for the 3 different 240 * fixed-point precisions. 241 * 242 * Single number 243 * +-------+-------+-------+-------+-------+-------+-------+-------+ 244 * |s| integer | 245 * +-------+-------+-------+-------+-------+-------+-------+-------+ 246 */ 247 typedef int sgl_integer; 248 249 /* 250 * Double number. 251 * +-------+-------+-------+-------+-------+-------+-------+-------+ 252 * |s| high integer | 253 * +-------+-------+-------+-------+-------+-------+-------+-------+ 254 * 255 * +-------+-------+-------+-------+-------+-------+-------+-------+ 256 * | low integer | 257 * +-------+-------+-------+-------+-------+-------+-------+-------+ 258 */ 259 struct dint { 260 int wd0; 261 unsigned int wd1; 262 }; 263 264 struct dblwd { 265 unsigned int wd0; 266 unsigned int wd1; 267 }; 268 269 /* 270 * Quad number. 271 * +-------+-------+-------+-------+-------+-------+-------+-------+ 272 * |s| integer part1 | 273 * +-------+-------+-------+-------+-------+-------+-------+-------+ 274 * 275 * +-------+-------+-------+-------+-------+-------+-------+-------+ 276 * | integer part 2 | 277 * +-------+-------+-------+-------+-------+-------+-------+-------+ 278 * 279 * +-------+-------+-------+-------+-------+-------+-------+-------+ 280 * | integer part 3 | 281 * +-------+-------+-------+-------+-------+-------+-------+-------+ 282 * 283 * +-------+-------+-------+-------+-------+-------+-------+-------+ 284 * | integer part 4 | 285 * +-------+-------+-------+-------+-------+-------+-------+-------+ 286 */ 287 288 struct quadwd { 289 int wd0; 290 unsigned int wd1; 291 unsigned int wd2; 292 unsigned int wd3; 293 }; 294 295 typedef struct quadwd quad_integer; 296 297 298 /* useful typedefs */ 299 typedef int sgl_floating_point; 300 typedef struct dblwd dbl_floating_point; 301 typedef struct dint dbl_integer; 302 303 /* 304 * Define the different precisions' parameters. 305 */ 306 #define SGL_BITLENGTH 32 307 #define SGL_EMAX 127 308 #define SGL_BIAS 127 309 #define SGL_WRAP 192 310 #define SGL_INFINITY_EXPONENT (SGL_EMAX+SGL_BIAS+1) 311 #define SGL_THRESHOLD 32 312 #define SGL_EXP_LENGTH 8 313 #define SGL_P 24 314 315 #define DBL_BITLENGTH 64 316 #define DBL_EMAX 1023 317 #define DBL_BIAS 1023 318 #define DBL_WRAP 1536 319 #define DBL_INFINITY_EXPONENT (DBL_EMAX+DBL_BIAS+1) 320 #define DBL_THRESHOLD 64 321 #define DBL_EXP_LENGTH 11 322 #define DBL_P 53 323 324 #define QUAD_BITLENGTH 128 325 #define QUAD_EMAX 16383 326 #define QUAD_BIAS 16383 327 #define QUAD_WRAP 24576 328 #define QUAD_INFINITY_EXPONENT (QUAD_EMAX+QUAD_BIAS+1) 329 #define QUAD_P 113 330 331 /* Boolean Values etc. */ 332 #define FALSE 0 333 #define TRUE (!FALSE) 334 #define NOT ! 335 #define XOR ^ 336 337 /* Declare status register equivalent to FPUs architecture. 338 * 339 * 0 1 2 3 4 5 6 7 8 910 1 2 3 4 5 6 7 8 920 1 2 3 4 5 6 7 8 930 1 340 * +-------+-------+-------+-------+-------+-------+-------+-------+ 341 * |V|Z|O|U|I|C| rsv | model | version |RM |rsv|T|r|V|Z|O|U|I| 342 * +-------+-------+-------+-------+-------+-------+-------+-------+ 343 */ 344 #define Cbit(object) Bitfield_extract( 5, 1,object) 345 #define Tbit(object) Bitfield_extract( 25, 1,object) 346 #define Roundingmode(object) Bitfield_extract( 21, 2,object) 347 #define Invalidtrap(object) Bitfield_extract( 27, 1,object) 348 #define Divisionbyzerotrap(object) Bitfield_extract( 28, 1,object) 349 #define Overflowtrap(object) Bitfield_extract( 29, 1,object) 350 #define Underflowtrap(object) Bitfield_extract( 30, 1,object) 351 #define Inexacttrap(object) Bitfield_extract( 31, 1,object) 352 #define Invalidflag(object) Bitfield_extract( 0, 1,object) 353 #define Divisionbyzeroflag(object) Bitfield_extract( 1, 1,object) 354 #define Overflowflag(object) Bitfield_extract( 2, 1,object) 355 #define Underflowflag(object) Bitfield_extract( 3, 1,object) 356 #define Inexactflag(object) Bitfield_extract( 4, 1,object) 357 #define Allflags(object) Bitfield_extract( 0, 5,object) 358 359 /* Definitions relevant to the status register */ 360 361 /* Rounding Modes */ 362 #define ROUNDNEAREST 0 363 #define ROUNDZERO 1 364 #define ROUNDPLUS 2 365 #define ROUNDMINUS 3 366 367 /* Exceptions */ 368 #define NOEXCEPTION 0x0 369 #define INVALIDEXCEPTION 0x20 370 #define DIVISIONBYZEROEXCEPTION 0x10 371 #define OVERFLOWEXCEPTION 0x08 372 #define UNDERFLOWEXCEPTION 0x04 373 #define INEXACTEXCEPTION 0x02 374 #define UNIMPLEMENTEDEXCEPTION 0x01 375 376 /* Declare exception registers equivalent to FPUs architecture 377 * 378 * 0 1 2 3 4 5 6 7 8 910 1 2 3 4 5 6 7 8 920 1 2 3 4 5 6 7 8 930 1 379 * +-------+-------+-------+-------+-------+-------+-------+-------+ 380 * |excepttype | r1 | r2/ext | operation |parm |n| t/cond | 381 * +-------+-------+-------+-------+-------+-------+-------+-------+ 382 */ 383 #define Allexception(object) (object) 384 #define Exceptiontype(object) Bitfield_extract( 0, 6,object) 385 #define Instructionfield(object) Bitfield_mask( 6,26,object) 386 #define Parmfield(object) Bitfield_extract( 23, 3,object) 387 #define Rabit(object) Bitfield_extract( 24, 1,object) 388 #define Ibit(object) Bitfield_extract( 25, 1,object) 389 390 #define Set_exceptiontype(object,value) Bitfield_deposit(value, 0, 6,object) 391 #define Set_parmfield(object,value) Bitfield_deposit(value, 23, 3,object) 392 #define Set_exceptiontype_and_instr_field(exception,instruction,object) \ 393 object = ((exception) << 26) | (instruction) 394 395 /* Declare the condition field 396 * 397 * 0 1 2 3 4 5 6 7 8 910 1 2 3 4 5 6 7 8 920 1 2 3 4 5 6 7 8 930 1 398 * +-------+-------+-------+-------+-------+-------+-------+-------+ 399 * | |G|L|E|U|X| 400 * +-------+-------+-------+-------+-------+-------+-------+-------+ 401 */ 402 #define Allexception(object) (object) 403 #define Greaterthanbit(object) Bitfield_extract( 27, 1,object) 404 #define Lessthanbit(object) Bitfield_extract( 28, 1,object) 405 #define Equalbit(object) Bitfield_extract( 29, 1,object) 406 #define Unorderedbit(object) Bitfield_extract( 30, 1,object) 407 #define Exceptionbit(object) Bitfield_extract( 31, 1,object) 408 409 /* An alias name for the status register */ 410 #define Fpustatus_register (*status) 411 412 /************************************************** 413 * Status register referencing and manipulation. * 414 **************************************************/ 415 416 /* Rounding mode */ 417 #define Rounding_mode() Roundingmode(Fpustatus_register) 418 #define Is_rounding_mode(rmode) \ 419 (Roundingmode(Fpustatus_register) == rmode) 420 #define Set_rounding_mode(value) \ 421 Bitfield_deposit(value,21,2,Fpustatus_register) 422 423 /* Boolean testing of the trap enable bits */ 424 #define Is_invalidtrap_enabled() Invalidtrap(Fpustatus_register) 425 #define Is_divisionbyzerotrap_enabled() Divisionbyzerotrap(Fpustatus_register) 426 #define Is_overflowtrap_enabled() Overflowtrap(Fpustatus_register) 427 #define Is_underflowtrap_enabled() Underflowtrap(Fpustatus_register) 428 #define Is_inexacttrap_enabled() Inexacttrap(Fpustatus_register) 429 430 /* Set the indicated flags in the status register */ 431 #define Set_invalidflag() Bitfield_deposit(1,0,1,Fpustatus_register) 432 #define Set_divisionbyzeroflag() Bitfield_deposit(1,1,1,Fpustatus_register) 433 #define Set_overflowflag() Bitfield_deposit(1,2,1,Fpustatus_register) 434 #define Set_underflowflag() Bitfield_deposit(1,3,1,Fpustatus_register) 435 #define Set_inexactflag() Bitfield_deposit(1,4,1,Fpustatus_register) 436 437 #define Clear_all_flags() Bitfield_deposit(0,0,5,Fpustatus_register) 438 439 /* Manipulate the trap and condition code bits (tbit and cbit) */ 440 #define Set_tbit() Bitfield_deposit(1,25,1,Fpustatus_register) 441 #define Clear_tbit() Bitfield_deposit(0,25,1,Fpustatus_register) 442 #define Is_tbit_set() Tbit(Fpustatus_register) 443 #define Is_cbit_set() Cbit(Fpustatus_register) 444 445 #ifdef TIMEX 446 #define Set_status_cbit(value) \ 447 Bitfield_deposit(Bitfield_extract(10,10,Fpustatus_register),11,10,Fpustatus_register); \ 448 Bitfield_deposit(Bitfield_extract(5,1,Fpustatus_register),10,1,Fpustatus_register); \ 449 Bitfield_deposit(value,5,1,Fpustatus_register) 450 #else 451 #define Set_status_cbit(value) Bitfield_deposit(value,5,1,Fpustatus_register) 452 #endif 453 454 /******************************* 455 * Condition field referencing * 456 *******************************/ 457 #define Unordered(cond) Unorderedbit(cond) 458 #define Equal(cond) Equalbit(cond) 459 #define Lessthan(cond) Lessthanbit(cond) 460 #define Greaterthan(cond) Greaterthanbit(cond) 461 #define Exception(cond) Exceptionbit(cond) 462 463 464 /* Defines for the extension */ 465 #define Ext_isone_sign(extent) (Extsign(extent)) 466 #define Ext_isnotzero(extent) \ 467 (Extall(extent)) 468 #define Ext_isnotzero_lower(extent) \ 469 (Extlow31(extent)) 470 #define Ext_leftshiftby1(extent) \ 471 Extall(extent) <<= 1 472 #define Ext_negate(extent) \ 473 (int )Extall(extent) = 0 - (int )Extall(extent) 474 #define Ext_setone_low(extent) Bitfield_deposit(1,31,1,extent) 475