1 /// @file xed-encoder-3.c
2
3 // This file was automatically generated.
4 // Do not edit this file.
5
6 /*BEGIN_LEGAL
7
8 Copyright (c) 2018 Intel Corporation
9
10 Licensed under the Apache License, Version 2.0 (the "License");
11 you may not use this file except in compliance with the License.
12 You may obtain a copy of the License at
13
14 http://www.apache.org/licenses/LICENSE-2.0
15
16 Unless required by applicable law or agreed to in writing, software
17 distributed under the License is distributed on an "AS IS" BASIS,
18 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
19 See the License for the specific language governing permissions and
20 limitations under the License.
21
22 END_LEGAL */
23 #include "xed-internal-header.h"
24 #include "xed-encoder.h"
25 #include "xed-encode-private.h"
26 #include "xed-enc-operand-lu.h"
27 #include "xed-operand-accessors.h"
xed_encode_nonterminal_REX_PREFIX_ENC_EMIT(xed_encoder_request_t * xes)28 xed_uint_t xed_encode_nonterminal_REX_PREFIX_ENC_EMIT(xed_encoder_request_t* xes)
29 {
30 /* REX_PREFIX_ENC()::
31 MODE=2 NOREX=0 NEEDREX=1 REXW[w]=* REXB[b]=* REXX[x]=* REXR[r]=* -> emit 0b0100 emit_type=numeric value=0x4 nbits=4 emit wrxb emit_type=letters nbits=4
32 MODE=2 NOREX=0 REX=1 REXW[w]=* REXB[b]=* REXX[x]=* REXR[r]=* -> emit 0b0100 emit_type=numeric value=0x4 nbits=4 emit wrxb emit_type=letters nbits=4
33 MODE=2 NOREX=0 REXW[w]=1 REXB[b]=* REXX[x]=* REXR[r]=* -> emit 0b0100 emit_type=numeric value=0x4 nbits=4 emit wrxb emit_type=letters nbits=4
34 MODE=2 NOREX=0 REXW[w]=* REXB[b]=1 REXX[x]=* REXR[r]=* -> emit 0b0100 emit_type=numeric value=0x4 nbits=4 emit wrxb emit_type=letters nbits=4
35 MODE=2 NOREX=0 REXW[w]=* REXB[b]=* REXX[x]=1 REXR[r]=* -> emit 0b0100 emit_type=numeric value=0x4 nbits=4 emit wrxb emit_type=letters nbits=4
36 MODE=2 NOREX=0 REXW[w]=* REXB[b]=* REXX[x]=* REXR[r]=1 -> emit 0b0100 emit_type=numeric value=0x4 nbits=4 emit wrxb emit_type=letters nbits=4
37 MODE=2 NEEDREX=0 REX=0 REXW=0 REXB=0 REXX=0 REXR=0 -> nothing
38 MODE=1 REX=0 REXW=0 REXB=0 REXX=0 REXR=0 -> nothing
39 MODE=0 REX=0 REXW=0 REXB=0 REXX=0 REXR=0 -> nothing
40 MODE=2 NOREX=1 NEEDREX=1 -> FB ERROR=XED_ERROR_GENERAL_ERROR
41 MODE=2 NOREX=1 REX=1 -> FB ERROR=XED_ERROR_GENERAL_ERROR
42 MODE=2 NOREX=1 REXW=1 -> FB ERROR=XED_ERROR_GENERAL_ERROR
43 MODE=2 NOREX=1 REXB=1 -> FB ERROR=XED_ERROR_GENERAL_ERROR
44 MODE=2 NOREX=1 REXX=1 -> FB ERROR=XED_ERROR_GENERAL_ERROR
45 MODE=2 NOREX=1 REXR=1 -> FB ERROR=XED_ERROR_GENERAL_ERROR
46 */
47 xed_uint_t okay=1;
48 unsigned int iform = xed_encoder_request_iforms(xes)->x_REX_PREFIX_ENC;
49 /* 1 */ if (iform==1) {
50 xed_encoder_request_encode_emit(xes,4,0x4);
51 xed_encoder_request_encode_emit(xes,4,(xed3_operand_get_rexw(xes)<< 3)|(xed3_operand_get_rexr(xes)<< 2)|(xed3_operand_get_rexx(xes)<< 1)|(xed3_operand_get_rexb(xes)));
52 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
53 return okay;
54 }
55 /* 2 */ if (iform==2) {
56 xed_encoder_request_encode_emit(xes,4,0x4);
57 xed_encoder_request_encode_emit(xes,4,(xed3_operand_get_rexw(xes)<< 3)|(xed3_operand_get_rexr(xes)<< 2)|(xed3_operand_get_rexx(xes)<< 1)|(xed3_operand_get_rexb(xes)));
58 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
59 return okay;
60 }
61 /* 3 */ if (iform==3) {
62 xed_encoder_request_encode_emit(xes,4,0x4);
63 xed_encoder_request_encode_emit(xes,4,(xed3_operand_get_rexw(xes)<< 3)|(xed3_operand_get_rexr(xes)<< 2)|(xed3_operand_get_rexx(xes)<< 1)|(xed3_operand_get_rexb(xes)));
64 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
65 return okay;
66 }
67 /* 4 */ if (iform==4) {
68 xed_encoder_request_encode_emit(xes,4,0x4);
69 xed_encoder_request_encode_emit(xes,4,(xed3_operand_get_rexw(xes)<< 3)|(xed3_operand_get_rexr(xes)<< 2)|(xed3_operand_get_rexx(xes)<< 1)|(xed3_operand_get_rexb(xes)));
70 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
71 return okay;
72 }
73 /* 5 */ if (iform==5) {
74 xed_encoder_request_encode_emit(xes,4,0x4);
75 xed_encoder_request_encode_emit(xes,4,(xed3_operand_get_rexw(xes)<< 3)|(xed3_operand_get_rexr(xes)<< 2)|(xed3_operand_get_rexx(xes)<< 1)|(xed3_operand_get_rexb(xes)));
76 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
77 return okay;
78 }
79 /* 6 */ if (iform==6) {
80 xed_encoder_request_encode_emit(xes,4,0x4);
81 xed_encoder_request_encode_emit(xes,4,(xed3_operand_get_rexw(xes)<< 3)|(xed3_operand_get_rexr(xes)<< 2)|(xed3_operand_get_rexx(xes)<< 1)|(xed3_operand_get_rexb(xes)));
82 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
83 return okay;
84 }
85 /* 7 */ if (1) { /* nothing */
86 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
87 return okay;
88 }
89 if (1) { /*otherwise*/
90 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
91 return okay;
92 }
93 return 0; /*pacify the compiler*/
94 (void) okay;
95 (void) xes;
96 (void) iform;
97 }
xed_encode_nonterminal_DISP_WIDTH_0_EMIT(xed_encoder_request_t * xes)98 xed_uint_t xed_encode_nonterminal_DISP_WIDTH_0_EMIT(xed_encoder_request_t* xes)
99 {
100 /* DISP_WIDTH_0()::
101 DISP_WIDTH=0 -> nothing
102 */
103 xed_uint_t okay=1;
104 return 1;
105 (void) okay;
106 (void) xes;
107 }
xed_encode_nonterminal_FIXUP_EASZ_ENC_EMIT(xed_encoder_request_t * xes)108 xed_uint_t xed_encode_nonterminal_FIXUP_EASZ_ENC_EMIT(xed_encoder_request_t* xes)
109 {
110 /* FIXUP_EASZ_ENC()::
111 MODE=0 EASZ=0 -> FB EASZ=1 value=0x1
112 MODE=1 EASZ=0 -> FB EASZ=2 value=0x2
113 MODE=2 EASZ=0 -> FB EASZ=3 value=0x3
114 */
115 xed_uint_t okay=1;
116 return 1;
117 (void) okay;
118 (void) xes;
119 }
xed_encode_nonterminal_DISP_WIDTH_0_8_16_EMIT(xed_encoder_request_t * xes)120 xed_uint_t xed_encode_nonterminal_DISP_WIDTH_0_8_16_EMIT(xed_encoder_request_t* xes)
121 {
122 /* DISP_WIDTH_0_8_16()::
123 DISP_WIDTH=0 -> nothing
124 DISP_WIDTH=8 -> nothing
125 DISP_WIDTH=16 -> nothing
126 */
127 xed_uint_t okay=1;
128 return 1;
129 (void) okay;
130 (void) xes;
131 }
xed_encode_nonterminal_FIX_ROUND_LEN128_EMIT(xed_encoder_request_t * xes)132 xed_uint_t xed_encode_nonterminal_FIX_ROUND_LEN128_EMIT(xed_encoder_request_t* xes)
133 {
134 /* FIX_ROUND_LEN128()::
135 */
136 xed_uint_t okay=1;
137 return 1;
138 (void) okay;
139 (void) xes;
140 }
xed_encode_nonterminal_VEX_REXR_ENC_EMIT(xed_encoder_request_t * xes)141 xed_uint_t xed_encode_nonterminal_VEX_REXR_ENC_EMIT(xed_encoder_request_t* xes)
142 {
143 /* VEX_REXR_ENC()::
144 MODE=2 REXR=1 -> emit 0b0 emit_type=numeric value=0x0 nbits=1
145 MODE=2 REXR=0 -> emit 0b1 emit_type=numeric value=0x1 nbits=1
146 MODE!=2 REXR=0 -> emit 0b1 emit_type=numeric value=0x1 nbits=1
147 MODE!=2 REXR=1 -> FB ERROR=XED_ERROR_GENERAL_ERROR
148 */
149 xed_uint_t okay=1;
150 unsigned int iform = xed_encoder_request_iforms(xes)->x_VEX_REXR_ENC;
151 /* 7 */ if (iform==7) {
152 xed_encoder_request_encode_emit(xes,1,0x0);
153 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
154 return okay;
155 }
156 /* 3 */ if (iform==3) {
157 xed_encoder_request_encode_emit(xes,1,0x1);
158 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
159 return okay;
160 }
161 /* 2 */ if (iform==2) {
162 xed_encoder_request_encode_emit(xes,1,0x1);
163 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
164 return okay;
165 }
166 if (1) { /*otherwise*/
167 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
168 return okay;
169 }
170 return 0; /*pacify the compiler*/
171 (void) okay;
172 (void) xes;
173 (void) iform;
174 }
xed_encode_nonterminal_DISP_WIDTH_16_EMIT(xed_encoder_request_t * xes)175 xed_uint_t xed_encode_nonterminal_DISP_WIDTH_16_EMIT(xed_encoder_request_t* xes)
176 {
177 /* DISP_WIDTH_16()::
178 DISP_WIDTH=16 -> nothing
179 */
180 xed_uint_t okay=1;
181 return 1;
182 (void) okay;
183 (void) xes;
184 }
xed_encode_nonterminal_XOP_REXXB_ENC_EMIT(xed_encoder_request_t * xes)185 xed_uint_t xed_encode_nonterminal_XOP_REXXB_ENC_EMIT(xed_encoder_request_t* xes)
186 {
187 /* XOP_REXXB_ENC()::
188 MODE=2 REXX=0 REXB=0 -> emit 0b11 emit_type=numeric value=0x3 nbits=2
189 MODE=2 REXX=1 REXB=0 -> emit 0b01 emit_type=numeric value=0x1 nbits=2
190 MODE=2 REXX=0 REXB=1 -> emit 0b10 emit_type=numeric value=0x2 nbits=2
191 MODE=2 REXX=1 REXB=1 -> emit 0b00 emit_type=numeric value=0x0 nbits=2
192 MODE!=2 REXX=0 REXB=0 -> emit 0b11 emit_type=numeric value=0x3 nbits=2
193 MODE!=2 REXX=1 REXB=0 -> FB ERROR=XED_ERROR_GENERAL_ERROR
194 MODE!=2 REXX=0 REXB=1 -> FB ERROR=XED_ERROR_GENERAL_ERROR
195 MODE!=2 REXX=1 REXB=1 -> FB ERROR=XED_ERROR_GENERAL_ERROR
196 */
197 xed_uint_t okay=1;
198 unsigned int iform = xed_encoder_request_iforms(xes)->x_XOP_REXXB_ENC;
199 /* 3 */ if (iform==3) {
200 xed_encoder_request_encode_emit(xes,2,0x3);
201 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
202 return okay;
203 }
204 /* 11 */ if (iform==11) {
205 xed_encoder_request_encode_emit(xes,2,0x1);
206 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
207 return okay;
208 }
209 /* 7 */ if (iform==7) {
210 xed_encoder_request_encode_emit(xes,2,0x2);
211 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
212 return okay;
213 }
214 /* 15 */ if (iform==15) {
215 xed_encoder_request_encode_emit(xes,2,0x0);
216 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
217 return okay;
218 }
219 /* 1 */ if (iform==1) {
220 xed_encoder_request_encode_emit(xes,2,0x3);
221 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
222 return okay;
223 }
224 if (1) { /*otherwise*/
225 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
226 return okay;
227 }
228 return 0; /*pacify the compiler*/
229 (void) okay;
230 (void) xes;
231 (void) iform;
232 }
xed_encode_nonterminal_VSIB_ENC_SCALE_EMIT(xed_encoder_request_t * xes)233 xed_uint_t xed_encode_nonterminal_VSIB_ENC_SCALE_EMIT(xed_encoder_request_t* xes)
234 {
235 /* VSIB_ENC_SCALE()::
236 SCALE=0 -> FB SIBSCALE=0 value=0x0
237 SCALE=1 -> FB SIBSCALE=0 value=0x0
238 SCALE=2 -> FB SIBSCALE=1 value=0x1
239 SCALE=4 -> FB SIBSCALE=2 value=0x2
240 SCALE=8 -> FB SIBSCALE=3 value=0x3
241 */
242 xed_uint_t okay=1;
243 return 1;
244 (void) okay;
245 (void) xes;
246 }
xed_encode_nonterminal_MODRM_RM_ENCODE_EANOT16_SIB1_EMIT(xed_encoder_request_t * xes)247 xed_uint_t xed_encode_nonterminal_MODRM_RM_ENCODE_EANOT16_SIB1_EMIT(xed_encoder_request_t* xes)
248 {
249 /* MODRM_RM_ENCODE_EANOT16_SIB1()::
250 */
251 xed_uint_t okay=1;
252 return 1;
253 (void) okay;
254 (void) xes;
255 }
xed_encode_nonterminal_SIBINDEX_ENCODE_EMIT(xed_encoder_request_t * xes)256 xed_uint_t xed_encode_nonterminal_SIBINDEX_ENCODE_EMIT(xed_encoder_request_t* xes)
257 {
258 /* SIBINDEX_ENCODE()::
259 SIB=1 -> nt NT[SIBINDEX_ENCODE_SIB1]
260 SIB=0 -> nothing
261 */
262 xed_uint_t okay=1;
263 unsigned int iform = xed_encoder_request_iforms(xes)->x_SIBINDEX_ENCODE;
264 /* 2 */ if (iform==2) {
265 xed_encode_nonterminal_SIBINDEX_ENCODE_SIB1_EMIT(xes);
266 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
267 return okay;
268 }
269 /* 1 */ if (1) { /* nothing */
270 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
271 return okay;
272 }
273 if (1) { /*otherwise*/
274 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
275 return okay;
276 }
277 return 0; /*pacify the compiler*/
278 (void) okay;
279 (void) xes;
280 (void) iform;
281 }
xed_encode_nonterminal_ESIZE_64_BITS_EMIT(xed_encoder_request_t * xes)282 xed_uint_t xed_encode_nonterminal_ESIZE_64_BITS_EMIT(xed_encoder_request_t* xes)
283 {
284 /* ESIZE_64_BITS()::
285 */
286 xed_uint_t okay=1;
287 return 1;
288 (void) okay;
289 (void) xes;
290 }
xed_encode_nonterminal_EVEX_62_REXR_ENC_EMIT(xed_encoder_request_t * xes)291 xed_uint_t xed_encode_nonterminal_EVEX_62_REXR_ENC_EMIT(xed_encoder_request_t* xes)
292 {
293 /* EVEX_62_REXR_ENC()::
294 MODE=2 REXR=1 -> emit 0x62 emit_type=numeric value=0x62 nbits=8 emit 0b0 emit_type=numeric value=0x0 nbits=1
295 MODE=2 REXR=0 -> emit 0x62 emit_type=numeric value=0x62 nbits=8 emit 0b1 emit_type=numeric value=0x1 nbits=1
296 MODE=1 REXR=0 -> emit 0x62 emit_type=numeric value=0x62 nbits=8 emit 0b1 emit_type=numeric value=0x1 nbits=1
297 MODE=1 REXR=1 -> FB ERROR=XED_ERROR_GENERAL_ERROR
298 */
299 xed_uint_t okay=1;
300 unsigned int iform = xed_encoder_request_iforms(xes)->x_EVEX_62_REXR_ENC;
301 /* 5 */ if (iform==5) {
302 xed_encoder_request_encode_emit(xes,8,0x62);
303 xed_encoder_request_encode_emit(xes,1,0x0);
304 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
305 return okay;
306 }
307 /* 2 */ if (iform==2) {
308 xed_encoder_request_encode_emit(xes,8,0x62);
309 xed_encoder_request_encode_emit(xes,1,0x1);
310 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
311 return okay;
312 }
313 /* 4 */ if (iform==4) {
314 xed_encoder_request_encode_emit(xes,8,0x62);
315 xed_encoder_request_encode_emit(xes,1,0x1);
316 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
317 return okay;
318 }
319 if (1) { /*otherwise*/
320 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
321 return okay;
322 }
323 return 0; /*pacify the compiler*/
324 (void) okay;
325 (void) xes;
326 (void) iform;
327 }
xed_encode_nonterminal_NELEM_TUPLE1_WORD_EMIT(xed_encoder_request_t * xes)328 xed_uint_t xed_encode_nonterminal_NELEM_TUPLE1_WORD_EMIT(xed_encoder_request_t* xes)
329 {
330 /* NELEM_TUPLE1_WORD()::
331 */
332 xed_uint_t okay=1;
333 return 1;
334 (void) okay;
335 (void) xes;
336 }
xed_encode_nonterminal_NELEM_SCALAR_EMIT(xed_encoder_request_t * xes)337 xed_uint_t xed_encode_nonterminal_NELEM_SCALAR_EMIT(xed_encoder_request_t* xes)
338 {
339 /* NELEM_SCALAR()::
340 */
341 xed_uint_t okay=1;
342 return 1;
343 (void) okay;
344 (void) xes;
345 }
xed_encode_nonterminal_SIBINDEX_ENCODE_SIB1_EMIT(xed_encoder_request_t * xes)346 xed_uint_t xed_encode_nonterminal_SIBINDEX_ENCODE_SIB1_EMIT(xed_encoder_request_t* xes)
347 {
348 /* SIBINDEX_ENCODE_SIB1()::
349 INDEX=@ -> FB SIBINDEX=4 value=0x4 FB REXX=0 value=0x0
350 INDEX=XED_REG_AX EASZ=1 -> FB SIBINDEX=0 value=0x0 FB REXX=0 value=0x0
351 INDEX=XED_REG_EAX EASZ=2 -> FB SIBINDEX=0 value=0x0 FB REXX=0 value=0x0
352 INDEX=XED_REG_RAX EASZ=3 -> FB SIBINDEX=0 value=0x0 FB REXX=0 value=0x0
353 INDEX=XED_REG_R8W EASZ=1 -> FB SIBINDEX=0 value=0x0 FB REXX=1 value=0x1
354 INDEX=XED_REG_R8D EASZ=2 -> FB SIBINDEX=0 value=0x0 FB REXX=1 value=0x1
355 INDEX=XED_REG_R8 EASZ=3 -> FB SIBINDEX=0 value=0x0 FB REXX=1 value=0x1
356 INDEX=XED_REG_CX EASZ=1 -> FB SIBINDEX=1 value=0x1 FB REXX=0 value=0x0
357 INDEX=XED_REG_ECX EASZ=2 -> FB SIBINDEX=1 value=0x1 FB REXX=0 value=0x0
358 INDEX=XED_REG_RCX EASZ=3 -> FB SIBINDEX=1 value=0x1 FB REXX=0 value=0x0
359 INDEX=XED_REG_R9W EASZ=1 -> FB SIBINDEX=1 value=0x1 FB REXX=1 value=0x1
360 INDEX=XED_REG_R9D EASZ=2 -> FB SIBINDEX=1 value=0x1 FB REXX=1 value=0x1
361 INDEX=XED_REG_R9 EASZ=3 -> FB SIBINDEX=1 value=0x1 FB REXX=1 value=0x1
362 INDEX=XED_REG_DX EASZ=1 -> FB SIBINDEX=2 value=0x2 FB REXX=0 value=0x0
363 INDEX=XED_REG_EDX EASZ=2 -> FB SIBINDEX=2 value=0x2 FB REXX=0 value=0x0
364 INDEX=XED_REG_RDX EASZ=3 -> FB SIBINDEX=2 value=0x2 FB REXX=0 value=0x0
365 INDEX=XED_REG_R10W EASZ=1 -> FB SIBINDEX=2 value=0x2 FB REXX=1 value=0x1
366 INDEX=XED_REG_R10D EASZ=2 -> FB SIBINDEX=2 value=0x2 FB REXX=1 value=0x1
367 INDEX=XED_REG_R10 EASZ=3 -> FB SIBINDEX=2 value=0x2 FB REXX=1 value=0x1
368 INDEX=XED_REG_BX EASZ=1 -> FB SIBINDEX=3 value=0x3 FB REXX=0 value=0x0
369 INDEX=XED_REG_EBX EASZ=2 -> FB SIBINDEX=3 value=0x3 FB REXX=0 value=0x0
370 INDEX=XED_REG_RBX EASZ=3 -> FB SIBINDEX=3 value=0x3 FB REXX=0 value=0x0
371 INDEX=XED_REG_R11W EASZ=1 -> FB SIBINDEX=3 value=0x3 FB REXX=1 value=0x1
372 INDEX=XED_REG_R11D EASZ=2 -> FB SIBINDEX=3 value=0x3 FB REXX=1 value=0x1
373 INDEX=XED_REG_R11 EASZ=3 -> FB SIBINDEX=3 value=0x3 FB REXX=1 value=0x1
374 INDEX=XED_REG_R12W EASZ=1 -> FB SIBINDEX=4 value=0x4 FB REXX=1 value=0x1
375 INDEX=XED_REG_R12D EASZ=2 -> FB SIBINDEX=4 value=0x4 FB REXX=1 value=0x1
376 INDEX=XED_REG_R12 EASZ=3 -> FB SIBINDEX=4 value=0x4 FB REXX=1 value=0x1
377 INDEX=XED_REG_BP EASZ=1 -> FB SIBINDEX=5 value=0x5 FB REXX=0 value=0x0
378 INDEX=XED_REG_EBP EASZ=2 -> FB SIBINDEX=5 value=0x5 FB REXX=0 value=0x0
379 INDEX=XED_REG_RBP EASZ=3 -> FB SIBINDEX=5 value=0x5 FB REXX=0 value=0x0
380 INDEX=XED_REG_R13W EASZ=1 -> FB SIBINDEX=5 value=0x5 FB REXX=1 value=0x1
381 INDEX=XED_REG_R13D EASZ=2 -> FB SIBINDEX=5 value=0x5 FB REXX=1 value=0x1
382 INDEX=XED_REG_R13 EASZ=3 -> FB SIBINDEX=5 value=0x5 FB REXX=1 value=0x1
383 INDEX=XED_REG_SI EASZ=1 -> FB SIBINDEX=6 value=0x6 FB REXX=0 value=0x0
384 INDEX=XED_REG_ESI EASZ=2 -> FB SIBINDEX=6 value=0x6 FB REXX=0 value=0x0
385 INDEX=XED_REG_RSI EASZ=3 -> FB SIBINDEX=6 value=0x6 FB REXX=0 value=0x0
386 INDEX=XED_REG_R14W EASZ=1 -> FB SIBINDEX=6 value=0x6 FB REXX=1 value=0x1
387 INDEX=XED_REG_R14D EASZ=2 -> FB SIBINDEX=6 value=0x6 FB REXX=1 value=0x1
388 INDEX=XED_REG_R14 EASZ=3 -> FB SIBINDEX=6 value=0x6 FB REXX=1 value=0x1
389 INDEX=XED_REG_DI EASZ=1 -> FB SIBINDEX=7 value=0x7 FB REXX=0 value=0x0
390 INDEX=XED_REG_EDI EASZ=2 -> FB SIBINDEX=7 value=0x7 FB REXX=0 value=0x0
391 INDEX=XED_REG_RDI EASZ=3 -> FB SIBINDEX=7 value=0x7 FB REXX=0 value=0x0
392 INDEX=XED_REG_R15W EASZ=1 -> FB SIBINDEX=7 value=0x7 FB REXX=1 value=0x1
393 INDEX=XED_REG_R15D EASZ=2 -> FB SIBINDEX=7 value=0x7 FB REXX=1 value=0x1
394 INDEX=XED_REG_R15 EASZ=3 -> FB SIBINDEX=7 value=0x7 FB REXX=1 value=0x1
395 */
396 xed_uint_t okay=1;
397 return 1;
398 (void) okay;
399 (void) xes;
400 }
xed_encode_nonterminal_EVEX_REXX_ENC_EMIT(xed_encoder_request_t * xes)401 xed_uint_t xed_encode_nonterminal_EVEX_REXX_ENC_EMIT(xed_encoder_request_t* xes)
402 {
403 /* EVEX_REXX_ENC()::
404 MODE=2 REXX=1 -> emit 0b0 emit_type=numeric value=0x0 nbits=1
405 MODE=2 REXX=0 -> emit 0b1 emit_type=numeric value=0x1 nbits=1
406 MODE=1 REXX=0 -> emit 0b1 emit_type=numeric value=0x1 nbits=1
407 MODE=1 REXX=1 -> FB ERROR=XED_ERROR_GENERAL_ERROR
408 */
409 xed_uint_t okay=1;
410 unsigned int iform = xed_encoder_request_iforms(xes)->x_EVEX_REXX_ENC;
411 /* 5 */ if (iform==5) {
412 xed_encoder_request_encode_emit(xes,1,0x0);
413 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
414 return okay;
415 }
416 /* 2 */ if (iform==2) {
417 xed_encoder_request_encode_emit(xes,1,0x1);
418 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
419 return okay;
420 }
421 /* 4 */ if (iform==4) {
422 xed_encoder_request_encode_emit(xes,1,0x1);
423 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
424 return okay;
425 }
426 if (1) { /*otherwise*/
427 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
428 return okay;
429 }
430 return 0; /*pacify the compiler*/
431 (void) okay;
432 (void) xes;
433 (void) iform;
434 }
xed_encode_nonterminal_XOP_TYPE_ENC_EMIT(xed_encoder_request_t * xes)435 xed_uint_t xed_encode_nonterminal_XOP_TYPE_ENC_EMIT(xed_encoder_request_t* xes)
436 {
437 /* XOP_TYPE_ENC()::
438 MAP=8 -> emit 0x8F emit_type=numeric value=0x8f nbits=8
439 MAP=9 -> emit 0x8F emit_type=numeric value=0x8f nbits=8
440 MAP=10 -> emit 0x8F emit_type=numeric value=0x8f nbits=8
441 */
442 xed_uint_t okay=1;
443 unsigned int iform = xed_encoder_request_iforms(xes)->x_XOP_TYPE_ENC;
444 /* 1 */ if (iform==1) {
445 xed_encoder_request_encode_emit(xes,8,0x8f);
446 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
447 return okay;
448 }
449 /* 2 */ if (iform==2) {
450 xed_encoder_request_encode_emit(xes,8,0x8f);
451 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
452 return okay;
453 }
454 /* 3 */ if (iform==3) {
455 xed_encoder_request_encode_emit(xes,8,0x8f);
456 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
457 return okay;
458 }
459 if (1) { /*otherwise*/
460 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
461 return okay;
462 }
463 return 0; /*pacify the compiler*/
464 (void) okay;
465 (void) xes;
466 (void) iform;
467 }
xed_encode_nonterminal_ESIZE_8_BITS_EMIT(xed_encoder_request_t * xes)468 xed_uint_t xed_encode_nonterminal_ESIZE_8_BITS_EMIT(xed_encoder_request_t* xes)
469 {
470 /* ESIZE_8_BITS()::
471 */
472 xed_uint_t okay=1;
473 return 1;
474 (void) okay;
475 (void) xes;
476 }
xed_encode_nonterminal_NELEM_GPR_WRITER_STORE_BYTE_EMIT(xed_encoder_request_t * xes)477 xed_uint_t xed_encode_nonterminal_NELEM_GPR_WRITER_STORE_BYTE_EMIT(xed_encoder_request_t* xes)
478 {
479 /* NELEM_GPR_WRITER_STORE_BYTE()::
480 */
481 xed_uint_t okay=1;
482 return 1;
483 (void) okay;
484 (void) xes;
485 }
xed_encode_nonterminal_NELEM_MOVDDUP_EMIT(xed_encoder_request_t * xes)486 xed_uint_t xed_encode_nonterminal_NELEM_MOVDDUP_EMIT(xed_encoder_request_t* xes)
487 {
488 /* NELEM_MOVDDUP()::
489 */
490 xed_uint_t okay=1;
491 return 1;
492 (void) okay;
493 (void) xes;
494 }
xed_encode_nonterminal_IMMUNE66_EMIT(xed_encoder_request_t * xes)495 xed_uint_t xed_encode_nonterminal_IMMUNE66_EMIT(xed_encoder_request_t* xes)
496 {
497 /* IMMUNE66()::
498 MODE=0 -> FB EOSZ=2 value=0x2 FB DF32=1 value=0x1
499 */
500 xed_uint_t okay=1;
501 return 1;
502 (void) okay;
503 (void) xes;
504 }
xed_encode_nonterminal_SIBBASE_ENCODE_SIB1_EMIT(xed_encoder_request_t * xes)505 xed_uint_t xed_encode_nonterminal_SIBBASE_ENCODE_SIB1_EMIT(xed_encoder_request_t* xes)
506 {
507 /* SIBBASE_ENCODE_SIB1()::
508 BASE0=XED_REG_AX EASZ=1 -> FB SIBBASE=0 value=0x0 FB REXB=0 value=0x0
509 BASE0=XED_REG_EAX EASZ=2 -> FB SIBBASE=0 value=0x0 FB REXB=0 value=0x0
510 BASE0=XED_REG_RAX EASZ=3 -> FB SIBBASE=0 value=0x0 FB REXB=0 value=0x0
511 BASE0=XED_REG_R8W EASZ=1 -> FB SIBBASE=0 value=0x0 FB REXB=1 value=0x1
512 BASE0=XED_REG_R8D EASZ=2 -> FB SIBBASE=0 value=0x0 FB REXB=1 value=0x1
513 BASE0=XED_REG_R8 EASZ=3 -> FB SIBBASE=0 value=0x0 FB REXB=1 value=0x1
514 BASE0=XED_REG_CX EASZ=1 -> FB SIBBASE=1 value=0x1 FB REXB=0 value=0x0
515 BASE0=XED_REG_ECX EASZ=2 -> FB SIBBASE=1 value=0x1 FB REXB=0 value=0x0
516 BASE0=XED_REG_RCX EASZ=3 -> FB SIBBASE=1 value=0x1 FB REXB=0 value=0x0
517 BASE0=XED_REG_R9W EASZ=1 -> FB SIBBASE=1 value=0x1 FB REXB=1 value=0x1
518 BASE0=XED_REG_R9D EASZ=2 -> FB SIBBASE=1 value=0x1 FB REXB=1 value=0x1
519 BASE0=XED_REG_R9 EASZ=3 -> FB SIBBASE=1 value=0x1 FB REXB=1 value=0x1
520 BASE0=XED_REG_DX EASZ=1 -> FB SIBBASE=2 value=0x2 FB REXB=0 value=0x0
521 BASE0=XED_REG_EDX EASZ=2 -> FB SIBBASE=2 value=0x2 FB REXB=0 value=0x0
522 BASE0=XED_REG_RDX EASZ=3 -> FB SIBBASE=2 value=0x2 FB REXB=0 value=0x0
523 BASE0=XED_REG_R10W EASZ=1 -> FB SIBBASE=2 value=0x2 FB REXB=1 value=0x1
524 BASE0=XED_REG_R10D EASZ=2 -> FB SIBBASE=2 value=0x2 FB REXB=1 value=0x1
525 BASE0=XED_REG_R10 EASZ=3 -> FB SIBBASE=2 value=0x2 FB REXB=1 value=0x1
526 BASE0=XED_REG_BX EASZ=1 -> FB SIBBASE=3 value=0x3 FB REXB=0 value=0x0
527 BASE0=XED_REG_EBX EASZ=2 -> FB SIBBASE=3 value=0x3 FB REXB=0 value=0x0
528 BASE0=XED_REG_RBX EASZ=3 -> FB SIBBASE=3 value=0x3 FB REXB=0 value=0x0
529 BASE0=XED_REG_R11W EASZ=1 -> FB SIBBASE=3 value=0x3 FB REXB=1 value=0x1
530 BASE0=XED_REG_R11D EASZ=2 -> FB SIBBASE=3 value=0x3 FB REXB=1 value=0x1
531 BASE0=XED_REG_R11 EASZ=3 -> FB SIBBASE=3 value=0x3 FB REXB=1 value=0x1
532 BASE0=XED_REG_SP EASZ=1 -> FB SIBBASE=4 value=0x4 FB REXB=0 value=0x0
533 BASE0=XED_REG_ESP EASZ=2 -> FB SIBBASE=4 value=0x4 FB REXB=0 value=0x0
534 BASE0=XED_REG_RSP EASZ=3 -> FB SIBBASE=4 value=0x4 FB REXB=0 value=0x0
535 BASE0=XED_REG_R12W EASZ=1 -> FB SIBBASE=4 value=0x4 FB REXB=1 value=0x1
536 BASE0=XED_REG_R12D EASZ=2 -> FB SIBBASE=4 value=0x4 FB REXB=1 value=0x1
537 BASE0=XED_REG_R12 EASZ=3 -> FB SIBBASE=4 value=0x4 FB REXB=1 value=0x1
538 BASE0=XED_REG_SI EASZ=1 -> FB SIBBASE=6 value=0x6 FB REXB=0 value=0x0
539 BASE0=XED_REG_ESI EASZ=2 -> FB SIBBASE=6 value=0x6 FB REXB=0 value=0x0
540 BASE0=XED_REG_RSI EASZ=3 -> FB SIBBASE=6 value=0x6 FB REXB=0 value=0x0
541 BASE0=XED_REG_R14W EASZ=1 -> FB SIBBASE=6 value=0x6 FB REXB=1 value=0x1
542 BASE0=XED_REG_R14D EASZ=2 -> FB SIBBASE=6 value=0x6 FB REXB=1 value=0x1
543 BASE0=XED_REG_R14 EASZ=3 -> FB SIBBASE=6 value=0x6 FB REXB=1 value=0x1
544 BASE0=XED_REG_DI EASZ=1 -> FB SIBBASE=7 value=0x7 FB REXB=0 value=0x0
545 BASE0=XED_REG_EDI EASZ=2 -> FB SIBBASE=7 value=0x7 FB REXB=0 value=0x0
546 BASE0=XED_REG_RDI EASZ=3 -> FB SIBBASE=7 value=0x7 FB REXB=0 value=0x0
547 BASE0=XED_REG_R15W EASZ=1 -> FB SIBBASE=7 value=0x7 FB REXB=1 value=0x1
548 BASE0=XED_REG_R15D EASZ=2 -> FB SIBBASE=7 value=0x7 FB REXB=1 value=0x1
549 BASE0=XED_REG_R15 EASZ=3 -> FB SIBBASE=7 value=0x7 FB REXB=1 value=0x1
550 BASE0=@ -> nt NT[DISP_WIDTH_32] FB SIBBASE=5 value=0x5 FB REXB=0 value=0x0
551 BASE0=XED_REG_BP EASZ=1 -> nt NT[DISP_WIDTH_0_8_32] FB SIBBASE=5 value=0x5 FB REXB=0 value=0x0
552 BASE0=XED_REG_EBP EASZ=2 -> nt NT[DISP_WIDTH_0_8_32] FB SIBBASE=5 value=0x5 FB REXB=0 value=0x0
553 BASE0=XED_REG_RBP EASZ=3 -> nt NT[DISP_WIDTH_0_8_32] FB SIBBASE=5 value=0x5 FB REXB=0 value=0x0
554 BASE0=XED_REG_R13W EASZ=1 -> nt NT[DISP_WIDTH_0_8_32] FB SIBBASE=5 value=0x5 FB REXB=1 value=0x1
555 BASE0=XED_REG_R13D EASZ=2 -> nt NT[DISP_WIDTH_0_8_32] FB SIBBASE=5 value=0x5 FB REXB=1 value=0x1
556 BASE0=XED_REG_R13 EASZ=3 -> nt NT[DISP_WIDTH_0_8_32] FB SIBBASE=5 value=0x5 FB REXB=1 value=0x1
557 */
558 xed_uint_t okay=1;
559 unsigned int iform = xed_encoder_request_iforms(xes)->x_SIBBASE_ENCODE_SIB1;
560 /* 91 */ if (iform==91) {
561 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
562 return okay;
563 }
564 /* 14 */ if (iform==14) {
565 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
566 return okay;
567 }
568 /* 41 */ if (iform==41) {
569 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
570 return okay;
571 }
572 /* 28 */ if (iform==28) {
573 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
574 return okay;
575 }
576 /* 46 */ if (iform==46) {
577 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
578 return okay;
579 }
580 /* 73 */ if (iform==73) {
581 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
582 return okay;
583 }
584 /* 95 */ if (iform==95) {
585 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
586 return okay;
587 }
588 /* 18 */ if (iform==18) {
589 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
590 return okay;
591 }
592 /* 45 */ if (iform==45) {
593 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
594 return okay;
595 }
596 /* 32 */ if (iform==32) {
597 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
598 return okay;
599 }
600 /* 50 */ if (iform==50) {
601 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
602 return okay;
603 }
604 /* 77 */ if (iform==77) {
605 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
606 return okay;
607 }
608 /* 4 */ if (iform==4) {
609 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
610 return okay;
611 }
612 /* 22 */ if (iform==22) {
613 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
614 return okay;
615 }
616 /* 49 */ if (iform==49) {
617 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
618 return okay;
619 }
620 /* 36 */ if (iform==36) {
621 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
622 return okay;
623 }
624 /* 54 */ if (iform==54) {
625 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
626 return okay;
627 }
628 /* 81 */ if (iform==81) {
629 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
630 return okay;
631 }
632 /* 8 */ if (iform==8) {
633 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
634 return okay;
635 }
636 /* 26 */ if (iform==26) {
637 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
638 return okay;
639 }
640 /* 53 */ if (iform==53) {
641 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
642 return okay;
643 }
644 /* 40 */ if (iform==40) {
645 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
646 return okay;
647 }
648 /* 58 */ if (iform==58) {
649 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
650 return okay;
651 }
652 /* 85 */ if (iform==85) {
653 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
654 return okay;
655 }
656 /* 12 */ if (iform==12) {
657 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
658 return okay;
659 }
660 /* 30 */ if (iform==30) {
661 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
662 return okay;
663 }
664 /* 57 */ if (iform==57) {
665 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
666 return okay;
667 }
668 /* 44 */ if (iform==44) {
669 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
670 return okay;
671 }
672 /* 62 */ if (iform==62) {
673 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
674 return okay;
675 }
676 /* 89 */ if (iform==89) {
677 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
678 return okay;
679 }
680 /* 20 */ if (iform==20) {
681 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
682 return okay;
683 }
684 /* 38 */ if (iform==38) {
685 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
686 return okay;
687 }
688 /* 65 */ if (iform==65) {
689 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
690 return okay;
691 }
692 /* 52 */ if (iform==52) {
693 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
694 return okay;
695 }
696 /* 70 */ if (iform==70) {
697 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
698 return okay;
699 }
700 /* 97 */ if (iform==97) {
701 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
702 return okay;
703 }
704 /* 24 */ if (iform==24) {
705 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
706 return okay;
707 }
708 /* 42 */ if (iform==42) {
709 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
710 return okay;
711 }
712 /* 69 */ if (iform==69) {
713 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
714 return okay;
715 }
716 /* 56 */ if (iform==56) {
717 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
718 return okay;
719 }
720 /* 74 */ if (iform==74) {
721 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
722 return okay;
723 }
724 /* 101 */ if (iform==101) {
725 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
726 return okay;
727 }
728 /* 13 */ if (iform==13) {
729 xed_encode_nonterminal_DISP_WIDTH_32_EMIT(xes);
730 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
731 return okay;
732 }
733 /* 16 */ if (iform==16) {
734 xed_encode_nonterminal_DISP_WIDTH_0_8_32_EMIT(xes);
735 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
736 return okay;
737 }
738 /* 34 */ if (iform==34) {
739 xed_encode_nonterminal_DISP_WIDTH_0_8_32_EMIT(xes);
740 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
741 return okay;
742 }
743 /* 61 */ if (iform==61) {
744 xed_encode_nonterminal_DISP_WIDTH_0_8_32_EMIT(xes);
745 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
746 return okay;
747 }
748 /* 48 */ if (iform==48) {
749 xed_encode_nonterminal_DISP_WIDTH_0_8_32_EMIT(xes);
750 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
751 return okay;
752 }
753 /* 66 */ if (iform==66) {
754 xed_encode_nonterminal_DISP_WIDTH_0_8_32_EMIT(xes);
755 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
756 return okay;
757 }
758 /* 93 */ if (iform==93) {
759 xed_encode_nonterminal_DISP_WIDTH_0_8_32_EMIT(xes);
760 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
761 return okay;
762 }
763 if (1) { /*otherwise*/
764 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
765 return okay;
766 }
767 return 0; /*pacify the compiler*/
768 (void) okay;
769 (void) xes;
770 (void) iform;
771 }
xed_encode_nonterminal_CR_WIDTH_EMIT(xed_encoder_request_t * xes)772 xed_uint_t xed_encode_nonterminal_CR_WIDTH_EMIT(xed_encoder_request_t* xes)
773 {
774 /* CR_WIDTH()::
775 MODE=0 -> FB DF32=1 value=0x1 FB EOSZ=2 value=0x2
776 MODE=2 -> FB DF64=1 value=0x1 FB EOSZ=3 value=0x3
777 MODE=1 -> nothing
778 */
779 xed_uint_t okay=1;
780 return 1;
781 (void) okay;
782 (void) xes;
783 }
xed_encode_nonterminal_NELEM_GPR_READER_WORD_EMIT(xed_encoder_request_t * xes)784 xed_uint_t xed_encode_nonterminal_NELEM_GPR_READER_WORD_EMIT(xed_encoder_request_t* xes)
785 {
786 /* NELEM_GPR_READER_WORD()::
787 */
788 xed_uint_t okay=1;
789 return 1;
790 (void) okay;
791 (void) xes;
792 }
xed_encode_nonterminal_VEX_MAP_ENC_EMIT(xed_encoder_request_t * xes)793 xed_uint_t xed_encode_nonterminal_VEX_MAP_ENC_EMIT(xed_encoder_request_t* xes)
794 {
795 /* VEX_MAP_ENC()::
796 VEX_C4=1 MAP=0 REXW[w]=* -> emit 0b0_0000 emit_type=numeric value=0x0 nbits=5 emit w emit_type=letters nbits=1
797 VEX_C4=1 MAP=1 REXW[w]=* -> emit 0b0_0001 emit_type=numeric value=0x1 nbits=5 emit w emit_type=letters nbits=1
798 VEX_C4=1 MAP=2 REXW[w]=* -> emit 0b0_0010 emit_type=numeric value=0x2 nbits=5 emit w emit_type=letters nbits=1
799 VEX_C4=1 MAP=3 REXW[w]=* -> emit 0b0_0011 emit_type=numeric value=0x3 nbits=5 emit w emit_type=letters nbits=1
800 */
801 xed_uint_t okay=1;
802 unsigned int iform = xed_encoder_request_iforms(xes)->x_VEX_MAP_ENC;
803 /* 1 */ if (iform==1) {
804 xed_encoder_request_encode_emit(xes,5,0x0);
805 xed_encoder_request_encode_emit(xes,1,(xed3_operand_get_rexw(xes)));
806 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
807 return okay;
808 }
809 /* 2 */ if (iform==2) {
810 xed_encoder_request_encode_emit(xes,5,0x1);
811 xed_encoder_request_encode_emit(xes,1,(xed3_operand_get_rexw(xes)));
812 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
813 return okay;
814 }
815 /* 3 */ if (iform==3) {
816 xed_encoder_request_encode_emit(xes,5,0x2);
817 xed_encoder_request_encode_emit(xes,1,(xed3_operand_get_rexw(xes)));
818 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
819 return okay;
820 }
821 /* 4 */ if (iform==4) {
822 xed_encoder_request_encode_emit(xes,5,0x3);
823 xed_encoder_request_encode_emit(xes,1,(xed3_operand_get_rexw(xes)));
824 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
825 return okay;
826 }
827 if (1) { /*otherwise*/
828 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
829 return okay;
830 }
831 return 0; /*pacify the compiler*/
832 (void) okay;
833 (void) xes;
834 (void) iform;
835 }
xed_encode_nonterminal_MODRM_MOD_EA64_DISP8_EMIT(xed_encoder_request_t * xes)836 xed_uint_t xed_encode_nonterminal_MODRM_MOD_EA64_DISP8_EMIT(xed_encoder_request_t* xes)
837 {
838 /* MODRM_MOD_EA64_DISP8()::
839 BASE0=XED_REG_RAX -> FB MOD=1 value=0x1
840 BASE0=XED_REG_RBX -> FB MOD=1 value=0x1
841 BASE0=XED_REG_RCX -> FB MOD=1 value=0x1
842 BASE0=XED_REG_RDX -> FB MOD=1 value=0x1
843 BASE0=XED_REG_RSP -> FB MOD=1 value=0x1
844 BASE0=XED_REG_RBP -> FB MOD=1 value=0x1
845 BASE0=XED_REG_RSI -> FB MOD=1 value=0x1
846 BASE0=XED_REG_RDI -> FB MOD=1 value=0x1
847 BASE0=XED_REG_R8 -> FB MOD=1 value=0x1
848 BASE0=XED_REG_R9 -> FB MOD=1 value=0x1
849 BASE0=XED_REG_R10 -> FB MOD=1 value=0x1
850 BASE0=XED_REG_R11 -> FB MOD=1 value=0x1
851 BASE0=XED_REG_R12 -> FB MOD=1 value=0x1
852 BASE0=XED_REG_R13 -> FB MOD=1 value=0x1
853 BASE0=XED_REG_R14 -> FB MOD=1 value=0x1
854 BASE0=XED_REG_R15 -> FB MOD=1 value=0x1
855 */
856 xed_uint_t okay=1;
857 return 1;
858 (void) okay;
859 (void) xes;
860 }
xed_encode_nonterminal_MODRM_MOD_EA64_DISP0_EMIT(xed_encoder_request_t * xes)861 xed_uint_t xed_encode_nonterminal_MODRM_MOD_EA64_DISP0_EMIT(xed_encoder_request_t* xes)
862 {
863 /* MODRM_MOD_EA64_DISP0()::
864 BASE0=XED_REG_RAX -> FB MOD=0 value=0x0
865 BASE0=XED_REG_RBX -> FB MOD=0 value=0x0
866 BASE0=XED_REG_RCX -> FB MOD=0 value=0x0
867 BASE0=XED_REG_RDX -> FB MOD=0 value=0x0
868 BASE0=XED_REG_RSI -> FB MOD=0 value=0x0
869 BASE0=XED_REG_RDI -> FB MOD=0 value=0x0
870 BASE0=XED_REG_RSP -> FB MOD=0 value=0x0
871 BASE0=XED_REG_R8 -> FB MOD=0 value=0x0
872 BASE0=XED_REG_R9 -> FB MOD=0 value=0x0
873 BASE0=XED_REG_R10 -> FB MOD=0 value=0x0
874 BASE0=XED_REG_R11 -> FB MOD=0 value=0x0
875 BASE0=XED_REG_R12 -> FB MOD=0 value=0x0
876 BASE0=XED_REG_R14 -> FB MOD=0 value=0x0
877 BASE0=XED_REG_R15 -> FB MOD=0 value=0x0
878 BASE0=XED_REG_EIP -> FB MOD=0 value=0x0 FB DISP_WIDTH=32 value=0x20 FB DISP=0 value=0x0
879 BASE0=XED_REG_RIP -> FB MOD=0 value=0x0 FB DISP_WIDTH=32 value=0x20 FB DISP=0 value=0x0
880 BASE0=XED_REG_RBP -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
881 BASE0=XED_REG_R13 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
882 */
883 xed_uint_t okay=1;
884 return 1;
885 (void) okay;
886 (void) xes;
887 }
xed_encode_nonterminal_NELEM_TUPLE2_EMIT(xed_encoder_request_t * xes)888 xed_uint_t xed_encode_nonterminal_NELEM_TUPLE2_EMIT(xed_encoder_request_t* xes)
889 {
890 /* NELEM_TUPLE2()::
891 */
892 xed_uint_t okay=1;
893 return 1;
894 (void) okay;
895 (void) xes;
896 }
xed_encode_nonterminal_PREFIX_ENC_BIND(xed_encoder_request_t * xes)897 xed_uint_t xed_encode_nonterminal_PREFIX_ENC_BIND(xed_encoder_request_t* xes)
898 {
899 /* PREFIX_ENC()::
900 REP=2 -> emit 0xf2 emit_type=numeric value=0xf2 nbits=8 FB NO_RETURN=1 value=0x1
901 REP=3 -> emit 0xf3 emit_type=numeric value=0xf3 nbits=8 FB NO_RETURN=1 value=0x1
902 OSZ=1 -> emit 0x66 emit_type=numeric value=0x66 nbits=8 FB NO_RETURN=1 value=0x1
903 ASZ=1 -> emit 0x67 emit_type=numeric value=0x67 nbits=8 FB NO_RETURN=1 value=0x1
904 LOCK=1 -> emit 0xf0 emit_type=numeric value=0xf0 nbits=8 FB NO_RETURN=1 value=0x1
905 SEG_OVD=4 -> emit 0x64 emit_type=numeric value=0x64 nbits=8 FB NO_RETURN=1 value=0x1
906 SEG_OVD=5 -> emit 0x65 emit_type=numeric value=0x65 nbits=8 FB NO_RETURN=1 value=0x1
907 MODE=2 HINT=3 -> emit 0x2e emit_type=numeric value=0x2e nbits=8 FB NO_RETURN=1 value=0x1
908 MODE=2 HINT=4 -> emit 0x3e emit_type=numeric value=0x3e nbits=8 FB NO_RETURN=1 value=0x1
909 MODE!=2 SEG_OVD=1 -> emit 0x2e emit_type=numeric value=0x2e nbits=8 FB NO_RETURN=1 value=0x1
910 MODE!=2 HINT=3 -> emit 0x2e emit_type=numeric value=0x2e nbits=8 FB NO_RETURN=1 value=0x1
911 MODE!=2 SEG_OVD=2 -> emit 0x3e emit_type=numeric value=0x3e nbits=8 FB NO_RETURN=1 value=0x1
912 MODE!=2 HINT=4 -> emit 0x3e emit_type=numeric value=0x3e nbits=8 FB NO_RETURN=1 value=0x1
913 MODE!=2 SEG_OVD=3 -> emit 0x26 emit_type=numeric value=0x26 nbits=8 FB NO_RETURN=1 value=0x1
914 MODE!=2 SEG_OVD=6 -> emit 0x36 emit_type=numeric value=0x36 nbits=8 FB NO_RETURN=1 value=0x1
915 */
916 xed_uint_t okay=1;
917 xed_uint_t conditions_satisfied=0;
918 xed_encoder_request_iforms(xes)->x_PREFIX_ENC=0;
919 conditions_satisfied = (xed3_operand_get_rep(xes) == 2);
920 if (conditions_satisfied) {
921 okay=1;
922 /* no code required for NO_RETURN binding */
923 xed_encoder_request_iforms(xes)->x_PREFIX_ENC |=(1<<1);
924 }
925 conditions_satisfied = (xed3_operand_get_rep(xes) == 3);
926 if (conditions_satisfied) {
927 okay=1;
928 /* no code required for NO_RETURN binding */
929 xed_encoder_request_iforms(xes)->x_PREFIX_ENC |=(1<<2);
930 }
931 conditions_satisfied = (xed3_operand_get_osz(xes) == 1);
932 if (conditions_satisfied) {
933 okay=1;
934 /* no code required for NO_RETURN binding */
935 xed_encoder_request_iforms(xes)->x_PREFIX_ENC |=(1<<3);
936 }
937 conditions_satisfied = (xed3_operand_get_asz(xes) == 1);
938 if (conditions_satisfied) {
939 okay=1;
940 /* no code required for NO_RETURN binding */
941 xed_encoder_request_iforms(xes)->x_PREFIX_ENC |=(1<<4);
942 }
943 conditions_satisfied = (xed3_operand_get_lock(xes) == 1);
944 if (conditions_satisfied) {
945 okay=1;
946 /* no code required for NO_RETURN binding */
947 xed_encoder_request_iforms(xes)->x_PREFIX_ENC |=(1<<5);
948 }
949 conditions_satisfied = (xed3_operand_get_seg_ovd(xes) == 4);
950 if (conditions_satisfied) {
951 okay=1;
952 /* no code required for NO_RETURN binding */
953 xed_encoder_request_iforms(xes)->x_PREFIX_ENC |=(1<<6);
954 }
955 conditions_satisfied = (xed3_operand_get_seg_ovd(xes) == 5);
956 if (conditions_satisfied) {
957 okay=1;
958 /* no code required for NO_RETURN binding */
959 xed_encoder_request_iforms(xes)->x_PREFIX_ENC |=(1<<7);
960 }
961 conditions_satisfied = (xed3_operand_get_mode(xes) == 2) &&
962 (xed3_operand_get_hint(xes) == 3);
963 if (conditions_satisfied) {
964 okay=1;
965 /* no code required for NO_RETURN binding */
966 xed_encoder_request_iforms(xes)->x_PREFIX_ENC |=(1<<8);
967 }
968 conditions_satisfied = (xed3_operand_get_mode(xes) == 2) &&
969 (xed3_operand_get_hint(xes) == 4);
970 if (conditions_satisfied) {
971 okay=1;
972 /* no code required for NO_RETURN binding */
973 xed_encoder_request_iforms(xes)->x_PREFIX_ENC |=(1<<9);
974 }
975 conditions_satisfied = (xed3_operand_get_mode(xes) != 2) &&
976 (xed3_operand_get_seg_ovd(xes) == 1);
977 if (conditions_satisfied) {
978 okay=1;
979 /* no code required for NO_RETURN binding */
980 xed_encoder_request_iforms(xes)->x_PREFIX_ENC |=(1<<10);
981 }
982 conditions_satisfied = (xed3_operand_get_mode(xes) != 2) &&
983 (xed3_operand_get_hint(xes) == 3);
984 if (conditions_satisfied) {
985 okay=1;
986 /* no code required for NO_RETURN binding */
987 xed_encoder_request_iforms(xes)->x_PREFIX_ENC |=(1<<11);
988 }
989 conditions_satisfied = (xed3_operand_get_mode(xes) != 2) &&
990 (xed3_operand_get_seg_ovd(xes) == 2);
991 if (conditions_satisfied) {
992 okay=1;
993 /* no code required for NO_RETURN binding */
994 xed_encoder_request_iforms(xes)->x_PREFIX_ENC |=(1<<12);
995 }
996 conditions_satisfied = (xed3_operand_get_mode(xes) != 2) &&
997 (xed3_operand_get_hint(xes) == 4);
998 if (conditions_satisfied) {
999 okay=1;
1000 /* no code required for NO_RETURN binding */
1001 xed_encoder_request_iforms(xes)->x_PREFIX_ENC |=(1<<13);
1002 }
1003 conditions_satisfied = (xed3_operand_get_mode(xes) != 2) &&
1004 (xed3_operand_get_seg_ovd(xes) == 3);
1005 if (conditions_satisfied) {
1006 okay=1;
1007 /* no code required for NO_RETURN binding */
1008 xed_encoder_request_iforms(xes)->x_PREFIX_ENC |=(1<<14);
1009 }
1010 conditions_satisfied = (xed3_operand_get_mode(xes) != 2) &&
1011 (xed3_operand_get_seg_ovd(xes) == 6);
1012 if (conditions_satisfied) {
1013 okay=1;
1014 /* no code required for NO_RETURN binding */
1015 xed_encoder_request_iforms(xes)->x_PREFIX_ENC |=(1<<15);
1016 }
1017 conditions_satisfied = 1;
1018 if (conditions_satisfied) {
1019 okay=1;
1020 /* FIXME action code not done yet for return 1*/
1021 if (okay) return 1;
1022 }
1023 return 0; /*pacify the compiler*/
1024 (void) okay;
1025 (void) xes;
1026 (void) conditions_satisfied;
1027 }
xed_encode_nonterminal_PREFIX_ENC_EMIT(xed_encoder_request_t * xes)1028 xed_uint_t xed_encode_nonterminal_PREFIX_ENC_EMIT(xed_encoder_request_t* xes)
1029 {
1030 /* PREFIX_ENC()::
1031 REP=2 -> emit 0xf2 emit_type=numeric value=0xf2 nbits=8 FB NO_RETURN=1 value=0x1
1032 REP=3 -> emit 0xf3 emit_type=numeric value=0xf3 nbits=8 FB NO_RETURN=1 value=0x1
1033 OSZ=1 -> emit 0x66 emit_type=numeric value=0x66 nbits=8 FB NO_RETURN=1 value=0x1
1034 ASZ=1 -> emit 0x67 emit_type=numeric value=0x67 nbits=8 FB NO_RETURN=1 value=0x1
1035 LOCK=1 -> emit 0xf0 emit_type=numeric value=0xf0 nbits=8 FB NO_RETURN=1 value=0x1
1036 SEG_OVD=4 -> emit 0x64 emit_type=numeric value=0x64 nbits=8 FB NO_RETURN=1 value=0x1
1037 SEG_OVD=5 -> emit 0x65 emit_type=numeric value=0x65 nbits=8 FB NO_RETURN=1 value=0x1
1038 MODE=2 HINT=3 -> emit 0x2e emit_type=numeric value=0x2e nbits=8 FB NO_RETURN=1 value=0x1
1039 MODE=2 HINT=4 -> emit 0x3e emit_type=numeric value=0x3e nbits=8 FB NO_RETURN=1 value=0x1
1040 MODE!=2 SEG_OVD=1 -> emit 0x2e emit_type=numeric value=0x2e nbits=8 FB NO_RETURN=1 value=0x1
1041 MODE!=2 HINT=3 -> emit 0x2e emit_type=numeric value=0x2e nbits=8 FB NO_RETURN=1 value=0x1
1042 MODE!=2 SEG_OVD=2 -> emit 0x3e emit_type=numeric value=0x3e nbits=8 FB NO_RETURN=1 value=0x1
1043 MODE!=2 HINT=4 -> emit 0x3e emit_type=numeric value=0x3e nbits=8 FB NO_RETURN=1 value=0x1
1044 MODE!=2 SEG_OVD=3 -> emit 0x26 emit_type=numeric value=0x26 nbits=8 FB NO_RETURN=1 value=0x1
1045 MODE!=2 SEG_OVD=6 -> emit 0x36 emit_type=numeric value=0x36 nbits=8 FB NO_RETURN=1 value=0x1
1046 */
1047 xed_uint_t okay=1;
1048 unsigned int iform = xed_encoder_request_iforms(xes)->x_PREFIX_ENC;
1049 /* no return */ if (iform&(1<<1)) {
1050 xed_encoder_request_encode_emit(xes,8,0xf2);
1051 }
1052 /* no return */ if (iform&(1<<2)) {
1053 xed_encoder_request_encode_emit(xes,8,0xf3);
1054 }
1055 /* no return */ if (iform&(1<<3)) {
1056 xed_encoder_request_encode_emit(xes,8,0x66);
1057 }
1058 /* no return */ if (iform&(1<<4)) {
1059 xed_encoder_request_encode_emit(xes,8,0x67);
1060 }
1061 /* no return */ if (iform&(1<<5)) {
1062 xed_encoder_request_encode_emit(xes,8,0xf0);
1063 }
1064 /* no return */ if (iform&(1<<6)) {
1065 xed_encoder_request_encode_emit(xes,8,0x64);
1066 }
1067 /* no return */ if (iform&(1<<7)) {
1068 xed_encoder_request_encode_emit(xes,8,0x65);
1069 }
1070 /* no return */ if (iform&(1<<8)) {
1071 xed_encoder_request_encode_emit(xes,8,0x2e);
1072 }
1073 /* no return */ if (iform&(1<<9)) {
1074 xed_encoder_request_encode_emit(xes,8,0x3e);
1075 }
1076 /* no return */ if (iform&(1<<10)) {
1077 xed_encoder_request_encode_emit(xes,8,0x2e);
1078 }
1079 /* no return */ if (iform&(1<<11)) {
1080 xed_encoder_request_encode_emit(xes,8,0x2e);
1081 }
1082 /* no return */ if (iform&(1<<12)) {
1083 xed_encoder_request_encode_emit(xes,8,0x3e);
1084 }
1085 /* no return */ if (iform&(1<<13)) {
1086 xed_encoder_request_encode_emit(xes,8,0x3e);
1087 }
1088 /* no return */ if (iform&(1<<14)) {
1089 xed_encoder_request_encode_emit(xes,8,0x26);
1090 }
1091 /* no return */ if (iform&(1<<15)) {
1092 xed_encoder_request_encode_emit(xes,8,0x36);
1093 }
1094 if (1) { /*otherwise*/
1095 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1096 return okay;
1097 }
1098 return 0; /*pacify the compiler*/
1099 (void) okay;
1100 (void) xes;
1101 (void) iform;
1102 }
xed_encode_nonterminal_REFINING66_EMIT(xed_encoder_request_t * xes)1103 xed_uint_t xed_encode_nonterminal_REFINING66_EMIT(xed_encoder_request_t* xes)
1104 {
1105 /* REFINING66()::
1106 */
1107 xed_uint_t okay=1;
1108 return 1;
1109 (void) okay;
1110 (void) xes;
1111 }
xed_encode_nonterminal_MODRM_RM_ENCODE_EA64_SIB0_EMIT(xed_encoder_request_t * xes)1112 xed_uint_t xed_encode_nonterminal_MODRM_RM_ENCODE_EA64_SIB0_EMIT(xed_encoder_request_t* xes)
1113 {
1114 /* MODRM_RM_ENCODE_EA64_SIB0()::
1115 BASE0=XED_REG_RIP -> FB RM=5 value=0x5
1116 BASE0=XED_REG_EIP -> FB RM=5 value=0x5
1117 BASE0=XED_REG_RAX -> FB RM=0 value=0x0 FB REXB=0 value=0x0
1118 BASE0=XED_REG_R8 -> FB RM=0 value=0x0 FB REXB=1 value=0x1
1119 BASE0=XED_REG_RCX -> FB RM=1 value=0x1 FB REXB=0 value=0x0
1120 BASE0=XED_REG_R9 -> FB RM=1 value=0x1 FB REXB=1 value=0x1
1121 BASE0=XED_REG_RDX -> FB RM=2 value=0x2 FB REXB=0 value=0x0
1122 BASE0=XED_REG_R10 -> FB RM=2 value=0x2 FB REXB=1 value=0x1
1123 BASE0=XED_REG_RBX -> FB RM=3 value=0x3 FB REXB=0 value=0x0
1124 BASE0=XED_REG_R11 -> FB RM=3 value=0x3 FB REXB=1 value=0x1
1125 BASE0=XED_REG_RSI -> FB RM=6 value=0x6 FB REXB=0 value=0x0
1126 BASE0=XED_REG_R14 -> FB RM=6 value=0x6 FB REXB=1 value=0x1
1127 BASE0=XED_REG_RDI -> FB RM=7 value=0x7 FB REXB=0 value=0x0
1128 BASE0=XED_REG_R15 -> FB RM=7 value=0x7 FB REXB=1 value=0x1
1129 BASE0=@ -> nt NT[DISP_WIDTH_32] FB RM=5 value=0x5
1130 BASE0=XED_REG_RBP -> nt NT[DISP_WIDTH_0_8_32] FB RM=5 value=0x5 FB REXB=0 value=0x0
1131 BASE0=XED_REG_R13 -> nt NT[DISP_WIDTH_0_8_32] FB RM=5 value=0x5 FB REXB=1 value=0x1
1132 */
1133 xed_uint_t okay=1;
1134 unsigned int iform = xed_encoder_request_iforms(xes)->x_MODRM_RM_ENCODE_EA64_SIB0;
1135 /* 14 */ if (iform==14) {
1136 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1137 return okay;
1138 }
1139 /* 7 */ if (iform==7) {
1140 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1141 return okay;
1142 }
1143 /* 17 */ if (iform==17) {
1144 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1145 return okay;
1146 }
1147 /* 12 */ if (iform==12) {
1148 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1149 return okay;
1150 }
1151 /* 10 */ if (iform==10) {
1152 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1153 return okay;
1154 }
1155 /* 5 */ if (iform==5) {
1156 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1157 return okay;
1158 }
1159 /* 3 */ if (iform==3) {
1160 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1161 return okay;
1162 }
1163 /* 15 */ if (iform==15) {
1164 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1165 return okay;
1166 }
1167 /* 13 */ if (iform==13) {
1168 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1169 return okay;
1170 }
1171 /* 8 */ if (iform==8) {
1172 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1173 return okay;
1174 }
1175 /* 9 */ if (iform==9) {
1176 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1177 return okay;
1178 }
1179 /* 4 */ if (iform==4) {
1180 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1181 return okay;
1182 }
1183 /* 2 */ if (iform==2) {
1184 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1185 return okay;
1186 }
1187 /* 6 */ if (iform==6) {
1188 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1189 return okay;
1190 }
1191 /* 1 */ if (iform==1) {
1192 xed_encode_nonterminal_DISP_WIDTH_32_EMIT(xes);
1193 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1194 return okay;
1195 }
1196 /* 16 */ if (iform==16) {
1197 xed_encode_nonterminal_DISP_WIDTH_0_8_32_EMIT(xes);
1198 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1199 return okay;
1200 }
1201 /* 11 */ if (iform==11) {
1202 xed_encode_nonterminal_DISP_WIDTH_0_8_32_EMIT(xes);
1203 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1204 return okay;
1205 }
1206 if (1) { /*otherwise*/
1207 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1208 return okay;
1209 }
1210 return 0; /*pacify the compiler*/
1211 (void) okay;
1212 (void) xes;
1213 (void) iform;
1214 }
xed_encode_nonterminal_VSIB_ENC_EMIT(xed_encoder_request_t * xes)1215 xed_uint_t xed_encode_nonterminal_VSIB_ENC_EMIT(xed_encoder_request_t* xes)
1216 {
1217 /* VSIB_ENC()::
1218 DUMMY=0 SIBBASE[bbb]=* SIBINDEX[iii]=* SIBSCALE[ss]=* -> emit ss_iii_bbb emit_type=letters nbits=8
1219 */
1220 xed_uint_t okay=1;
1221 unsigned int iform = xed_encoder_request_iforms(xes)->x_VSIB_ENC;
1222 /* 1 */ if (iform==1) {
1223 xed_encoder_request_encode_emit(xes,8,(xed3_operand_get_sibscale(xes)<< 6)|(xed3_operand_get_sibindex(xes)<< 3)|(xed3_operand_get_sibbase(xes)));
1224 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1225 return okay;
1226 }
1227 if (1) { /*otherwise*/
1228 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1229 return okay;
1230 }
1231 return 0; /*pacify the compiler*/
1232 (void) okay;
1233 (void) xes;
1234 (void) iform;
1235 }
xed_encode_nonterminal_EVEX_REXB_ENC_EMIT(xed_encoder_request_t * xes)1236 xed_uint_t xed_encode_nonterminal_EVEX_REXB_ENC_EMIT(xed_encoder_request_t* xes)
1237 {
1238 /* EVEX_REXB_ENC()::
1239 MODE=2 REXB=1 -> emit 0b0 emit_type=numeric value=0x0 nbits=1
1240 MODE=2 REXB=0 -> emit 0b1 emit_type=numeric value=0x1 nbits=1
1241 MODE=1 REXB=0 -> emit 0b1 emit_type=numeric value=0x1 nbits=1
1242 MODE=1 REXB=1 -> FB ERROR=XED_ERROR_GENERAL_ERROR
1243 */
1244 xed_uint_t okay=1;
1245 unsigned int iform = xed_encoder_request_iforms(xes)->x_EVEX_REXB_ENC;
1246 /* 5 */ if (iform==5) {
1247 xed_encoder_request_encode_emit(xes,1,0x0);
1248 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1249 return okay;
1250 }
1251 /* 2 */ if (iform==2) {
1252 xed_encoder_request_encode_emit(xes,1,0x1);
1253 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1254 return okay;
1255 }
1256 /* 4 */ if (iform==4) {
1257 xed_encoder_request_encode_emit(xes,1,0x1);
1258 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1259 return okay;
1260 }
1261 if (1) { /*otherwise*/
1262 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1263 return okay;
1264 }
1265 return 0; /*pacify the compiler*/
1266 (void) okay;
1267 (void) xes;
1268 (void) iform;
1269 }
xed_encode_nonterminal_ESIZE_32_BITS_EMIT(xed_encoder_request_t * xes)1270 xed_uint_t xed_encode_nonterminal_ESIZE_32_BITS_EMIT(xed_encoder_request_t* xes)
1271 {
1272 /* ESIZE_32_BITS()::
1273 */
1274 xed_uint_t okay=1;
1275 return 1;
1276 (void) okay;
1277 (void) xes;
1278 }
xed_encode_nonterminal_VEXED_REX_EMIT(xed_encoder_request_t * xes)1279 xed_uint_t xed_encode_nonterminal_VEXED_REX_EMIT(xed_encoder_request_t* xes)
1280 {
1281 /* VEXED_REX()::
1282 VEXVALID=3 -> nt NT[XOP_ENC]
1283 VEXVALID=0 -> nt NT[REX_PREFIX_ENC]
1284 VEXVALID=1 -> nt NT[NEWVEX_ENC]
1285 VEXVALID=2 -> nt NT[EVEX_ENC]
1286 */
1287 xed_uint_t okay=1;
1288 unsigned int iform = xed_encoder_request_iforms(xes)->x_VEXED_REX;
1289 /* 4 */ if (iform==4) {
1290 xed_encode_nonterminal_XOP_ENC_EMIT(xes);
1291 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1292 return okay;
1293 }
1294 /* 1 */ if (iform==1) {
1295 xed_encode_nonterminal_REX_PREFIX_ENC_EMIT(xes);
1296 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1297 return okay;
1298 }
1299 /* 2 */ if (iform==2) {
1300 xed_encode_nonterminal_NEWVEX_ENC_EMIT(xes);
1301 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1302 return okay;
1303 }
1304 /* 3 */ if (iform==3) {
1305 xed_encode_nonterminal_EVEX_ENC_EMIT(xes);
1306 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1307 return okay;
1308 }
1309 if (1) { /*otherwise*/
1310 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1311 return okay;
1312 }
1313 return 0; /*pacify the compiler*/
1314 (void) okay;
1315 (void) xes;
1316 (void) iform;
1317 }
xed_encode_nonterminal_VEX_REXXB_ENC_EMIT(xed_encoder_request_t * xes)1318 xed_uint_t xed_encode_nonterminal_VEX_REXXB_ENC_EMIT(xed_encoder_request_t* xes)
1319 {
1320 /* VEX_REXXB_ENC()::
1321 MODE=2 VEX_C4=1 REXX=0 REXB=0 -> emit 0b11 emit_type=numeric value=0x3 nbits=2
1322 MODE=2 VEX_C4=1 REXX=1 REXB=0 -> emit 0b01 emit_type=numeric value=0x1 nbits=2
1323 MODE=2 VEX_C4=1 REXX=0 REXB=1 -> emit 0b10 emit_type=numeric value=0x2 nbits=2
1324 MODE=2 VEX_C4=1 REXX=1 REXB=1 -> emit 0b00 emit_type=numeric value=0x0 nbits=2
1325 MODE!=2 VEX_C4=1 REXX=0 REXB=0 -> emit 0b11 emit_type=numeric value=0x3 nbits=2
1326 MODE!=2 VEX_C4=1 REXX=1 REXB=0 -> FB ERROR=XED_ERROR_GENERAL_ERROR
1327 MODE!=2 VEX_C4=1 REXX=0 REXB=1 -> FB ERROR=XED_ERROR_GENERAL_ERROR
1328 MODE!=2 VEX_C4=1 REXX=1 REXB=1 -> FB ERROR=XED_ERROR_GENERAL_ERROR
1329 */
1330 xed_uint_t okay=1;
1331 unsigned int iform = xed_encoder_request_iforms(xes)->x_VEX_REXXB_ENC;
1332 /* 3 */ if (iform==3) {
1333 xed_encoder_request_encode_emit(xes,2,0x3);
1334 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1335 return okay;
1336 }
1337 /* 11 */ if (iform==11) {
1338 xed_encoder_request_encode_emit(xes,2,0x1);
1339 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1340 return okay;
1341 }
1342 /* 7 */ if (iform==7) {
1343 xed_encoder_request_encode_emit(xes,2,0x2);
1344 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1345 return okay;
1346 }
1347 /* 15 */ if (iform==15) {
1348 xed_encoder_request_encode_emit(xes,2,0x0);
1349 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1350 return okay;
1351 }
1352 /* 1 */ if (iform==1) {
1353 xed_encoder_request_encode_emit(xes,2,0x3);
1354 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1355 return okay;
1356 }
1357 if (1) { /*otherwise*/
1358 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1359 return okay;
1360 }
1361 return 0; /*pacify the compiler*/
1362 (void) okay;
1363 (void) xes;
1364 (void) iform;
1365 }
xed_encode_nonterminal_NELEM_HALF_EMIT(xed_encoder_request_t * xes)1366 xed_uint_t xed_encode_nonterminal_NELEM_HALF_EMIT(xed_encoder_request_t* xes)
1367 {
1368 /* NELEM_HALF()::
1369 BCAST!=0 -> FB BCRC=1 value=0x1
1370 */
1371 xed_uint_t okay=1;
1372 return 1;
1373 (void) okay;
1374 (void) xes;
1375 }
xed_encode_nonterminal_EVEX_REXRR_ENC_EMIT(xed_encoder_request_t * xes)1376 xed_uint_t xed_encode_nonterminal_EVEX_REXRR_ENC_EMIT(xed_encoder_request_t* xes)
1377 {
1378 /* EVEX_REXRR_ENC()::
1379 MODE=2 REXRR=1 -> emit 0b0 emit_type=numeric value=0x0 nbits=1
1380 MODE=2 REXRR=0 -> emit 0b1 emit_type=numeric value=0x1 nbits=1
1381 MODE=1 REXRR=0 -> emit 0b1 emit_type=numeric value=0x1 nbits=1
1382 MODE=1 REXRR=1 -> FB ERROR=XED_ERROR_GENERAL_ERROR
1383 */
1384 xed_uint_t okay=1;
1385 unsigned int iform = xed_encoder_request_iforms(xes)->x_EVEX_REXRR_ENC;
1386 /* 5 */ if (iform==5) {
1387 xed_encoder_request_encode_emit(xes,1,0x0);
1388 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1389 return okay;
1390 }
1391 /* 2 */ if (iform==2) {
1392 xed_encoder_request_encode_emit(xes,1,0x1);
1393 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1394 return okay;
1395 }
1396 /* 4 */ if (iform==4) {
1397 xed_encoder_request_encode_emit(xes,1,0x1);
1398 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1399 return okay;
1400 }
1401 if (1) { /*otherwise*/
1402 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1403 return okay;
1404 }
1405 return 0; /*pacify the compiler*/
1406 (void) okay;
1407 (void) xes;
1408 (void) iform;
1409 }
xed_encode_nonterminal_AVX512_EVEX_BYTE3_ENC_EMIT(xed_encoder_request_t * xes)1410 xed_uint_t xed_encode_nonterminal_AVX512_EVEX_BYTE3_ENC_EMIT(xed_encoder_request_t* xes)
1411 {
1412 /* AVX512_EVEX_BYTE3_ENC()::
1413 ZEROING[z]=* LLRC[nn]=* BCRC[b]=* VEXDEST4=0 MASK[aaa]=* -> emit z_nn_b emit_type=letters nbits=4 emit 0b1 emit_type=numeric value=0x1 nbits=1 emit aaa emit_type=letters nbits=3
1414 ZEROING[z]=* LLRC[nn]=* BCRC[b]=* VEXDEST4=1 MASK[aaa]=* -> emit z_nn_b emit_type=letters nbits=4 emit 0b0 emit_type=numeric value=0x0 nbits=1 emit aaa emit_type=letters nbits=3
1415 */
1416 xed_uint_t okay=1;
1417 unsigned int iform = xed_encoder_request_iforms(xes)->x_AVX512_EVEX_BYTE3_ENC;
1418 /* 1 */ if (iform==1) {
1419 xed_encoder_request_encode_emit(xes,4,(xed3_operand_get_zeroing(xes)<< 3)|(xed3_operand_get_llrc(xes)<< 1)|(xed3_operand_get_bcrc(xes)));
1420 xed_encoder_request_encode_emit(xes,1,0x1);
1421 xed_encoder_request_encode_emit(xes,3,(xed3_operand_get_mask(xes)));
1422 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1423 return okay;
1424 }
1425 /* 2 */ if (iform==2) {
1426 xed_encoder_request_encode_emit(xes,4,(xed3_operand_get_zeroing(xes)<< 3)|(xed3_operand_get_llrc(xes)<< 1)|(xed3_operand_get_bcrc(xes)));
1427 xed_encoder_request_encode_emit(xes,1,0x0);
1428 xed_encoder_request_encode_emit(xes,3,(xed3_operand_get_mask(xes)));
1429 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1430 return okay;
1431 }
1432 if (1) { /*otherwise*/
1433 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1434 return okay;
1435 }
1436 return 0; /*pacify the compiler*/
1437 (void) okay;
1438 (void) xes;
1439 (void) iform;
1440 }
xed_encode_nonterminal_EVEX_REXW_VVVV_ENC_EMIT(xed_encoder_request_t * xes)1441 xed_uint_t xed_encode_nonterminal_EVEX_REXW_VVVV_ENC_EMIT(xed_encoder_request_t* xes)
1442 {
1443 /* EVEX_REXW_VVVV_ENC()::
1444 DUMMY=0 REXW[w]=* VEXDEST3[u]=* VEXDEST210[ddd]=* -> emit w emit_type=letters nbits=1 emit u_ddd emit_type=letters nbits=4
1445 */
1446 xed_uint_t okay=1;
1447 unsigned int iform = xed_encoder_request_iforms(xes)->x_EVEX_REXW_VVVV_ENC;
1448 /* 1 */ if (iform==1) {
1449 xed_encoder_request_encode_emit(xes,1,(xed3_operand_get_rexw(xes)));
1450 xed_encoder_request_encode_emit(xes,4,(xed3_operand_get_vexdest3(xes)<< 3)|(xed3_operand_get_vexdest210(xes)));
1451 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1452 return okay;
1453 }
1454 if (1) { /*otherwise*/
1455 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1456 return okay;
1457 }
1458 return 0; /*pacify the compiler*/
1459 (void) okay;
1460 (void) xes;
1461 (void) iform;
1462 }
xed_encode_nonterminal_DISP_WIDTH_8_EMIT(xed_encoder_request_t * xes)1463 xed_uint_t xed_encode_nonterminal_DISP_WIDTH_8_EMIT(xed_encoder_request_t* xes)
1464 {
1465 /* DISP_WIDTH_8()::
1466 DISP_WIDTH=8 -> nothing
1467 */
1468 xed_uint_t okay=1;
1469 return 1;
1470 (void) okay;
1471 (void) xes;
1472 }
xed_encode_nonterminal_UISA_ENC_INDEX_YMM_EMIT(xed_encoder_request_t * xes)1473 xed_uint_t xed_encode_nonterminal_UISA_ENC_INDEX_YMM_EMIT(xed_encoder_request_t* xes)
1474 {
1475 /* UISA_ENC_INDEX_YMM()::
1476 INDEX=XED_REG_YMM0 -> FB VEXDEST4=0 value=0x0 FB REXX=0 value=0x0 FB SIBINDEX=0 value=0x0
1477 INDEX=XED_REG_YMM1 -> FB VEXDEST4=0 value=0x0 FB REXX=0 value=0x0 FB SIBINDEX=1 value=0x1
1478 INDEX=XED_REG_YMM2 -> FB VEXDEST4=0 value=0x0 FB REXX=0 value=0x0 FB SIBINDEX=2 value=0x2
1479 INDEX=XED_REG_YMM3 -> FB VEXDEST4=0 value=0x0 FB REXX=0 value=0x0 FB SIBINDEX=3 value=0x3
1480 INDEX=XED_REG_YMM4 -> FB VEXDEST4=0 value=0x0 FB REXX=0 value=0x0 FB SIBINDEX=4 value=0x4
1481 INDEX=XED_REG_YMM5 -> FB VEXDEST4=0 value=0x0 FB REXX=0 value=0x0 FB SIBINDEX=5 value=0x5
1482 INDEX=XED_REG_YMM6 -> FB VEXDEST4=0 value=0x0 FB REXX=0 value=0x0 FB SIBINDEX=6 value=0x6
1483 INDEX=XED_REG_YMM7 -> FB VEXDEST4=0 value=0x0 FB REXX=0 value=0x0 FB SIBINDEX=7 value=0x7
1484 INDEX=XED_REG_YMM8 -> FB VEXDEST4=0 value=0x0 FB REXX=1 value=0x1 FB SIBINDEX=0 value=0x0
1485 INDEX=XED_REG_YMM9 -> FB VEXDEST4=0 value=0x0 FB REXX=1 value=0x1 FB SIBINDEX=1 value=0x1
1486 INDEX=XED_REG_YMM10 -> FB VEXDEST4=0 value=0x0 FB REXX=1 value=0x1 FB SIBINDEX=2 value=0x2
1487 INDEX=XED_REG_YMM11 -> FB VEXDEST4=0 value=0x0 FB REXX=1 value=0x1 FB SIBINDEX=3 value=0x3
1488 INDEX=XED_REG_YMM12 -> FB VEXDEST4=0 value=0x0 FB REXX=1 value=0x1 FB SIBINDEX=4 value=0x4
1489 INDEX=XED_REG_YMM13 -> FB VEXDEST4=0 value=0x0 FB REXX=1 value=0x1 FB SIBINDEX=5 value=0x5
1490 INDEX=XED_REG_YMM14 -> FB VEXDEST4=0 value=0x0 FB REXX=1 value=0x1 FB SIBINDEX=6 value=0x6
1491 INDEX=XED_REG_YMM15 -> FB VEXDEST4=0 value=0x0 FB REXX=1 value=0x1 FB SIBINDEX=7 value=0x7
1492 INDEX=XED_REG_YMM16 -> FB VEXDEST4=1 value=0x1 FB REXX=0 value=0x0 FB SIBINDEX=0 value=0x0
1493 INDEX=XED_REG_YMM17 -> FB VEXDEST4=1 value=0x1 FB REXX=0 value=0x0 FB SIBINDEX=1 value=0x1
1494 INDEX=XED_REG_YMM18 -> FB VEXDEST4=1 value=0x1 FB REXX=0 value=0x0 FB SIBINDEX=2 value=0x2
1495 INDEX=XED_REG_YMM19 -> FB VEXDEST4=1 value=0x1 FB REXX=0 value=0x0 FB SIBINDEX=3 value=0x3
1496 INDEX=XED_REG_YMM20 -> FB VEXDEST4=1 value=0x1 FB REXX=0 value=0x0 FB SIBINDEX=4 value=0x4
1497 INDEX=XED_REG_YMM21 -> FB VEXDEST4=1 value=0x1 FB REXX=0 value=0x0 FB SIBINDEX=5 value=0x5
1498 INDEX=XED_REG_YMM22 -> FB VEXDEST4=1 value=0x1 FB REXX=0 value=0x0 FB SIBINDEX=6 value=0x6
1499 INDEX=XED_REG_YMM23 -> FB VEXDEST4=1 value=0x1 FB REXX=0 value=0x0 FB SIBINDEX=7 value=0x7
1500 INDEX=XED_REG_YMM24 -> FB VEXDEST4=1 value=0x1 FB REXX=1 value=0x1 FB SIBINDEX=0 value=0x0
1501 INDEX=XED_REG_YMM25 -> FB VEXDEST4=1 value=0x1 FB REXX=1 value=0x1 FB SIBINDEX=1 value=0x1
1502 INDEX=XED_REG_YMM26 -> FB VEXDEST4=1 value=0x1 FB REXX=1 value=0x1 FB SIBINDEX=2 value=0x2
1503 INDEX=XED_REG_YMM27 -> FB VEXDEST4=1 value=0x1 FB REXX=1 value=0x1 FB SIBINDEX=3 value=0x3
1504 INDEX=XED_REG_YMM28 -> FB VEXDEST4=1 value=0x1 FB REXX=1 value=0x1 FB SIBINDEX=4 value=0x4
1505 INDEX=XED_REG_YMM29 -> FB VEXDEST4=1 value=0x1 FB REXX=1 value=0x1 FB SIBINDEX=5 value=0x5
1506 INDEX=XED_REG_YMM30 -> FB VEXDEST4=1 value=0x1 FB REXX=1 value=0x1 FB SIBINDEX=6 value=0x6
1507 INDEX=XED_REG_YMM31 -> FB VEXDEST4=1 value=0x1 FB REXX=1 value=0x1 FB SIBINDEX=7 value=0x7
1508 */
1509 xed_uint_t okay=1;
1510 return 1;
1511 (void) okay;
1512 (void) xes;
1513 }
xed_encode_nonterminal_MODRM_MOD_EA32_DISP32_EMIT(xed_encoder_request_t * xes)1514 xed_uint_t xed_encode_nonterminal_MODRM_MOD_EA32_DISP32_EMIT(xed_encoder_request_t* xes)
1515 {
1516 /* MODRM_MOD_EA32_DISP32()::
1517 BASE0=@ -> FB MOD=0 value=0x0
1518 MODE=2 BASE0=XED_REG_EIP EASZ=2 -> FB MOD=0 value=0x0
1519 MODE=2 BASE0=XED_REG_RIP EASZ=3 -> FB MOD=0 value=0x0
1520 MODE=1 BASE0=XED_REG_EAX -> FB MOD=2 value=0x2
1521 MODE=1 BASE0=XED_REG_EBX -> FB MOD=2 value=0x2
1522 MODE=1 BASE0=XED_REG_ECX -> FB MOD=2 value=0x2
1523 MODE=1 BASE0=XED_REG_EDX -> FB MOD=2 value=0x2
1524 MODE=1 BASE0=XED_REG_ESP -> FB MOD=2 value=0x2
1525 MODE=1 BASE0=XED_REG_EBP -> FB MOD=2 value=0x2
1526 MODE=1 BASE0=XED_REG_ESI -> FB MOD=2 value=0x2
1527 MODE=1 BASE0=XED_REG_EDI -> FB MOD=2 value=0x2
1528 MODE=2 BASE0=XED_REG_EAX -> FB MOD=2 value=0x2
1529 MODE=2 BASE0=XED_REG_EBX -> FB MOD=2 value=0x2
1530 MODE=2 BASE0=XED_REG_ECX -> FB MOD=2 value=0x2
1531 MODE=2 BASE0=XED_REG_EDX -> FB MOD=2 value=0x2
1532 MODE=2 BASE0=XED_REG_ESP -> FB MOD=2 value=0x2
1533 MODE=2 BASE0=XED_REG_EBP -> FB MOD=2 value=0x2
1534 MODE=2 BASE0=XED_REG_ESI -> FB MOD=2 value=0x2
1535 MODE=2 BASE0=XED_REG_EDI -> FB MOD=2 value=0x2
1536 MODE=2 BASE0=XED_REG_R8D -> FB MOD=2 value=0x2
1537 MODE=2 BASE0=XED_REG_R9D -> FB MOD=2 value=0x2
1538 MODE=2 BASE0=XED_REG_R10D -> FB MOD=2 value=0x2
1539 MODE=2 BASE0=XED_REG_R11D -> FB MOD=2 value=0x2
1540 MODE=2 BASE0=XED_REG_R12D -> FB MOD=2 value=0x2
1541 MODE=2 BASE0=XED_REG_R13D -> FB MOD=2 value=0x2
1542 MODE=2 BASE0=XED_REG_R14D -> FB MOD=2 value=0x2
1543 MODE=2 BASE0=XED_REG_R15D -> FB MOD=2 value=0x2
1544 */
1545 xed_uint_t okay=1;
1546 return 1;
1547 (void) okay;
1548 (void) xes;
1549 }
xed_encode_nonterminal_BND_R_CHECK_EMIT(xed_encoder_request_t * xes)1550 xed_uint_t xed_encode_nonterminal_BND_R_CHECK_EMIT(xed_encoder_request_t* xes)
1551 {
1552 /* BND_R_CHECK()::
1553 REXR=0 REG=0x0 -> nothing
1554 REXR=0 REG=0x1 -> nothing
1555 REXR=0 REG=0x2 -> nothing
1556 REXR=0 REG=0x3 -> nothing
1557 REXR=0 REG=0x4 -> FB ERROR=XED_ERROR_GENERAL_ERROR
1558 REXR=0 REG=0x5 -> FB ERROR=XED_ERROR_GENERAL_ERROR
1559 REXR=0 REG=0x6 -> FB ERROR=XED_ERROR_GENERAL_ERROR
1560 REXR=0 REG=0x7 -> FB ERROR=XED_ERROR_GENERAL_ERROR
1561 REXR=1 REG=0x0 -> FB ERROR=XED_ERROR_GENERAL_ERROR
1562 REXR=1 REG=0x1 -> FB ERROR=XED_ERROR_GENERAL_ERROR
1563 REXR=1 REG=0x2 -> FB ERROR=XED_ERROR_GENERAL_ERROR
1564 REXR=1 REG=0x3 -> FB ERROR=XED_ERROR_GENERAL_ERROR
1565 REXR=1 REG=0x4 -> FB ERROR=XED_ERROR_GENERAL_ERROR
1566 REXR=1 REG=0x5 -> FB ERROR=XED_ERROR_GENERAL_ERROR
1567 REXR=1 REG=0x6 -> FB ERROR=XED_ERROR_GENERAL_ERROR
1568 REXR=1 REG=0x7 -> FB ERROR=XED_ERROR_GENERAL_ERROR
1569 */
1570 xed_uint_t okay=1;
1571 return 1;
1572 (void) okay;
1573 (void) xes;
1574 }
xed_encode_nonterminal_VSIB_ENC_INDEX_YMM_EMIT(xed_encoder_request_t * xes)1575 xed_uint_t xed_encode_nonterminal_VSIB_ENC_INDEX_YMM_EMIT(xed_encoder_request_t* xes)
1576 {
1577 /* VSIB_ENC_INDEX_YMM()::
1578 INDEX=XED_REG_YMM0 -> FB REXX=0 value=0x0 FB SIBINDEX=0 value=0x0
1579 INDEX=XED_REG_YMM1 -> FB REXX=0 value=0x0 FB SIBINDEX=1 value=0x1
1580 INDEX=XED_REG_YMM2 -> FB REXX=0 value=0x0 FB SIBINDEX=2 value=0x2
1581 INDEX=XED_REG_YMM3 -> FB REXX=0 value=0x0 FB SIBINDEX=3 value=0x3
1582 INDEX=XED_REG_YMM4 -> FB REXX=0 value=0x0 FB SIBINDEX=4 value=0x4
1583 INDEX=XED_REG_YMM5 -> FB REXX=0 value=0x0 FB SIBINDEX=5 value=0x5
1584 INDEX=XED_REG_YMM6 -> FB REXX=0 value=0x0 FB SIBINDEX=6 value=0x6
1585 INDEX=XED_REG_YMM7 -> FB REXX=0 value=0x0 FB SIBINDEX=7 value=0x7
1586 INDEX=XED_REG_YMM8 -> FB REXX=1 value=0x1 FB SIBINDEX=0 value=0x0
1587 INDEX=XED_REG_YMM9 -> FB REXX=1 value=0x1 FB SIBINDEX=1 value=0x1
1588 INDEX=XED_REG_YMM10 -> FB REXX=1 value=0x1 FB SIBINDEX=2 value=0x2
1589 INDEX=XED_REG_YMM11 -> FB REXX=1 value=0x1 FB SIBINDEX=3 value=0x3
1590 INDEX=XED_REG_YMM12 -> FB REXX=1 value=0x1 FB SIBINDEX=4 value=0x4
1591 INDEX=XED_REG_YMM13 -> FB REXX=1 value=0x1 FB SIBINDEX=5 value=0x5
1592 INDEX=XED_REG_YMM14 -> FB REXX=1 value=0x1 FB SIBINDEX=6 value=0x6
1593 INDEX=XED_REG_YMM15 -> FB REXX=1 value=0x1 FB SIBINDEX=7 value=0x7
1594 */
1595 xed_uint_t okay=1;
1596 return 1;
1597 (void) okay;
1598 (void) xes;
1599 }
xed_encode_nonterminal_NELEM_TUPLE1_BYTE_EMIT(xed_encoder_request_t * xes)1600 xed_uint_t xed_encode_nonterminal_NELEM_TUPLE1_BYTE_EMIT(xed_encoder_request_t* xes)
1601 {
1602 /* NELEM_TUPLE1_BYTE()::
1603 */
1604 xed_uint_t okay=1;
1605 return 1;
1606 (void) okay;
1607 (void) xes;
1608 }
xed_encode_nonterminal_MODRM_RM_ENCODE_EA16_SIB0_EMIT(xed_encoder_request_t * xes)1609 xed_uint_t xed_encode_nonterminal_MODRM_RM_ENCODE_EA16_SIB0_EMIT(xed_encoder_request_t* xes)
1610 {
1611 /* MODRM_RM_ENCODE_EA16_SIB0()::
1612 BASE0=XED_REG_BX INDEX=XED_REG_SI -> FB RM=0 value=0x0
1613 BASE0=XED_REG_BX INDEX=XED_REG_DI -> FB RM=1 value=0x1
1614 BASE0=XED_REG_BP INDEX=XED_REG_SI -> FB RM=2 value=0x2
1615 BASE0=XED_REG_BP INDEX=XED_REG_DI -> FB RM=3 value=0x3
1616 BASE0=XED_REG_SI INDEX=@ -> FB RM=4 value=0x4
1617 BASE0=XED_REG_DI INDEX=@ -> FB RM=5 value=0x5
1618 BASE0=XED_REG_BX INDEX=@ -> FB RM=7 value=0x7
1619 BASE0=@ INDEX=@ -> nt NT[DISP_WIDTH_16] FB RM=6 value=0x6
1620 BASE0=XED_REG_BP INDEX=@ -> nt NT[DISP_WIDTH_0_8_16] FB RM=6 value=0x6
1621 */
1622 xed_uint_t okay=1;
1623 unsigned int iform = xed_encoder_request_iforms(xes)->x_MODRM_RM_ENCODE_EA16_SIB0;
1624 /* 6 */ if (iform==6) {
1625 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1626 return okay;
1627 }
1628 /* 5 */ if (iform==5) {
1629 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1630 return okay;
1631 }
1632 /* 8 */ if (iform==8) {
1633 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1634 return okay;
1635 }
1636 /* 7 */ if (iform==7) {
1637 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1638 return okay;
1639 }
1640 /* 3 */ if (iform==3) {
1641 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1642 return okay;
1643 }
1644 /* 4 */ if (iform==4) {
1645 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1646 return okay;
1647 }
1648 /* 9 */ if (iform==9) {
1649 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1650 return okay;
1651 }
1652 /* 1 */ if (iform==1) {
1653 xed_encode_nonterminal_DISP_WIDTH_16_EMIT(xes);
1654 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1655 return okay;
1656 }
1657 /* 2 */ if (iform==2) {
1658 xed_encode_nonterminal_DISP_WIDTH_0_8_16_EMIT(xes);
1659 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1660 return okay;
1661 }
1662 if (1) { /*otherwise*/
1663 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1664 return okay;
1665 }
1666 return 0; /*pacify the compiler*/
1667 (void) okay;
1668 (void) xes;
1669 (void) iform;
1670 }
xed_encode_nonterminal_FIXUP_EOSZ_ENC_EMIT(xed_encoder_request_t * xes)1671 xed_uint_t xed_encode_nonterminal_FIXUP_EOSZ_ENC_EMIT(xed_encoder_request_t* xes)
1672 {
1673 /* FIXUP_EOSZ_ENC()::
1674 MODE=0 EOSZ=0 -> FB EOSZ=1 value=0x1
1675 MODE=1 EOSZ=0 -> FB EOSZ=2 value=0x2
1676 MODE=2 EOSZ=0 -> FB EOSZ=2 value=0x2
1677 */
1678 xed_uint_t okay=1;
1679 return 1;
1680 (void) okay;
1681 (void) xes;
1682 }
xed_encode_nonterminal_SEGMENT_DEFAULT_ENCODE_EMIT(xed_encoder_request_t * xes)1683 xed_uint_t xed_encode_nonterminal_SEGMENT_DEFAULT_ENCODE_EMIT(xed_encoder_request_t* xes)
1684 {
1685 /* SEGMENT_DEFAULT_ENCODE()::
1686 BASE0=@ -> FB DEFAULT_SEG=0 value=0x0
1687 BASE0=XED_REG_SP EASZ=1 -> FB DEFAULT_SEG=1 value=0x1
1688 BASE0=XED_REG_ESP EASZ=2 -> FB DEFAULT_SEG=1 value=0x1
1689 BASE0=XED_REG_RSP EASZ=3 -> FB DEFAULT_SEG=1 value=0x1
1690 BASE0=XED_REG_BP EASZ=1 -> FB DEFAULT_SEG=1 value=0x1
1691 BASE0=XED_REG_EBP EASZ=2 -> FB DEFAULT_SEG=1 value=0x1
1692 BASE0=XED_REG_RBP EASZ=3 -> FB DEFAULT_SEG=1 value=0x1
1693 BASE0=XED_REG_AX EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
1694 BASE0=XED_REG_EAX EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
1695 BASE0=XED_REG_RAX EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
1696 BASE0=XED_REG_CX EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
1697 BASE0=XED_REG_ECX EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
1698 BASE0=XED_REG_RCX EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
1699 BASE0=XED_REG_DX EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
1700 BASE0=XED_REG_EDX EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
1701 BASE0=XED_REG_RDX EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
1702 BASE0=XED_REG_BX EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
1703 BASE0=XED_REG_EBX EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
1704 BASE0=XED_REG_RBX EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
1705 BASE0=XED_REG_SI EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
1706 BASE0=XED_REG_ESI EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
1707 BASE0=XED_REG_RSI EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
1708 BASE0=XED_REG_DI EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
1709 BASE0=XED_REG_EDI EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
1710 BASE0=XED_REG_RDI EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
1711 BASE0=XED_REG_R8W EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
1712 BASE0=XED_REG_R8D EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
1713 BASE0=XED_REG_R8 EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
1714 BASE0=XED_REG_R9W EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
1715 BASE0=XED_REG_R9D EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
1716 BASE0=XED_REG_R9 EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
1717 BASE0=XED_REG_R10W EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
1718 BASE0=XED_REG_R10D EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
1719 BASE0=XED_REG_R10 EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
1720 BASE0=XED_REG_R11W EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
1721 BASE0=XED_REG_R11D EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
1722 BASE0=XED_REG_R11 EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
1723 BASE0=XED_REG_R12W EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
1724 BASE0=XED_REG_R12D EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
1725 BASE0=XED_REG_R12 EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
1726 BASE0=XED_REG_R13W EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
1727 BASE0=XED_REG_R13D EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
1728 BASE0=XED_REG_R13 EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
1729 BASE0=XED_REG_R14W EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
1730 BASE0=XED_REG_R14D EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
1731 BASE0=XED_REG_R14 EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
1732 BASE0=XED_REG_R15W EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
1733 BASE0=XED_REG_R15D EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
1734 BASE0=XED_REG_R15 EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
1735 BASE0=XED_REG_EIP EASZ=2 -> nothing
1736 BASE0=XED_REG_RIP EASZ=3 -> nothing
1737 */
1738 xed_uint_t okay=1;
1739 return 1;
1740 (void) okay;
1741 (void) xes;
1742 }
xed_encode_nonterminal_NELEM_QUARTERMEM_EMIT(xed_encoder_request_t * xes)1743 xed_uint_t xed_encode_nonterminal_NELEM_QUARTERMEM_EMIT(xed_encoder_request_t* xes)
1744 {
1745 /* NELEM_QUARTERMEM()::
1746 */
1747 xed_uint_t okay=1;
1748 return 1;
1749 (void) okay;
1750 (void) xes;
1751 }
xed_encode_nonterminal_REMOVE_SEGMENT_AGEN1_EMIT(xed_encoder_request_t * xes)1752 xed_uint_t xed_encode_nonterminal_REMOVE_SEGMENT_AGEN1_EMIT(xed_encoder_request_t* xes)
1753 {
1754 /* REMOVE_SEGMENT_AGEN1()::
1755 SEG0=@ -> nothing
1756 SEG0=XED_REG_DS -> FB ERROR=XED_ERROR_GENERAL_ERROR
1757 SEG0=XED_REG_CS -> FB ERROR=XED_ERROR_GENERAL_ERROR
1758 SEG0=XED_REG_ES -> FB ERROR=XED_ERROR_GENERAL_ERROR
1759 SEG0=XED_REG_FS -> FB ERROR=XED_ERROR_GENERAL_ERROR
1760 SEG0=XED_REG_GS -> FB ERROR=XED_ERROR_GENERAL_ERROR
1761 SEG0=XED_REG_SS -> FB ERROR=XED_ERROR_GENERAL_ERROR
1762 */
1763 xed_uint_t okay=1;
1764 return 1;
1765 (void) okay;
1766 (void) xes;
1767 }
xed_encode_nonterminal_DISP_NT_EMIT(xed_encoder_request_t * xes)1768 xed_uint_t xed_encode_nonterminal_DISP_NT_EMIT(xed_encoder_request_t* xes)
1769 {
1770 /* DISP_NT()::
1771 DISP_WIDTH=8 DISP[dddddddd]=* -> emit dddddddd emit_type=letters nbits=8
1772 DISP_WIDTH=16 DISP[dddddddddddddddd]=* -> emit dddddddddddddddd emit_type=letters nbits=16
1773 DISP_WIDTH=32 DISP[dddddddddddddddddddddddddddddddd]=* -> emit dddddddddddddddddddddddddddddddd emit_type=letters nbits=32
1774 DISP_WIDTH=64 DISP[dddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddd]=* -> emit dddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddd emit_type=letters nbits=64
1775 */
1776 xed_uint_t okay=1;
1777 unsigned int iform = xed_encoder_request_iforms(xes)->x_DISP_NT;
1778 /* 1 */ if (iform==1) {
1779 xed_encoder_request_encode_emit(xes,8,(xed3_operand_get_disp(xes)));
1780 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1781 return okay;
1782 }
1783 /* 4 */ if (iform==4) {
1784 xed_encoder_request_encode_emit(xes,16,(xed3_operand_get_disp(xes)));
1785 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1786 return okay;
1787 }
1788 /* 2 */ if (iform==2) {
1789 xed_encoder_request_encode_emit(xes,32,(xed3_operand_get_disp(xes)));
1790 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1791 return okay;
1792 }
1793 /* 3 */ if (iform==3) {
1794 xed_encoder_request_encode_emit(xes,64,(xed3_operand_get_disp(xes)));
1795 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1796 return okay;
1797 }
1798 if (1) { /*otherwise*/
1799 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
1800 return okay;
1801 }
1802 return 0; /*pacify the compiler*/
1803 (void) okay;
1804 (void) xes;
1805 (void) iform;
1806 }
xed_encode_nonterminal_VMODRM_MOD_ENCODE_BIND(xed_encoder_request_t * xes)1807 xed_uint_t xed_encode_nonterminal_VMODRM_MOD_ENCODE_BIND(xed_encoder_request_t* xes)
1808 {
1809 /* VMODRM_MOD_ENCODE()::
1810 EASZ=2 DISP_WIDTH=8 -> FB MOD=1 value=0x1
1811 EASZ=2 DISP_WIDTH=32 BASE0=@ -> FB MOD=0 value=0x0
1812 EASZ=3 DISP_WIDTH=32 BASE0=@ -> FB MOD=0 value=0x0
1813 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_AX EASZ=1 -> FB MOD=0 value=0x0
1814 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_EAX EASZ=2 -> FB MOD=0 value=0x0
1815 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_RAX EASZ=3 -> FB MOD=0 value=0x0
1816 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_BX EASZ=1 -> FB MOD=0 value=0x0
1817 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_EBX EASZ=2 -> FB MOD=0 value=0x0
1818 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_RBX EASZ=3 -> FB MOD=0 value=0x0
1819 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_CX EASZ=1 -> FB MOD=0 value=0x0
1820 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_ECX EASZ=2 -> FB MOD=0 value=0x0
1821 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_RCX EASZ=3 -> FB MOD=0 value=0x0
1822 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_DX EASZ=1 -> FB MOD=0 value=0x0
1823 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_EDX EASZ=2 -> FB MOD=0 value=0x0
1824 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_RDX EASZ=3 -> FB MOD=0 value=0x0
1825 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_SI EASZ=1 -> FB MOD=0 value=0x0
1826 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_ESI EASZ=2 -> FB MOD=0 value=0x0
1827 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_RSI EASZ=3 -> FB MOD=0 value=0x0
1828 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_DI EASZ=1 -> FB MOD=0 value=0x0
1829 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_EDI EASZ=2 -> FB MOD=0 value=0x0
1830 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_RDI EASZ=3 -> FB MOD=0 value=0x0
1831 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_SP EASZ=1 -> FB MOD=0 value=0x0
1832 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_ESP EASZ=2 -> FB MOD=0 value=0x0
1833 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_RSP EASZ=3 -> FB MOD=0 value=0x0
1834 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R8W EASZ=1 -> FB MOD=0 value=0x0
1835 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R8D EASZ=2 -> FB MOD=0 value=0x0
1836 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R8 EASZ=3 -> FB MOD=0 value=0x0
1837 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R9W EASZ=1 -> FB MOD=0 value=0x0
1838 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R9D EASZ=2 -> FB MOD=0 value=0x0
1839 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R9 EASZ=3 -> FB MOD=0 value=0x0
1840 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R10W EASZ=1 -> FB MOD=0 value=0x0
1841 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R10D EASZ=2 -> FB MOD=0 value=0x0
1842 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R10 EASZ=3 -> FB MOD=0 value=0x0
1843 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R11W EASZ=1 -> FB MOD=0 value=0x0
1844 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R11D EASZ=2 -> FB MOD=0 value=0x0
1845 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R11 EASZ=3 -> FB MOD=0 value=0x0
1846 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R12W EASZ=1 -> FB MOD=0 value=0x0
1847 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R12D EASZ=2 -> FB MOD=0 value=0x0
1848 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R12 EASZ=3 -> FB MOD=0 value=0x0
1849 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R14W EASZ=1 -> FB MOD=0 value=0x0
1850 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R14D EASZ=2 -> FB MOD=0 value=0x0
1851 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R14 EASZ=3 -> FB MOD=0 value=0x0
1852 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R15W EASZ=1 -> FB MOD=0 value=0x0
1853 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R15D EASZ=2 -> FB MOD=0 value=0x0
1854 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R15 EASZ=3 -> FB MOD=0 value=0x0
1855 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_AX EASZ=1 -> FB MOD=0 value=0x0
1856 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_EAX EASZ=2 -> FB MOD=0 value=0x0
1857 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_RAX EASZ=3 -> FB MOD=0 value=0x0
1858 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_BX EASZ=1 -> FB MOD=0 value=0x0
1859 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_EBX EASZ=2 -> FB MOD=0 value=0x0
1860 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_RBX EASZ=3 -> FB MOD=0 value=0x0
1861 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_CX EASZ=1 -> FB MOD=0 value=0x0
1862 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_ECX EASZ=2 -> FB MOD=0 value=0x0
1863 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_RCX EASZ=3 -> FB MOD=0 value=0x0
1864 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_DX EASZ=1 -> FB MOD=0 value=0x0
1865 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_EDX EASZ=2 -> FB MOD=0 value=0x0
1866 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_RDX EASZ=3 -> FB MOD=0 value=0x0
1867 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_SI EASZ=1 -> FB MOD=0 value=0x0
1868 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_ESI EASZ=2 -> FB MOD=0 value=0x0
1869 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_RSI EASZ=3 -> FB MOD=0 value=0x0
1870 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_DI EASZ=1 -> FB MOD=0 value=0x0
1871 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_EDI EASZ=2 -> FB MOD=0 value=0x0
1872 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_RDI EASZ=3 -> FB MOD=0 value=0x0
1873 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_SP EASZ=1 -> FB MOD=0 value=0x0
1874 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_ESP EASZ=2 -> FB MOD=0 value=0x0
1875 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_RSP EASZ=3 -> FB MOD=0 value=0x0
1876 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R8W EASZ=1 -> FB MOD=0 value=0x0
1877 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R8D EASZ=2 -> FB MOD=0 value=0x0
1878 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R8 EASZ=3 -> FB MOD=0 value=0x0
1879 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R9W EASZ=1 -> FB MOD=0 value=0x0
1880 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R9D EASZ=2 -> FB MOD=0 value=0x0
1881 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R9 EASZ=3 -> FB MOD=0 value=0x0
1882 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R10W EASZ=1 -> FB MOD=0 value=0x0
1883 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R10D EASZ=2 -> FB MOD=0 value=0x0
1884 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R10 EASZ=3 -> FB MOD=0 value=0x0
1885 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R11W EASZ=1 -> FB MOD=0 value=0x0
1886 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R11D EASZ=2 -> FB MOD=0 value=0x0
1887 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R11 EASZ=3 -> FB MOD=0 value=0x0
1888 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R12W EASZ=1 -> FB MOD=0 value=0x0
1889 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R12D EASZ=2 -> FB MOD=0 value=0x0
1890 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R12 EASZ=3 -> FB MOD=0 value=0x0
1891 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R14W EASZ=1 -> FB MOD=0 value=0x0
1892 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R14D EASZ=2 -> FB MOD=0 value=0x0
1893 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R14 EASZ=3 -> FB MOD=0 value=0x0
1894 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R15W EASZ=1 -> FB MOD=0 value=0x0
1895 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R15D EASZ=2 -> FB MOD=0 value=0x0
1896 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R15 EASZ=3 -> FB MOD=0 value=0x0
1897 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_RAX -> FB MOD=1 value=0x1
1898 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_RBX -> FB MOD=1 value=0x1
1899 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_RCX -> FB MOD=1 value=0x1
1900 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_RDX -> FB MOD=1 value=0x1
1901 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_RSP -> FB MOD=1 value=0x1
1902 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_RBP -> FB MOD=1 value=0x1
1903 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_RSI -> FB MOD=1 value=0x1
1904 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_RDI -> FB MOD=1 value=0x1
1905 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_R8 -> FB MOD=1 value=0x1
1906 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_R9 -> FB MOD=1 value=0x1
1907 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_R10 -> FB MOD=1 value=0x1
1908 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_R11 -> FB MOD=1 value=0x1
1909 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_R12 -> FB MOD=1 value=0x1
1910 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_R13 -> FB MOD=1 value=0x1
1911 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_R14 -> FB MOD=1 value=0x1
1912 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_R15 -> FB MOD=1 value=0x1
1913 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_AX EASZ=1 -> FB MOD=2 value=0x2
1914 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_EAX EASZ=2 -> FB MOD=2 value=0x2
1915 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_RAX EASZ=3 -> FB MOD=2 value=0x2
1916 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_BX EASZ=1 -> FB MOD=2 value=0x2
1917 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_EBX EASZ=2 -> FB MOD=2 value=0x2
1918 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_RBX EASZ=3 -> FB MOD=2 value=0x2
1919 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_CX EASZ=1 -> FB MOD=2 value=0x2
1920 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_ECX EASZ=2 -> FB MOD=2 value=0x2
1921 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_RCX EASZ=3 -> FB MOD=2 value=0x2
1922 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_DX EASZ=1 -> FB MOD=2 value=0x2
1923 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_EDX EASZ=2 -> FB MOD=2 value=0x2
1924 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_RDX EASZ=3 -> FB MOD=2 value=0x2
1925 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_SI EASZ=1 -> FB MOD=2 value=0x2
1926 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_ESI EASZ=2 -> FB MOD=2 value=0x2
1927 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_RSI EASZ=3 -> FB MOD=2 value=0x2
1928 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_DI EASZ=1 -> FB MOD=2 value=0x2
1929 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_EDI EASZ=2 -> FB MOD=2 value=0x2
1930 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_RDI EASZ=3 -> FB MOD=2 value=0x2
1931 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_SP EASZ=1 -> FB MOD=2 value=0x2
1932 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_ESP EASZ=2 -> FB MOD=2 value=0x2
1933 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_RSP EASZ=3 -> FB MOD=2 value=0x2
1934 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_BP EASZ=1 -> FB MOD=2 value=0x2
1935 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_EBP EASZ=2 -> FB MOD=2 value=0x2
1936 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_RBP EASZ=3 -> FB MOD=2 value=0x2
1937 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R8W EASZ=1 -> FB MOD=2 value=0x2
1938 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R8D EASZ=2 -> FB MOD=2 value=0x2
1939 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R8 EASZ=3 -> FB MOD=2 value=0x2
1940 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R9W EASZ=1 -> FB MOD=2 value=0x2
1941 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R9D EASZ=2 -> FB MOD=2 value=0x2
1942 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R9 EASZ=3 -> FB MOD=2 value=0x2
1943 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R10W EASZ=1 -> FB MOD=2 value=0x2
1944 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R10D EASZ=2 -> FB MOD=2 value=0x2
1945 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R10 EASZ=3 -> FB MOD=2 value=0x2
1946 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R11W EASZ=1 -> FB MOD=2 value=0x2
1947 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R11D EASZ=2 -> FB MOD=2 value=0x2
1948 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R11 EASZ=3 -> FB MOD=2 value=0x2
1949 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R12W EASZ=1 -> FB MOD=2 value=0x2
1950 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R12D EASZ=2 -> FB MOD=2 value=0x2
1951 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R12 EASZ=3 -> FB MOD=2 value=0x2
1952 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R13W EASZ=1 -> FB MOD=2 value=0x2
1953 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R13D EASZ=2 -> FB MOD=2 value=0x2
1954 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R13 EASZ=3 -> FB MOD=2 value=0x2
1955 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R14W EASZ=1 -> FB MOD=2 value=0x2
1956 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R14D EASZ=2 -> FB MOD=2 value=0x2
1957 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R14 EASZ=3 -> FB MOD=2 value=0x2
1958 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R15W EASZ=1 -> FB MOD=2 value=0x2
1959 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R15D EASZ=2 -> FB MOD=2 value=0x2
1960 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R15 EASZ=3 -> FB MOD=2 value=0x2
1961 EASZ=2 DISP_WIDTH=32 MODE=1 BASE0=XED_REG_EAX -> FB MOD=2 value=0x2
1962 EASZ=2 DISP_WIDTH=32 MODE=1 BASE0=XED_REG_EBX -> FB MOD=2 value=0x2
1963 EASZ=2 DISP_WIDTH=32 MODE=1 BASE0=XED_REG_ECX -> FB MOD=2 value=0x2
1964 EASZ=2 DISP_WIDTH=32 MODE=1 BASE0=XED_REG_EDX -> FB MOD=2 value=0x2
1965 EASZ=2 DISP_WIDTH=32 MODE=1 BASE0=XED_REG_ESP -> FB MOD=2 value=0x2
1966 EASZ=2 DISP_WIDTH=32 MODE=1 BASE0=XED_REG_EBP -> FB MOD=2 value=0x2
1967 EASZ=2 DISP_WIDTH=32 MODE=1 BASE0=XED_REG_ESI -> FB MOD=2 value=0x2
1968 EASZ=2 DISP_WIDTH=32 MODE=1 BASE0=XED_REG_EDI -> FB MOD=2 value=0x2
1969 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_EAX -> FB MOD=2 value=0x2
1970 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_EBX -> FB MOD=2 value=0x2
1971 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_ECX -> FB MOD=2 value=0x2
1972 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_EDX -> FB MOD=2 value=0x2
1973 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_ESP -> FB MOD=2 value=0x2
1974 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_EBP -> FB MOD=2 value=0x2
1975 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_ESI -> FB MOD=2 value=0x2
1976 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_EDI -> FB MOD=2 value=0x2
1977 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_R8D -> FB MOD=2 value=0x2
1978 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_R9D -> FB MOD=2 value=0x2
1979 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_R10D -> FB MOD=2 value=0x2
1980 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_R11D -> FB MOD=2 value=0x2
1981 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_R12D -> FB MOD=2 value=0x2
1982 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_R13D -> FB MOD=2 value=0x2
1983 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_R14D -> FB MOD=2 value=0x2
1984 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_R15D -> FB MOD=2 value=0x2
1985 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_BP EASZ=1 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
1986 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_EBP EASZ=2 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
1987 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_RBP EASZ=3 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
1988 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_R13W EASZ=1 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
1989 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_R13D EASZ=2 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
1990 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_R13 EASZ=3 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
1991 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_BP EASZ=1 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
1992 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_EBP EASZ=2 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
1993 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_RBP EASZ=3 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
1994 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R13W EASZ=1 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
1995 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R13D EASZ=2 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
1996 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R13 EASZ=3 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
1997 */
1998 xed_uint_t okay=1;
1999 xed_uint_t conditions_satisfied=0;
2000 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2001 (xed3_operand_get_disp_width(xes) == 8);
2002 if (conditions_satisfied) {
2003 okay=1;
2004 xed3_operand_set_mod(xes,1);
2005 if (okay) return 1;
2006 }
2007 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2008 (xed3_operand_get_disp_width(xes) == 32) &&
2009 (xed3_operand_get_base0(xes) == XED_REG_INVALID);
2010 if (conditions_satisfied) {
2011 okay=1;
2012 xed3_operand_set_mod(xes,0);
2013 if (okay) return 1;
2014 }
2015 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2016 (xed3_operand_get_disp_width(xes) == 32) &&
2017 (xed3_operand_get_base0(xes) == XED_REG_INVALID);
2018 if (conditions_satisfied) {
2019 okay=1;
2020 xed3_operand_set_mod(xes,0);
2021 if (okay) return 1;
2022 }
2023 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2024 (xed3_operand_get_disp_width(xes) == 0) &&
2025 (xed3_operand_get_base0(xes) == XED_REG_AX) &&
2026 (xed3_operand_get_easz(xes) == 1);
2027 if (conditions_satisfied) {
2028 okay=1;
2029 xed3_operand_set_mod(xes,0);
2030 if (okay) return 1;
2031 }
2032 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2033 (xed3_operand_get_disp_width(xes) == 0) &&
2034 (xed3_operand_get_base0(xes) == XED_REG_EAX) &&
2035 (xed3_operand_get_easz(xes) == 2);
2036 if (conditions_satisfied) {
2037 okay=1;
2038 xed3_operand_set_mod(xes,0);
2039 if (okay) return 1;
2040 }
2041 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2042 (xed3_operand_get_disp_width(xes) == 0) &&
2043 (xed3_operand_get_base0(xes) == XED_REG_RAX) &&
2044 (xed3_operand_get_easz(xes) == 3);
2045 if (conditions_satisfied) {
2046 okay=1;
2047 xed3_operand_set_mod(xes,0);
2048 if (okay) return 1;
2049 }
2050 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2051 (xed3_operand_get_disp_width(xes) == 0) &&
2052 (xed3_operand_get_base0(xes) == XED_REG_BX) &&
2053 (xed3_operand_get_easz(xes) == 1);
2054 if (conditions_satisfied) {
2055 okay=1;
2056 xed3_operand_set_mod(xes,0);
2057 if (okay) return 1;
2058 }
2059 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2060 (xed3_operand_get_disp_width(xes) == 0) &&
2061 (xed3_operand_get_base0(xes) == XED_REG_EBX) &&
2062 (xed3_operand_get_easz(xes) == 2);
2063 if (conditions_satisfied) {
2064 okay=1;
2065 xed3_operand_set_mod(xes,0);
2066 if (okay) return 1;
2067 }
2068 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2069 (xed3_operand_get_disp_width(xes) == 0) &&
2070 (xed3_operand_get_base0(xes) == XED_REG_RBX) &&
2071 (xed3_operand_get_easz(xes) == 3);
2072 if (conditions_satisfied) {
2073 okay=1;
2074 xed3_operand_set_mod(xes,0);
2075 if (okay) return 1;
2076 }
2077 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2078 (xed3_operand_get_disp_width(xes) == 0) &&
2079 (xed3_operand_get_base0(xes) == XED_REG_CX) &&
2080 (xed3_operand_get_easz(xes) == 1);
2081 if (conditions_satisfied) {
2082 okay=1;
2083 xed3_operand_set_mod(xes,0);
2084 if (okay) return 1;
2085 }
2086 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2087 (xed3_operand_get_disp_width(xes) == 0) &&
2088 (xed3_operand_get_base0(xes) == XED_REG_ECX) &&
2089 (xed3_operand_get_easz(xes) == 2);
2090 if (conditions_satisfied) {
2091 okay=1;
2092 xed3_operand_set_mod(xes,0);
2093 if (okay) return 1;
2094 }
2095 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2096 (xed3_operand_get_disp_width(xes) == 0) &&
2097 (xed3_operand_get_base0(xes) == XED_REG_RCX) &&
2098 (xed3_operand_get_easz(xes) == 3);
2099 if (conditions_satisfied) {
2100 okay=1;
2101 xed3_operand_set_mod(xes,0);
2102 if (okay) return 1;
2103 }
2104 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2105 (xed3_operand_get_disp_width(xes) == 0) &&
2106 (xed3_operand_get_base0(xes) == XED_REG_DX) &&
2107 (xed3_operand_get_easz(xes) == 1);
2108 if (conditions_satisfied) {
2109 okay=1;
2110 xed3_operand_set_mod(xes,0);
2111 if (okay) return 1;
2112 }
2113 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2114 (xed3_operand_get_disp_width(xes) == 0) &&
2115 (xed3_operand_get_base0(xes) == XED_REG_EDX) &&
2116 (xed3_operand_get_easz(xes) == 2);
2117 if (conditions_satisfied) {
2118 okay=1;
2119 xed3_operand_set_mod(xes,0);
2120 if (okay) return 1;
2121 }
2122 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2123 (xed3_operand_get_disp_width(xes) == 0) &&
2124 (xed3_operand_get_base0(xes) == XED_REG_RDX) &&
2125 (xed3_operand_get_easz(xes) == 3);
2126 if (conditions_satisfied) {
2127 okay=1;
2128 xed3_operand_set_mod(xes,0);
2129 if (okay) return 1;
2130 }
2131 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2132 (xed3_operand_get_disp_width(xes) == 0) &&
2133 (xed3_operand_get_base0(xes) == XED_REG_SI) &&
2134 (xed3_operand_get_easz(xes) == 1);
2135 if (conditions_satisfied) {
2136 okay=1;
2137 xed3_operand_set_mod(xes,0);
2138 if (okay) return 1;
2139 }
2140 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2141 (xed3_operand_get_disp_width(xes) == 0) &&
2142 (xed3_operand_get_base0(xes) == XED_REG_ESI) &&
2143 (xed3_operand_get_easz(xes) == 2);
2144 if (conditions_satisfied) {
2145 okay=1;
2146 xed3_operand_set_mod(xes,0);
2147 if (okay) return 1;
2148 }
2149 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2150 (xed3_operand_get_disp_width(xes) == 0) &&
2151 (xed3_operand_get_base0(xes) == XED_REG_RSI) &&
2152 (xed3_operand_get_easz(xes) == 3);
2153 if (conditions_satisfied) {
2154 okay=1;
2155 xed3_operand_set_mod(xes,0);
2156 if (okay) return 1;
2157 }
2158 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2159 (xed3_operand_get_disp_width(xes) == 0) &&
2160 (xed3_operand_get_base0(xes) == XED_REG_DI) &&
2161 (xed3_operand_get_easz(xes) == 1);
2162 if (conditions_satisfied) {
2163 okay=1;
2164 xed3_operand_set_mod(xes,0);
2165 if (okay) return 1;
2166 }
2167 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2168 (xed3_operand_get_disp_width(xes) == 0) &&
2169 (xed3_operand_get_base0(xes) == XED_REG_EDI) &&
2170 (xed3_operand_get_easz(xes) == 2);
2171 if (conditions_satisfied) {
2172 okay=1;
2173 xed3_operand_set_mod(xes,0);
2174 if (okay) return 1;
2175 }
2176 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2177 (xed3_operand_get_disp_width(xes) == 0) &&
2178 (xed3_operand_get_base0(xes) == XED_REG_RDI) &&
2179 (xed3_operand_get_easz(xes) == 3);
2180 if (conditions_satisfied) {
2181 okay=1;
2182 xed3_operand_set_mod(xes,0);
2183 if (okay) return 1;
2184 }
2185 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2186 (xed3_operand_get_disp_width(xes) == 0) &&
2187 (xed3_operand_get_base0(xes) == XED_REG_SP) &&
2188 (xed3_operand_get_easz(xes) == 1);
2189 if (conditions_satisfied) {
2190 okay=1;
2191 xed3_operand_set_mod(xes,0);
2192 if (okay) return 1;
2193 }
2194 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2195 (xed3_operand_get_disp_width(xes) == 0) &&
2196 (xed3_operand_get_base0(xes) == XED_REG_ESP) &&
2197 (xed3_operand_get_easz(xes) == 2);
2198 if (conditions_satisfied) {
2199 okay=1;
2200 xed3_operand_set_mod(xes,0);
2201 if (okay) return 1;
2202 }
2203 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2204 (xed3_operand_get_disp_width(xes) == 0) &&
2205 (xed3_operand_get_base0(xes) == XED_REG_RSP) &&
2206 (xed3_operand_get_easz(xes) == 3);
2207 if (conditions_satisfied) {
2208 okay=1;
2209 xed3_operand_set_mod(xes,0);
2210 if (okay) return 1;
2211 }
2212 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2213 (xed3_operand_get_disp_width(xes) == 0) &&
2214 (xed3_operand_get_mode(xes) == 2) &&
2215 (xed3_operand_get_base0(xes) == XED_REG_R8W) &&
2216 (xed3_operand_get_easz(xes) == 1);
2217 if (conditions_satisfied) {
2218 okay=1;
2219 xed3_operand_set_mod(xes,0);
2220 if (okay) return 1;
2221 }
2222 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2223 (xed3_operand_get_disp_width(xes) == 0) &&
2224 (xed3_operand_get_mode(xes) == 2) &&
2225 (xed3_operand_get_base0(xes) == XED_REG_R8D) &&
2226 (xed3_operand_get_easz(xes) == 2);
2227 if (conditions_satisfied) {
2228 okay=1;
2229 xed3_operand_set_mod(xes,0);
2230 if (okay) return 1;
2231 }
2232 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2233 (xed3_operand_get_disp_width(xes) == 0) &&
2234 (xed3_operand_get_mode(xes) == 2) &&
2235 (xed3_operand_get_base0(xes) == XED_REG_R8) &&
2236 (xed3_operand_get_easz(xes) == 3);
2237 if (conditions_satisfied) {
2238 okay=1;
2239 xed3_operand_set_mod(xes,0);
2240 if (okay) return 1;
2241 }
2242 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2243 (xed3_operand_get_disp_width(xes) == 0) &&
2244 (xed3_operand_get_mode(xes) == 2) &&
2245 (xed3_operand_get_base0(xes) == XED_REG_R9W) &&
2246 (xed3_operand_get_easz(xes) == 1);
2247 if (conditions_satisfied) {
2248 okay=1;
2249 xed3_operand_set_mod(xes,0);
2250 if (okay) return 1;
2251 }
2252 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2253 (xed3_operand_get_disp_width(xes) == 0) &&
2254 (xed3_operand_get_mode(xes) == 2) &&
2255 (xed3_operand_get_base0(xes) == XED_REG_R9D) &&
2256 (xed3_operand_get_easz(xes) == 2);
2257 if (conditions_satisfied) {
2258 okay=1;
2259 xed3_operand_set_mod(xes,0);
2260 if (okay) return 1;
2261 }
2262 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2263 (xed3_operand_get_disp_width(xes) == 0) &&
2264 (xed3_operand_get_mode(xes) == 2) &&
2265 (xed3_operand_get_base0(xes) == XED_REG_R9) &&
2266 (xed3_operand_get_easz(xes) == 3);
2267 if (conditions_satisfied) {
2268 okay=1;
2269 xed3_operand_set_mod(xes,0);
2270 if (okay) return 1;
2271 }
2272 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2273 (xed3_operand_get_disp_width(xes) == 0) &&
2274 (xed3_operand_get_mode(xes) == 2) &&
2275 (xed3_operand_get_base0(xes) == XED_REG_R10W) &&
2276 (xed3_operand_get_easz(xes) == 1);
2277 if (conditions_satisfied) {
2278 okay=1;
2279 xed3_operand_set_mod(xes,0);
2280 if (okay) return 1;
2281 }
2282 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2283 (xed3_operand_get_disp_width(xes) == 0) &&
2284 (xed3_operand_get_mode(xes) == 2) &&
2285 (xed3_operand_get_base0(xes) == XED_REG_R10D) &&
2286 (xed3_operand_get_easz(xes) == 2);
2287 if (conditions_satisfied) {
2288 okay=1;
2289 xed3_operand_set_mod(xes,0);
2290 if (okay) return 1;
2291 }
2292 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2293 (xed3_operand_get_disp_width(xes) == 0) &&
2294 (xed3_operand_get_mode(xes) == 2) &&
2295 (xed3_operand_get_base0(xes) == XED_REG_R10) &&
2296 (xed3_operand_get_easz(xes) == 3);
2297 if (conditions_satisfied) {
2298 okay=1;
2299 xed3_operand_set_mod(xes,0);
2300 if (okay) return 1;
2301 }
2302 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2303 (xed3_operand_get_disp_width(xes) == 0) &&
2304 (xed3_operand_get_mode(xes) == 2) &&
2305 (xed3_operand_get_base0(xes) == XED_REG_R11W) &&
2306 (xed3_operand_get_easz(xes) == 1);
2307 if (conditions_satisfied) {
2308 okay=1;
2309 xed3_operand_set_mod(xes,0);
2310 if (okay) return 1;
2311 }
2312 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2313 (xed3_operand_get_disp_width(xes) == 0) &&
2314 (xed3_operand_get_mode(xes) == 2) &&
2315 (xed3_operand_get_base0(xes) == XED_REG_R11D) &&
2316 (xed3_operand_get_easz(xes) == 2);
2317 if (conditions_satisfied) {
2318 okay=1;
2319 xed3_operand_set_mod(xes,0);
2320 if (okay) return 1;
2321 }
2322 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2323 (xed3_operand_get_disp_width(xes) == 0) &&
2324 (xed3_operand_get_mode(xes) == 2) &&
2325 (xed3_operand_get_base0(xes) == XED_REG_R11) &&
2326 (xed3_operand_get_easz(xes) == 3);
2327 if (conditions_satisfied) {
2328 okay=1;
2329 xed3_operand_set_mod(xes,0);
2330 if (okay) return 1;
2331 }
2332 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2333 (xed3_operand_get_disp_width(xes) == 0) &&
2334 (xed3_operand_get_mode(xes) == 2) &&
2335 (xed3_operand_get_base0(xes) == XED_REG_R12W) &&
2336 (xed3_operand_get_easz(xes) == 1);
2337 if (conditions_satisfied) {
2338 okay=1;
2339 xed3_operand_set_mod(xes,0);
2340 if (okay) return 1;
2341 }
2342 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2343 (xed3_operand_get_disp_width(xes) == 0) &&
2344 (xed3_operand_get_mode(xes) == 2) &&
2345 (xed3_operand_get_base0(xes) == XED_REG_R12D) &&
2346 (xed3_operand_get_easz(xes) == 2);
2347 if (conditions_satisfied) {
2348 okay=1;
2349 xed3_operand_set_mod(xes,0);
2350 if (okay) return 1;
2351 }
2352 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2353 (xed3_operand_get_disp_width(xes) == 0) &&
2354 (xed3_operand_get_mode(xes) == 2) &&
2355 (xed3_operand_get_base0(xes) == XED_REG_R12) &&
2356 (xed3_operand_get_easz(xes) == 3);
2357 if (conditions_satisfied) {
2358 okay=1;
2359 xed3_operand_set_mod(xes,0);
2360 if (okay) return 1;
2361 }
2362 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2363 (xed3_operand_get_disp_width(xes) == 0) &&
2364 (xed3_operand_get_mode(xes) == 2) &&
2365 (xed3_operand_get_base0(xes) == XED_REG_R14W) &&
2366 (xed3_operand_get_easz(xes) == 1);
2367 if (conditions_satisfied) {
2368 okay=1;
2369 xed3_operand_set_mod(xes,0);
2370 if (okay) return 1;
2371 }
2372 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2373 (xed3_operand_get_disp_width(xes) == 0) &&
2374 (xed3_operand_get_mode(xes) == 2) &&
2375 (xed3_operand_get_base0(xes) == XED_REG_R14D) &&
2376 (xed3_operand_get_easz(xes) == 2);
2377 if (conditions_satisfied) {
2378 okay=1;
2379 xed3_operand_set_mod(xes,0);
2380 if (okay) return 1;
2381 }
2382 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2383 (xed3_operand_get_disp_width(xes) == 0) &&
2384 (xed3_operand_get_mode(xes) == 2) &&
2385 (xed3_operand_get_base0(xes) == XED_REG_R14) &&
2386 (xed3_operand_get_easz(xes) == 3);
2387 if (conditions_satisfied) {
2388 okay=1;
2389 xed3_operand_set_mod(xes,0);
2390 if (okay) return 1;
2391 }
2392 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2393 (xed3_operand_get_disp_width(xes) == 0) &&
2394 (xed3_operand_get_mode(xes) == 2) &&
2395 (xed3_operand_get_base0(xes) == XED_REG_R15W) &&
2396 (xed3_operand_get_easz(xes) == 1);
2397 if (conditions_satisfied) {
2398 okay=1;
2399 xed3_operand_set_mod(xes,0);
2400 if (okay) return 1;
2401 }
2402 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2403 (xed3_operand_get_disp_width(xes) == 0) &&
2404 (xed3_operand_get_mode(xes) == 2) &&
2405 (xed3_operand_get_base0(xes) == XED_REG_R15D) &&
2406 (xed3_operand_get_easz(xes) == 2);
2407 if (conditions_satisfied) {
2408 okay=1;
2409 xed3_operand_set_mod(xes,0);
2410 if (okay) return 1;
2411 }
2412 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
2413 (xed3_operand_get_disp_width(xes) == 0) &&
2414 (xed3_operand_get_mode(xes) == 2) &&
2415 (xed3_operand_get_base0(xes) == XED_REG_R15) &&
2416 (xed3_operand_get_easz(xes) == 3);
2417 if (conditions_satisfied) {
2418 okay=1;
2419 xed3_operand_set_mod(xes,0);
2420 if (okay) return 1;
2421 }
2422 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2423 (xed3_operand_get_disp_width(xes) == 0) &&
2424 (xed3_operand_get_base0(xes) == XED_REG_AX) &&
2425 (xed3_operand_get_easz(xes) == 1);
2426 if (conditions_satisfied) {
2427 okay=1;
2428 xed3_operand_set_mod(xes,0);
2429 if (okay) return 1;
2430 }
2431 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2432 (xed3_operand_get_disp_width(xes) == 0) &&
2433 (xed3_operand_get_base0(xes) == XED_REG_EAX) &&
2434 (xed3_operand_get_easz(xes) == 2);
2435 if (conditions_satisfied) {
2436 okay=1;
2437 xed3_operand_set_mod(xes,0);
2438 if (okay) return 1;
2439 }
2440 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2441 (xed3_operand_get_disp_width(xes) == 0) &&
2442 (xed3_operand_get_base0(xes) == XED_REG_RAX) &&
2443 (xed3_operand_get_easz(xes) == 3);
2444 if (conditions_satisfied) {
2445 okay=1;
2446 xed3_operand_set_mod(xes,0);
2447 if (okay) return 1;
2448 }
2449 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2450 (xed3_operand_get_disp_width(xes) == 0) &&
2451 (xed3_operand_get_base0(xes) == XED_REG_BX) &&
2452 (xed3_operand_get_easz(xes) == 1);
2453 if (conditions_satisfied) {
2454 okay=1;
2455 xed3_operand_set_mod(xes,0);
2456 if (okay) return 1;
2457 }
2458 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2459 (xed3_operand_get_disp_width(xes) == 0) &&
2460 (xed3_operand_get_base0(xes) == XED_REG_EBX) &&
2461 (xed3_operand_get_easz(xes) == 2);
2462 if (conditions_satisfied) {
2463 okay=1;
2464 xed3_operand_set_mod(xes,0);
2465 if (okay) return 1;
2466 }
2467 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2468 (xed3_operand_get_disp_width(xes) == 0) &&
2469 (xed3_operand_get_base0(xes) == XED_REG_RBX) &&
2470 (xed3_operand_get_easz(xes) == 3);
2471 if (conditions_satisfied) {
2472 okay=1;
2473 xed3_operand_set_mod(xes,0);
2474 if (okay) return 1;
2475 }
2476 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2477 (xed3_operand_get_disp_width(xes) == 0) &&
2478 (xed3_operand_get_base0(xes) == XED_REG_CX) &&
2479 (xed3_operand_get_easz(xes) == 1);
2480 if (conditions_satisfied) {
2481 okay=1;
2482 xed3_operand_set_mod(xes,0);
2483 if (okay) return 1;
2484 }
2485 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2486 (xed3_operand_get_disp_width(xes) == 0) &&
2487 (xed3_operand_get_base0(xes) == XED_REG_ECX) &&
2488 (xed3_operand_get_easz(xes) == 2);
2489 if (conditions_satisfied) {
2490 okay=1;
2491 xed3_operand_set_mod(xes,0);
2492 if (okay) return 1;
2493 }
2494 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2495 (xed3_operand_get_disp_width(xes) == 0) &&
2496 (xed3_operand_get_base0(xes) == XED_REG_RCX) &&
2497 (xed3_operand_get_easz(xes) == 3);
2498 if (conditions_satisfied) {
2499 okay=1;
2500 xed3_operand_set_mod(xes,0);
2501 if (okay) return 1;
2502 }
2503 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2504 (xed3_operand_get_disp_width(xes) == 0) &&
2505 (xed3_operand_get_base0(xes) == XED_REG_DX) &&
2506 (xed3_operand_get_easz(xes) == 1);
2507 if (conditions_satisfied) {
2508 okay=1;
2509 xed3_operand_set_mod(xes,0);
2510 if (okay) return 1;
2511 }
2512 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2513 (xed3_operand_get_disp_width(xes) == 0) &&
2514 (xed3_operand_get_base0(xes) == XED_REG_EDX) &&
2515 (xed3_operand_get_easz(xes) == 2);
2516 if (conditions_satisfied) {
2517 okay=1;
2518 xed3_operand_set_mod(xes,0);
2519 if (okay) return 1;
2520 }
2521 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2522 (xed3_operand_get_disp_width(xes) == 0) &&
2523 (xed3_operand_get_base0(xes) == XED_REG_RDX) &&
2524 (xed3_operand_get_easz(xes) == 3);
2525 if (conditions_satisfied) {
2526 okay=1;
2527 xed3_operand_set_mod(xes,0);
2528 if (okay) return 1;
2529 }
2530 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2531 (xed3_operand_get_disp_width(xes) == 0) &&
2532 (xed3_operand_get_base0(xes) == XED_REG_SI) &&
2533 (xed3_operand_get_easz(xes) == 1);
2534 if (conditions_satisfied) {
2535 okay=1;
2536 xed3_operand_set_mod(xes,0);
2537 if (okay) return 1;
2538 }
2539 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2540 (xed3_operand_get_disp_width(xes) == 0) &&
2541 (xed3_operand_get_base0(xes) == XED_REG_ESI) &&
2542 (xed3_operand_get_easz(xes) == 2);
2543 if (conditions_satisfied) {
2544 okay=1;
2545 xed3_operand_set_mod(xes,0);
2546 if (okay) return 1;
2547 }
2548 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2549 (xed3_operand_get_disp_width(xes) == 0) &&
2550 (xed3_operand_get_base0(xes) == XED_REG_RSI) &&
2551 (xed3_operand_get_easz(xes) == 3);
2552 if (conditions_satisfied) {
2553 okay=1;
2554 xed3_operand_set_mod(xes,0);
2555 if (okay) return 1;
2556 }
2557 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2558 (xed3_operand_get_disp_width(xes) == 0) &&
2559 (xed3_operand_get_base0(xes) == XED_REG_DI) &&
2560 (xed3_operand_get_easz(xes) == 1);
2561 if (conditions_satisfied) {
2562 okay=1;
2563 xed3_operand_set_mod(xes,0);
2564 if (okay) return 1;
2565 }
2566 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2567 (xed3_operand_get_disp_width(xes) == 0) &&
2568 (xed3_operand_get_base0(xes) == XED_REG_EDI) &&
2569 (xed3_operand_get_easz(xes) == 2);
2570 if (conditions_satisfied) {
2571 okay=1;
2572 xed3_operand_set_mod(xes,0);
2573 if (okay) return 1;
2574 }
2575 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2576 (xed3_operand_get_disp_width(xes) == 0) &&
2577 (xed3_operand_get_base0(xes) == XED_REG_RDI) &&
2578 (xed3_operand_get_easz(xes) == 3);
2579 if (conditions_satisfied) {
2580 okay=1;
2581 xed3_operand_set_mod(xes,0);
2582 if (okay) return 1;
2583 }
2584 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2585 (xed3_operand_get_disp_width(xes) == 0) &&
2586 (xed3_operand_get_base0(xes) == XED_REG_SP) &&
2587 (xed3_operand_get_easz(xes) == 1);
2588 if (conditions_satisfied) {
2589 okay=1;
2590 xed3_operand_set_mod(xes,0);
2591 if (okay) return 1;
2592 }
2593 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2594 (xed3_operand_get_disp_width(xes) == 0) &&
2595 (xed3_operand_get_base0(xes) == XED_REG_ESP) &&
2596 (xed3_operand_get_easz(xes) == 2);
2597 if (conditions_satisfied) {
2598 okay=1;
2599 xed3_operand_set_mod(xes,0);
2600 if (okay) return 1;
2601 }
2602 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2603 (xed3_operand_get_disp_width(xes) == 0) &&
2604 (xed3_operand_get_base0(xes) == XED_REG_RSP) &&
2605 (xed3_operand_get_easz(xes) == 3);
2606 if (conditions_satisfied) {
2607 okay=1;
2608 xed3_operand_set_mod(xes,0);
2609 if (okay) return 1;
2610 }
2611 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2612 (xed3_operand_get_disp_width(xes) == 0) &&
2613 (xed3_operand_get_base0(xes) == XED_REG_R8W) &&
2614 (xed3_operand_get_easz(xes) == 1);
2615 if (conditions_satisfied) {
2616 okay=1;
2617 xed3_operand_set_mod(xes,0);
2618 if (okay) return 1;
2619 }
2620 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2621 (xed3_operand_get_disp_width(xes) == 0) &&
2622 (xed3_operand_get_base0(xes) == XED_REG_R8D) &&
2623 (xed3_operand_get_easz(xes) == 2);
2624 if (conditions_satisfied) {
2625 okay=1;
2626 xed3_operand_set_mod(xes,0);
2627 if (okay) return 1;
2628 }
2629 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2630 (xed3_operand_get_disp_width(xes) == 0) &&
2631 (xed3_operand_get_base0(xes) == XED_REG_R8) &&
2632 (xed3_operand_get_easz(xes) == 3);
2633 if (conditions_satisfied) {
2634 okay=1;
2635 xed3_operand_set_mod(xes,0);
2636 if (okay) return 1;
2637 }
2638 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2639 (xed3_operand_get_disp_width(xes) == 0) &&
2640 (xed3_operand_get_base0(xes) == XED_REG_R9W) &&
2641 (xed3_operand_get_easz(xes) == 1);
2642 if (conditions_satisfied) {
2643 okay=1;
2644 xed3_operand_set_mod(xes,0);
2645 if (okay) return 1;
2646 }
2647 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2648 (xed3_operand_get_disp_width(xes) == 0) &&
2649 (xed3_operand_get_base0(xes) == XED_REG_R9D) &&
2650 (xed3_operand_get_easz(xes) == 2);
2651 if (conditions_satisfied) {
2652 okay=1;
2653 xed3_operand_set_mod(xes,0);
2654 if (okay) return 1;
2655 }
2656 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2657 (xed3_operand_get_disp_width(xes) == 0) &&
2658 (xed3_operand_get_base0(xes) == XED_REG_R9) &&
2659 (xed3_operand_get_easz(xes) == 3);
2660 if (conditions_satisfied) {
2661 okay=1;
2662 xed3_operand_set_mod(xes,0);
2663 if (okay) return 1;
2664 }
2665 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2666 (xed3_operand_get_disp_width(xes) == 0) &&
2667 (xed3_operand_get_base0(xes) == XED_REG_R10W) &&
2668 (xed3_operand_get_easz(xes) == 1);
2669 if (conditions_satisfied) {
2670 okay=1;
2671 xed3_operand_set_mod(xes,0);
2672 if (okay) return 1;
2673 }
2674 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2675 (xed3_operand_get_disp_width(xes) == 0) &&
2676 (xed3_operand_get_base0(xes) == XED_REG_R10D) &&
2677 (xed3_operand_get_easz(xes) == 2);
2678 if (conditions_satisfied) {
2679 okay=1;
2680 xed3_operand_set_mod(xes,0);
2681 if (okay) return 1;
2682 }
2683 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2684 (xed3_operand_get_disp_width(xes) == 0) &&
2685 (xed3_operand_get_base0(xes) == XED_REG_R10) &&
2686 (xed3_operand_get_easz(xes) == 3);
2687 if (conditions_satisfied) {
2688 okay=1;
2689 xed3_operand_set_mod(xes,0);
2690 if (okay) return 1;
2691 }
2692 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2693 (xed3_operand_get_disp_width(xes) == 0) &&
2694 (xed3_operand_get_base0(xes) == XED_REG_R11W) &&
2695 (xed3_operand_get_easz(xes) == 1);
2696 if (conditions_satisfied) {
2697 okay=1;
2698 xed3_operand_set_mod(xes,0);
2699 if (okay) return 1;
2700 }
2701 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2702 (xed3_operand_get_disp_width(xes) == 0) &&
2703 (xed3_operand_get_base0(xes) == XED_REG_R11D) &&
2704 (xed3_operand_get_easz(xes) == 2);
2705 if (conditions_satisfied) {
2706 okay=1;
2707 xed3_operand_set_mod(xes,0);
2708 if (okay) return 1;
2709 }
2710 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2711 (xed3_operand_get_disp_width(xes) == 0) &&
2712 (xed3_operand_get_base0(xes) == XED_REG_R11) &&
2713 (xed3_operand_get_easz(xes) == 3);
2714 if (conditions_satisfied) {
2715 okay=1;
2716 xed3_operand_set_mod(xes,0);
2717 if (okay) return 1;
2718 }
2719 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2720 (xed3_operand_get_disp_width(xes) == 0) &&
2721 (xed3_operand_get_base0(xes) == XED_REG_R12W) &&
2722 (xed3_operand_get_easz(xes) == 1);
2723 if (conditions_satisfied) {
2724 okay=1;
2725 xed3_operand_set_mod(xes,0);
2726 if (okay) return 1;
2727 }
2728 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2729 (xed3_operand_get_disp_width(xes) == 0) &&
2730 (xed3_operand_get_base0(xes) == XED_REG_R12D) &&
2731 (xed3_operand_get_easz(xes) == 2);
2732 if (conditions_satisfied) {
2733 okay=1;
2734 xed3_operand_set_mod(xes,0);
2735 if (okay) return 1;
2736 }
2737 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2738 (xed3_operand_get_disp_width(xes) == 0) &&
2739 (xed3_operand_get_base0(xes) == XED_REG_R12) &&
2740 (xed3_operand_get_easz(xes) == 3);
2741 if (conditions_satisfied) {
2742 okay=1;
2743 xed3_operand_set_mod(xes,0);
2744 if (okay) return 1;
2745 }
2746 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2747 (xed3_operand_get_disp_width(xes) == 0) &&
2748 (xed3_operand_get_base0(xes) == XED_REG_R14W) &&
2749 (xed3_operand_get_easz(xes) == 1);
2750 if (conditions_satisfied) {
2751 okay=1;
2752 xed3_operand_set_mod(xes,0);
2753 if (okay) return 1;
2754 }
2755 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2756 (xed3_operand_get_disp_width(xes) == 0) &&
2757 (xed3_operand_get_base0(xes) == XED_REG_R14D) &&
2758 (xed3_operand_get_easz(xes) == 2);
2759 if (conditions_satisfied) {
2760 okay=1;
2761 xed3_operand_set_mod(xes,0);
2762 if (okay) return 1;
2763 }
2764 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2765 (xed3_operand_get_disp_width(xes) == 0) &&
2766 (xed3_operand_get_base0(xes) == XED_REG_R14) &&
2767 (xed3_operand_get_easz(xes) == 3);
2768 if (conditions_satisfied) {
2769 okay=1;
2770 xed3_operand_set_mod(xes,0);
2771 if (okay) return 1;
2772 }
2773 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2774 (xed3_operand_get_disp_width(xes) == 0) &&
2775 (xed3_operand_get_base0(xes) == XED_REG_R15W) &&
2776 (xed3_operand_get_easz(xes) == 1);
2777 if (conditions_satisfied) {
2778 okay=1;
2779 xed3_operand_set_mod(xes,0);
2780 if (okay) return 1;
2781 }
2782 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2783 (xed3_operand_get_disp_width(xes) == 0) &&
2784 (xed3_operand_get_base0(xes) == XED_REG_R15D) &&
2785 (xed3_operand_get_easz(xes) == 2);
2786 if (conditions_satisfied) {
2787 okay=1;
2788 xed3_operand_set_mod(xes,0);
2789 if (okay) return 1;
2790 }
2791 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2792 (xed3_operand_get_disp_width(xes) == 0) &&
2793 (xed3_operand_get_base0(xes) == XED_REG_R15) &&
2794 (xed3_operand_get_easz(xes) == 3);
2795 if (conditions_satisfied) {
2796 okay=1;
2797 xed3_operand_set_mod(xes,0);
2798 if (okay) return 1;
2799 }
2800 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2801 (xed3_operand_get_disp_width(xes) == 8) &&
2802 (xed3_operand_get_base0(xes) == XED_REG_RAX);
2803 if (conditions_satisfied) {
2804 okay=1;
2805 xed3_operand_set_mod(xes,1);
2806 if (okay) return 1;
2807 }
2808 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2809 (xed3_operand_get_disp_width(xes) == 8) &&
2810 (xed3_operand_get_base0(xes) == XED_REG_RBX);
2811 if (conditions_satisfied) {
2812 okay=1;
2813 xed3_operand_set_mod(xes,1);
2814 if (okay) return 1;
2815 }
2816 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2817 (xed3_operand_get_disp_width(xes) == 8) &&
2818 (xed3_operand_get_base0(xes) == XED_REG_RCX);
2819 if (conditions_satisfied) {
2820 okay=1;
2821 xed3_operand_set_mod(xes,1);
2822 if (okay) return 1;
2823 }
2824 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2825 (xed3_operand_get_disp_width(xes) == 8) &&
2826 (xed3_operand_get_base0(xes) == XED_REG_RDX);
2827 if (conditions_satisfied) {
2828 okay=1;
2829 xed3_operand_set_mod(xes,1);
2830 if (okay) return 1;
2831 }
2832 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2833 (xed3_operand_get_disp_width(xes) == 8) &&
2834 (xed3_operand_get_base0(xes) == XED_REG_RSP);
2835 if (conditions_satisfied) {
2836 okay=1;
2837 xed3_operand_set_mod(xes,1);
2838 if (okay) return 1;
2839 }
2840 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2841 (xed3_operand_get_disp_width(xes) == 8) &&
2842 (xed3_operand_get_base0(xes) == XED_REG_RBP);
2843 if (conditions_satisfied) {
2844 okay=1;
2845 xed3_operand_set_mod(xes,1);
2846 if (okay) return 1;
2847 }
2848 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2849 (xed3_operand_get_disp_width(xes) == 8) &&
2850 (xed3_operand_get_base0(xes) == XED_REG_RSI);
2851 if (conditions_satisfied) {
2852 okay=1;
2853 xed3_operand_set_mod(xes,1);
2854 if (okay) return 1;
2855 }
2856 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2857 (xed3_operand_get_disp_width(xes) == 8) &&
2858 (xed3_operand_get_base0(xes) == XED_REG_RDI);
2859 if (conditions_satisfied) {
2860 okay=1;
2861 xed3_operand_set_mod(xes,1);
2862 if (okay) return 1;
2863 }
2864 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2865 (xed3_operand_get_disp_width(xes) == 8) &&
2866 (xed3_operand_get_base0(xes) == XED_REG_R8);
2867 if (conditions_satisfied) {
2868 okay=1;
2869 xed3_operand_set_mod(xes,1);
2870 if (okay) return 1;
2871 }
2872 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2873 (xed3_operand_get_disp_width(xes) == 8) &&
2874 (xed3_operand_get_base0(xes) == XED_REG_R9);
2875 if (conditions_satisfied) {
2876 okay=1;
2877 xed3_operand_set_mod(xes,1);
2878 if (okay) return 1;
2879 }
2880 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2881 (xed3_operand_get_disp_width(xes) == 8) &&
2882 (xed3_operand_get_base0(xes) == XED_REG_R10);
2883 if (conditions_satisfied) {
2884 okay=1;
2885 xed3_operand_set_mod(xes,1);
2886 if (okay) return 1;
2887 }
2888 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2889 (xed3_operand_get_disp_width(xes) == 8) &&
2890 (xed3_operand_get_base0(xes) == XED_REG_R11);
2891 if (conditions_satisfied) {
2892 okay=1;
2893 xed3_operand_set_mod(xes,1);
2894 if (okay) return 1;
2895 }
2896 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2897 (xed3_operand_get_disp_width(xes) == 8) &&
2898 (xed3_operand_get_base0(xes) == XED_REG_R12);
2899 if (conditions_satisfied) {
2900 okay=1;
2901 xed3_operand_set_mod(xes,1);
2902 if (okay) return 1;
2903 }
2904 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2905 (xed3_operand_get_disp_width(xes) == 8) &&
2906 (xed3_operand_get_base0(xes) == XED_REG_R13);
2907 if (conditions_satisfied) {
2908 okay=1;
2909 xed3_operand_set_mod(xes,1);
2910 if (okay) return 1;
2911 }
2912 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2913 (xed3_operand_get_disp_width(xes) == 8) &&
2914 (xed3_operand_get_base0(xes) == XED_REG_R14);
2915 if (conditions_satisfied) {
2916 okay=1;
2917 xed3_operand_set_mod(xes,1);
2918 if (okay) return 1;
2919 }
2920 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2921 (xed3_operand_get_disp_width(xes) == 8) &&
2922 (xed3_operand_get_base0(xes) == XED_REG_R15);
2923 if (conditions_satisfied) {
2924 okay=1;
2925 xed3_operand_set_mod(xes,1);
2926 if (okay) return 1;
2927 }
2928 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2929 (xed3_operand_get_disp_width(xes) == 32) &&
2930 (xed3_operand_get_base0(xes) == XED_REG_AX) &&
2931 (xed3_operand_get_easz(xes) == 1);
2932 if (conditions_satisfied) {
2933 okay=1;
2934 xed3_operand_set_mod(xes,2);
2935 if (okay) return 1;
2936 }
2937 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2938 (xed3_operand_get_disp_width(xes) == 32) &&
2939 (xed3_operand_get_base0(xes) == XED_REG_EAX) &&
2940 (xed3_operand_get_easz(xes) == 2);
2941 if (conditions_satisfied) {
2942 okay=1;
2943 xed3_operand_set_mod(xes,2);
2944 if (okay) return 1;
2945 }
2946 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2947 (xed3_operand_get_disp_width(xes) == 32) &&
2948 (xed3_operand_get_base0(xes) == XED_REG_RAX) &&
2949 (xed3_operand_get_easz(xes) == 3);
2950 if (conditions_satisfied) {
2951 okay=1;
2952 xed3_operand_set_mod(xes,2);
2953 if (okay) return 1;
2954 }
2955 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2956 (xed3_operand_get_disp_width(xes) == 32) &&
2957 (xed3_operand_get_base0(xes) == XED_REG_BX) &&
2958 (xed3_operand_get_easz(xes) == 1);
2959 if (conditions_satisfied) {
2960 okay=1;
2961 xed3_operand_set_mod(xes,2);
2962 if (okay) return 1;
2963 }
2964 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2965 (xed3_operand_get_disp_width(xes) == 32) &&
2966 (xed3_operand_get_base0(xes) == XED_REG_EBX) &&
2967 (xed3_operand_get_easz(xes) == 2);
2968 if (conditions_satisfied) {
2969 okay=1;
2970 xed3_operand_set_mod(xes,2);
2971 if (okay) return 1;
2972 }
2973 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2974 (xed3_operand_get_disp_width(xes) == 32) &&
2975 (xed3_operand_get_base0(xes) == XED_REG_RBX) &&
2976 (xed3_operand_get_easz(xes) == 3);
2977 if (conditions_satisfied) {
2978 okay=1;
2979 xed3_operand_set_mod(xes,2);
2980 if (okay) return 1;
2981 }
2982 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2983 (xed3_operand_get_disp_width(xes) == 32) &&
2984 (xed3_operand_get_base0(xes) == XED_REG_CX) &&
2985 (xed3_operand_get_easz(xes) == 1);
2986 if (conditions_satisfied) {
2987 okay=1;
2988 xed3_operand_set_mod(xes,2);
2989 if (okay) return 1;
2990 }
2991 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
2992 (xed3_operand_get_disp_width(xes) == 32) &&
2993 (xed3_operand_get_base0(xes) == XED_REG_ECX) &&
2994 (xed3_operand_get_easz(xes) == 2);
2995 if (conditions_satisfied) {
2996 okay=1;
2997 xed3_operand_set_mod(xes,2);
2998 if (okay) return 1;
2999 }
3000 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3001 (xed3_operand_get_disp_width(xes) == 32) &&
3002 (xed3_operand_get_base0(xes) == XED_REG_RCX) &&
3003 (xed3_operand_get_easz(xes) == 3);
3004 if (conditions_satisfied) {
3005 okay=1;
3006 xed3_operand_set_mod(xes,2);
3007 if (okay) return 1;
3008 }
3009 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3010 (xed3_operand_get_disp_width(xes) == 32) &&
3011 (xed3_operand_get_base0(xes) == XED_REG_DX) &&
3012 (xed3_operand_get_easz(xes) == 1);
3013 if (conditions_satisfied) {
3014 okay=1;
3015 xed3_operand_set_mod(xes,2);
3016 if (okay) return 1;
3017 }
3018 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3019 (xed3_operand_get_disp_width(xes) == 32) &&
3020 (xed3_operand_get_base0(xes) == XED_REG_EDX) &&
3021 (xed3_operand_get_easz(xes) == 2);
3022 if (conditions_satisfied) {
3023 okay=1;
3024 xed3_operand_set_mod(xes,2);
3025 if (okay) return 1;
3026 }
3027 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3028 (xed3_operand_get_disp_width(xes) == 32) &&
3029 (xed3_operand_get_base0(xes) == XED_REG_RDX) &&
3030 (xed3_operand_get_easz(xes) == 3);
3031 if (conditions_satisfied) {
3032 okay=1;
3033 xed3_operand_set_mod(xes,2);
3034 if (okay) return 1;
3035 }
3036 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3037 (xed3_operand_get_disp_width(xes) == 32) &&
3038 (xed3_operand_get_base0(xes) == XED_REG_SI) &&
3039 (xed3_operand_get_easz(xes) == 1);
3040 if (conditions_satisfied) {
3041 okay=1;
3042 xed3_operand_set_mod(xes,2);
3043 if (okay) return 1;
3044 }
3045 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3046 (xed3_operand_get_disp_width(xes) == 32) &&
3047 (xed3_operand_get_base0(xes) == XED_REG_ESI) &&
3048 (xed3_operand_get_easz(xes) == 2);
3049 if (conditions_satisfied) {
3050 okay=1;
3051 xed3_operand_set_mod(xes,2);
3052 if (okay) return 1;
3053 }
3054 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3055 (xed3_operand_get_disp_width(xes) == 32) &&
3056 (xed3_operand_get_base0(xes) == XED_REG_RSI) &&
3057 (xed3_operand_get_easz(xes) == 3);
3058 if (conditions_satisfied) {
3059 okay=1;
3060 xed3_operand_set_mod(xes,2);
3061 if (okay) return 1;
3062 }
3063 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3064 (xed3_operand_get_disp_width(xes) == 32) &&
3065 (xed3_operand_get_base0(xes) == XED_REG_DI) &&
3066 (xed3_operand_get_easz(xes) == 1);
3067 if (conditions_satisfied) {
3068 okay=1;
3069 xed3_operand_set_mod(xes,2);
3070 if (okay) return 1;
3071 }
3072 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3073 (xed3_operand_get_disp_width(xes) == 32) &&
3074 (xed3_operand_get_base0(xes) == XED_REG_EDI) &&
3075 (xed3_operand_get_easz(xes) == 2);
3076 if (conditions_satisfied) {
3077 okay=1;
3078 xed3_operand_set_mod(xes,2);
3079 if (okay) return 1;
3080 }
3081 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3082 (xed3_operand_get_disp_width(xes) == 32) &&
3083 (xed3_operand_get_base0(xes) == XED_REG_RDI) &&
3084 (xed3_operand_get_easz(xes) == 3);
3085 if (conditions_satisfied) {
3086 okay=1;
3087 xed3_operand_set_mod(xes,2);
3088 if (okay) return 1;
3089 }
3090 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3091 (xed3_operand_get_disp_width(xes) == 32) &&
3092 (xed3_operand_get_base0(xes) == XED_REG_SP) &&
3093 (xed3_operand_get_easz(xes) == 1);
3094 if (conditions_satisfied) {
3095 okay=1;
3096 xed3_operand_set_mod(xes,2);
3097 if (okay) return 1;
3098 }
3099 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3100 (xed3_operand_get_disp_width(xes) == 32) &&
3101 (xed3_operand_get_base0(xes) == XED_REG_ESP) &&
3102 (xed3_operand_get_easz(xes) == 2);
3103 if (conditions_satisfied) {
3104 okay=1;
3105 xed3_operand_set_mod(xes,2);
3106 if (okay) return 1;
3107 }
3108 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3109 (xed3_operand_get_disp_width(xes) == 32) &&
3110 (xed3_operand_get_base0(xes) == XED_REG_RSP) &&
3111 (xed3_operand_get_easz(xes) == 3);
3112 if (conditions_satisfied) {
3113 okay=1;
3114 xed3_operand_set_mod(xes,2);
3115 if (okay) return 1;
3116 }
3117 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3118 (xed3_operand_get_disp_width(xes) == 32) &&
3119 (xed3_operand_get_base0(xes) == XED_REG_BP) &&
3120 (xed3_operand_get_easz(xes) == 1);
3121 if (conditions_satisfied) {
3122 okay=1;
3123 xed3_operand_set_mod(xes,2);
3124 if (okay) return 1;
3125 }
3126 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3127 (xed3_operand_get_disp_width(xes) == 32) &&
3128 (xed3_operand_get_base0(xes) == XED_REG_EBP) &&
3129 (xed3_operand_get_easz(xes) == 2);
3130 if (conditions_satisfied) {
3131 okay=1;
3132 xed3_operand_set_mod(xes,2);
3133 if (okay) return 1;
3134 }
3135 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3136 (xed3_operand_get_disp_width(xes) == 32) &&
3137 (xed3_operand_get_base0(xes) == XED_REG_RBP) &&
3138 (xed3_operand_get_easz(xes) == 3);
3139 if (conditions_satisfied) {
3140 okay=1;
3141 xed3_operand_set_mod(xes,2);
3142 if (okay) return 1;
3143 }
3144 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3145 (xed3_operand_get_disp_width(xes) == 32) &&
3146 (xed3_operand_get_base0(xes) == XED_REG_R8W) &&
3147 (xed3_operand_get_easz(xes) == 1);
3148 if (conditions_satisfied) {
3149 okay=1;
3150 xed3_operand_set_mod(xes,2);
3151 if (okay) return 1;
3152 }
3153 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3154 (xed3_operand_get_disp_width(xes) == 32) &&
3155 (xed3_operand_get_base0(xes) == XED_REG_R8D) &&
3156 (xed3_operand_get_easz(xes) == 2);
3157 if (conditions_satisfied) {
3158 okay=1;
3159 xed3_operand_set_mod(xes,2);
3160 if (okay) return 1;
3161 }
3162 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3163 (xed3_operand_get_disp_width(xes) == 32) &&
3164 (xed3_operand_get_base0(xes) == XED_REG_R8) &&
3165 (xed3_operand_get_easz(xes) == 3);
3166 if (conditions_satisfied) {
3167 okay=1;
3168 xed3_operand_set_mod(xes,2);
3169 if (okay) return 1;
3170 }
3171 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3172 (xed3_operand_get_disp_width(xes) == 32) &&
3173 (xed3_operand_get_base0(xes) == XED_REG_R9W) &&
3174 (xed3_operand_get_easz(xes) == 1);
3175 if (conditions_satisfied) {
3176 okay=1;
3177 xed3_operand_set_mod(xes,2);
3178 if (okay) return 1;
3179 }
3180 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3181 (xed3_operand_get_disp_width(xes) == 32) &&
3182 (xed3_operand_get_base0(xes) == XED_REG_R9D) &&
3183 (xed3_operand_get_easz(xes) == 2);
3184 if (conditions_satisfied) {
3185 okay=1;
3186 xed3_operand_set_mod(xes,2);
3187 if (okay) return 1;
3188 }
3189 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3190 (xed3_operand_get_disp_width(xes) == 32) &&
3191 (xed3_operand_get_base0(xes) == XED_REG_R9) &&
3192 (xed3_operand_get_easz(xes) == 3);
3193 if (conditions_satisfied) {
3194 okay=1;
3195 xed3_operand_set_mod(xes,2);
3196 if (okay) return 1;
3197 }
3198 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3199 (xed3_operand_get_disp_width(xes) == 32) &&
3200 (xed3_operand_get_base0(xes) == XED_REG_R10W) &&
3201 (xed3_operand_get_easz(xes) == 1);
3202 if (conditions_satisfied) {
3203 okay=1;
3204 xed3_operand_set_mod(xes,2);
3205 if (okay) return 1;
3206 }
3207 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3208 (xed3_operand_get_disp_width(xes) == 32) &&
3209 (xed3_operand_get_base0(xes) == XED_REG_R10D) &&
3210 (xed3_operand_get_easz(xes) == 2);
3211 if (conditions_satisfied) {
3212 okay=1;
3213 xed3_operand_set_mod(xes,2);
3214 if (okay) return 1;
3215 }
3216 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3217 (xed3_operand_get_disp_width(xes) == 32) &&
3218 (xed3_operand_get_base0(xes) == XED_REG_R10) &&
3219 (xed3_operand_get_easz(xes) == 3);
3220 if (conditions_satisfied) {
3221 okay=1;
3222 xed3_operand_set_mod(xes,2);
3223 if (okay) return 1;
3224 }
3225 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3226 (xed3_operand_get_disp_width(xes) == 32) &&
3227 (xed3_operand_get_base0(xes) == XED_REG_R11W) &&
3228 (xed3_operand_get_easz(xes) == 1);
3229 if (conditions_satisfied) {
3230 okay=1;
3231 xed3_operand_set_mod(xes,2);
3232 if (okay) return 1;
3233 }
3234 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3235 (xed3_operand_get_disp_width(xes) == 32) &&
3236 (xed3_operand_get_base0(xes) == XED_REG_R11D) &&
3237 (xed3_operand_get_easz(xes) == 2);
3238 if (conditions_satisfied) {
3239 okay=1;
3240 xed3_operand_set_mod(xes,2);
3241 if (okay) return 1;
3242 }
3243 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3244 (xed3_operand_get_disp_width(xes) == 32) &&
3245 (xed3_operand_get_base0(xes) == XED_REG_R11) &&
3246 (xed3_operand_get_easz(xes) == 3);
3247 if (conditions_satisfied) {
3248 okay=1;
3249 xed3_operand_set_mod(xes,2);
3250 if (okay) return 1;
3251 }
3252 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3253 (xed3_operand_get_disp_width(xes) == 32) &&
3254 (xed3_operand_get_base0(xes) == XED_REG_R12W) &&
3255 (xed3_operand_get_easz(xes) == 1);
3256 if (conditions_satisfied) {
3257 okay=1;
3258 xed3_operand_set_mod(xes,2);
3259 if (okay) return 1;
3260 }
3261 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3262 (xed3_operand_get_disp_width(xes) == 32) &&
3263 (xed3_operand_get_base0(xes) == XED_REG_R12D) &&
3264 (xed3_operand_get_easz(xes) == 2);
3265 if (conditions_satisfied) {
3266 okay=1;
3267 xed3_operand_set_mod(xes,2);
3268 if (okay) return 1;
3269 }
3270 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3271 (xed3_operand_get_disp_width(xes) == 32) &&
3272 (xed3_operand_get_base0(xes) == XED_REG_R12) &&
3273 (xed3_operand_get_easz(xes) == 3);
3274 if (conditions_satisfied) {
3275 okay=1;
3276 xed3_operand_set_mod(xes,2);
3277 if (okay) return 1;
3278 }
3279 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3280 (xed3_operand_get_disp_width(xes) == 32) &&
3281 (xed3_operand_get_base0(xes) == XED_REG_R13W) &&
3282 (xed3_operand_get_easz(xes) == 1);
3283 if (conditions_satisfied) {
3284 okay=1;
3285 xed3_operand_set_mod(xes,2);
3286 if (okay) return 1;
3287 }
3288 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3289 (xed3_operand_get_disp_width(xes) == 32) &&
3290 (xed3_operand_get_base0(xes) == XED_REG_R13D) &&
3291 (xed3_operand_get_easz(xes) == 2);
3292 if (conditions_satisfied) {
3293 okay=1;
3294 xed3_operand_set_mod(xes,2);
3295 if (okay) return 1;
3296 }
3297 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3298 (xed3_operand_get_disp_width(xes) == 32) &&
3299 (xed3_operand_get_base0(xes) == XED_REG_R13) &&
3300 (xed3_operand_get_easz(xes) == 3);
3301 if (conditions_satisfied) {
3302 okay=1;
3303 xed3_operand_set_mod(xes,2);
3304 if (okay) return 1;
3305 }
3306 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3307 (xed3_operand_get_disp_width(xes) == 32) &&
3308 (xed3_operand_get_base0(xes) == XED_REG_R14W) &&
3309 (xed3_operand_get_easz(xes) == 1);
3310 if (conditions_satisfied) {
3311 okay=1;
3312 xed3_operand_set_mod(xes,2);
3313 if (okay) return 1;
3314 }
3315 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3316 (xed3_operand_get_disp_width(xes) == 32) &&
3317 (xed3_operand_get_base0(xes) == XED_REG_R14D) &&
3318 (xed3_operand_get_easz(xes) == 2);
3319 if (conditions_satisfied) {
3320 okay=1;
3321 xed3_operand_set_mod(xes,2);
3322 if (okay) return 1;
3323 }
3324 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3325 (xed3_operand_get_disp_width(xes) == 32) &&
3326 (xed3_operand_get_base0(xes) == XED_REG_R14) &&
3327 (xed3_operand_get_easz(xes) == 3);
3328 if (conditions_satisfied) {
3329 okay=1;
3330 xed3_operand_set_mod(xes,2);
3331 if (okay) return 1;
3332 }
3333 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3334 (xed3_operand_get_disp_width(xes) == 32) &&
3335 (xed3_operand_get_base0(xes) == XED_REG_R15W) &&
3336 (xed3_operand_get_easz(xes) == 1);
3337 if (conditions_satisfied) {
3338 okay=1;
3339 xed3_operand_set_mod(xes,2);
3340 if (okay) return 1;
3341 }
3342 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3343 (xed3_operand_get_disp_width(xes) == 32) &&
3344 (xed3_operand_get_base0(xes) == XED_REG_R15D) &&
3345 (xed3_operand_get_easz(xes) == 2);
3346 if (conditions_satisfied) {
3347 okay=1;
3348 xed3_operand_set_mod(xes,2);
3349 if (okay) return 1;
3350 }
3351 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3352 (xed3_operand_get_disp_width(xes) == 32) &&
3353 (xed3_operand_get_base0(xes) == XED_REG_R15) &&
3354 (xed3_operand_get_easz(xes) == 3);
3355 if (conditions_satisfied) {
3356 okay=1;
3357 xed3_operand_set_mod(xes,2);
3358 if (okay) return 1;
3359 }
3360 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3361 (xed3_operand_get_disp_width(xes) == 32) &&
3362 (xed3_operand_get_mode(xes) == 1) &&
3363 (xed3_operand_get_base0(xes) == XED_REG_EAX);
3364 if (conditions_satisfied) {
3365 okay=1;
3366 xed3_operand_set_mod(xes,2);
3367 if (okay) return 1;
3368 }
3369 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3370 (xed3_operand_get_disp_width(xes) == 32) &&
3371 (xed3_operand_get_mode(xes) == 1) &&
3372 (xed3_operand_get_base0(xes) == XED_REG_EBX);
3373 if (conditions_satisfied) {
3374 okay=1;
3375 xed3_operand_set_mod(xes,2);
3376 if (okay) return 1;
3377 }
3378 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3379 (xed3_operand_get_disp_width(xes) == 32) &&
3380 (xed3_operand_get_mode(xes) == 1) &&
3381 (xed3_operand_get_base0(xes) == XED_REG_ECX);
3382 if (conditions_satisfied) {
3383 okay=1;
3384 xed3_operand_set_mod(xes,2);
3385 if (okay) return 1;
3386 }
3387 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3388 (xed3_operand_get_disp_width(xes) == 32) &&
3389 (xed3_operand_get_mode(xes) == 1) &&
3390 (xed3_operand_get_base0(xes) == XED_REG_EDX);
3391 if (conditions_satisfied) {
3392 okay=1;
3393 xed3_operand_set_mod(xes,2);
3394 if (okay) return 1;
3395 }
3396 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3397 (xed3_operand_get_disp_width(xes) == 32) &&
3398 (xed3_operand_get_mode(xes) == 1) &&
3399 (xed3_operand_get_base0(xes) == XED_REG_ESP);
3400 if (conditions_satisfied) {
3401 okay=1;
3402 xed3_operand_set_mod(xes,2);
3403 if (okay) return 1;
3404 }
3405 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3406 (xed3_operand_get_disp_width(xes) == 32) &&
3407 (xed3_operand_get_mode(xes) == 1) &&
3408 (xed3_operand_get_base0(xes) == XED_REG_EBP);
3409 if (conditions_satisfied) {
3410 okay=1;
3411 xed3_operand_set_mod(xes,2);
3412 if (okay) return 1;
3413 }
3414 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3415 (xed3_operand_get_disp_width(xes) == 32) &&
3416 (xed3_operand_get_mode(xes) == 1) &&
3417 (xed3_operand_get_base0(xes) == XED_REG_ESI);
3418 if (conditions_satisfied) {
3419 okay=1;
3420 xed3_operand_set_mod(xes,2);
3421 if (okay) return 1;
3422 }
3423 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3424 (xed3_operand_get_disp_width(xes) == 32) &&
3425 (xed3_operand_get_mode(xes) == 1) &&
3426 (xed3_operand_get_base0(xes) == XED_REG_EDI);
3427 if (conditions_satisfied) {
3428 okay=1;
3429 xed3_operand_set_mod(xes,2);
3430 if (okay) return 1;
3431 }
3432 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3433 (xed3_operand_get_disp_width(xes) == 32) &&
3434 (xed3_operand_get_mode(xes) == 2) &&
3435 (xed3_operand_get_base0(xes) == XED_REG_EAX);
3436 if (conditions_satisfied) {
3437 okay=1;
3438 xed3_operand_set_mod(xes,2);
3439 if (okay) return 1;
3440 }
3441 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3442 (xed3_operand_get_disp_width(xes) == 32) &&
3443 (xed3_operand_get_mode(xes) == 2) &&
3444 (xed3_operand_get_base0(xes) == XED_REG_EBX);
3445 if (conditions_satisfied) {
3446 okay=1;
3447 xed3_operand_set_mod(xes,2);
3448 if (okay) return 1;
3449 }
3450 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3451 (xed3_operand_get_disp_width(xes) == 32) &&
3452 (xed3_operand_get_mode(xes) == 2) &&
3453 (xed3_operand_get_base0(xes) == XED_REG_ECX);
3454 if (conditions_satisfied) {
3455 okay=1;
3456 xed3_operand_set_mod(xes,2);
3457 if (okay) return 1;
3458 }
3459 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3460 (xed3_operand_get_disp_width(xes) == 32) &&
3461 (xed3_operand_get_mode(xes) == 2) &&
3462 (xed3_operand_get_base0(xes) == XED_REG_EDX);
3463 if (conditions_satisfied) {
3464 okay=1;
3465 xed3_operand_set_mod(xes,2);
3466 if (okay) return 1;
3467 }
3468 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3469 (xed3_operand_get_disp_width(xes) == 32) &&
3470 (xed3_operand_get_mode(xes) == 2) &&
3471 (xed3_operand_get_base0(xes) == XED_REG_ESP);
3472 if (conditions_satisfied) {
3473 okay=1;
3474 xed3_operand_set_mod(xes,2);
3475 if (okay) return 1;
3476 }
3477 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3478 (xed3_operand_get_disp_width(xes) == 32) &&
3479 (xed3_operand_get_mode(xes) == 2) &&
3480 (xed3_operand_get_base0(xes) == XED_REG_EBP);
3481 if (conditions_satisfied) {
3482 okay=1;
3483 xed3_operand_set_mod(xes,2);
3484 if (okay) return 1;
3485 }
3486 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3487 (xed3_operand_get_disp_width(xes) == 32) &&
3488 (xed3_operand_get_mode(xes) == 2) &&
3489 (xed3_operand_get_base0(xes) == XED_REG_ESI);
3490 if (conditions_satisfied) {
3491 okay=1;
3492 xed3_operand_set_mod(xes,2);
3493 if (okay) return 1;
3494 }
3495 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3496 (xed3_operand_get_disp_width(xes) == 32) &&
3497 (xed3_operand_get_mode(xes) == 2) &&
3498 (xed3_operand_get_base0(xes) == XED_REG_EDI);
3499 if (conditions_satisfied) {
3500 okay=1;
3501 xed3_operand_set_mod(xes,2);
3502 if (okay) return 1;
3503 }
3504 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3505 (xed3_operand_get_disp_width(xes) == 32) &&
3506 (xed3_operand_get_mode(xes) == 2) &&
3507 (xed3_operand_get_base0(xes) == XED_REG_R8D);
3508 if (conditions_satisfied) {
3509 okay=1;
3510 xed3_operand_set_mod(xes,2);
3511 if (okay) return 1;
3512 }
3513 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3514 (xed3_operand_get_disp_width(xes) == 32) &&
3515 (xed3_operand_get_mode(xes) == 2) &&
3516 (xed3_operand_get_base0(xes) == XED_REG_R9D);
3517 if (conditions_satisfied) {
3518 okay=1;
3519 xed3_operand_set_mod(xes,2);
3520 if (okay) return 1;
3521 }
3522 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3523 (xed3_operand_get_disp_width(xes) == 32) &&
3524 (xed3_operand_get_mode(xes) == 2) &&
3525 (xed3_operand_get_base0(xes) == XED_REG_R10D);
3526 if (conditions_satisfied) {
3527 okay=1;
3528 xed3_operand_set_mod(xes,2);
3529 if (okay) return 1;
3530 }
3531 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3532 (xed3_operand_get_disp_width(xes) == 32) &&
3533 (xed3_operand_get_mode(xes) == 2) &&
3534 (xed3_operand_get_base0(xes) == XED_REG_R11D);
3535 if (conditions_satisfied) {
3536 okay=1;
3537 xed3_operand_set_mod(xes,2);
3538 if (okay) return 1;
3539 }
3540 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3541 (xed3_operand_get_disp_width(xes) == 32) &&
3542 (xed3_operand_get_mode(xes) == 2) &&
3543 (xed3_operand_get_base0(xes) == XED_REG_R12D);
3544 if (conditions_satisfied) {
3545 okay=1;
3546 xed3_operand_set_mod(xes,2);
3547 if (okay) return 1;
3548 }
3549 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3550 (xed3_operand_get_disp_width(xes) == 32) &&
3551 (xed3_operand_get_mode(xes) == 2) &&
3552 (xed3_operand_get_base0(xes) == XED_REG_R13D);
3553 if (conditions_satisfied) {
3554 okay=1;
3555 xed3_operand_set_mod(xes,2);
3556 if (okay) return 1;
3557 }
3558 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3559 (xed3_operand_get_disp_width(xes) == 32) &&
3560 (xed3_operand_get_mode(xes) == 2) &&
3561 (xed3_operand_get_base0(xes) == XED_REG_R14D);
3562 if (conditions_satisfied) {
3563 okay=1;
3564 xed3_operand_set_mod(xes,2);
3565 if (okay) return 1;
3566 }
3567 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3568 (xed3_operand_get_disp_width(xes) == 32) &&
3569 (xed3_operand_get_mode(xes) == 2) &&
3570 (xed3_operand_get_base0(xes) == XED_REG_R15D);
3571 if (conditions_satisfied) {
3572 okay=1;
3573 xed3_operand_set_mod(xes,2);
3574 if (okay) return 1;
3575 }
3576 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3577 (xed3_operand_get_disp_width(xes) == 0) &&
3578 (xed3_operand_get_base0(xes) == XED_REG_BP) &&
3579 (xed3_operand_get_easz(xes) == 1);
3580 if (conditions_satisfied) {
3581 okay=1;
3582 xed3_operand_set_mod(xes,1);
3583 xed3_operand_set_disp_width(xes,8);
3584 xed3_operand_set_disp(xes,0);
3585 if (okay) return 1;
3586 }
3587 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3588 (xed3_operand_get_disp_width(xes) == 0) &&
3589 (xed3_operand_get_base0(xes) == XED_REG_EBP) &&
3590 (xed3_operand_get_easz(xes) == 2);
3591 if (conditions_satisfied) {
3592 okay=1;
3593 xed3_operand_set_mod(xes,1);
3594 xed3_operand_set_disp_width(xes,8);
3595 xed3_operand_set_disp(xes,0);
3596 if (okay) return 1;
3597 }
3598 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3599 (xed3_operand_get_disp_width(xes) == 0) &&
3600 (xed3_operand_get_base0(xes) == XED_REG_RBP) &&
3601 (xed3_operand_get_easz(xes) == 3);
3602 if (conditions_satisfied) {
3603 okay=1;
3604 xed3_operand_set_mod(xes,1);
3605 xed3_operand_set_disp_width(xes,8);
3606 xed3_operand_set_disp(xes,0);
3607 if (okay) return 1;
3608 }
3609 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3610 (xed3_operand_get_disp_width(xes) == 0) &&
3611 (xed3_operand_get_base0(xes) == XED_REG_R13W) &&
3612 (xed3_operand_get_easz(xes) == 1);
3613 if (conditions_satisfied) {
3614 okay=1;
3615 xed3_operand_set_mod(xes,1);
3616 xed3_operand_set_disp_width(xes,8);
3617 xed3_operand_set_disp(xes,0);
3618 if (okay) return 1;
3619 }
3620 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3621 (xed3_operand_get_disp_width(xes) == 0) &&
3622 (xed3_operand_get_base0(xes) == XED_REG_R13D) &&
3623 (xed3_operand_get_easz(xes) == 2);
3624 if (conditions_satisfied) {
3625 okay=1;
3626 xed3_operand_set_mod(xes,1);
3627 xed3_operand_set_disp_width(xes,8);
3628 xed3_operand_set_disp(xes,0);
3629 if (okay) return 1;
3630 }
3631 conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
3632 (xed3_operand_get_disp_width(xes) == 0) &&
3633 (xed3_operand_get_base0(xes) == XED_REG_R13) &&
3634 (xed3_operand_get_easz(xes) == 3);
3635 if (conditions_satisfied) {
3636 okay=1;
3637 xed3_operand_set_mod(xes,1);
3638 xed3_operand_set_disp_width(xes,8);
3639 xed3_operand_set_disp(xes,0);
3640 if (okay) return 1;
3641 }
3642 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3643 (xed3_operand_get_disp_width(xes) == 0) &&
3644 (xed3_operand_get_base0(xes) == XED_REG_BP) &&
3645 (xed3_operand_get_easz(xes) == 1);
3646 if (conditions_satisfied) {
3647 okay=1;
3648 xed3_operand_set_mod(xes,1);
3649 xed3_operand_set_disp_width(xes,8);
3650 xed3_operand_set_disp(xes,0);
3651 if (okay) return 1;
3652 }
3653 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3654 (xed3_operand_get_disp_width(xes) == 0) &&
3655 (xed3_operand_get_base0(xes) == XED_REG_EBP) &&
3656 (xed3_operand_get_easz(xes) == 2);
3657 if (conditions_satisfied) {
3658 okay=1;
3659 xed3_operand_set_mod(xes,1);
3660 xed3_operand_set_disp_width(xes,8);
3661 xed3_operand_set_disp(xes,0);
3662 if (okay) return 1;
3663 }
3664 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3665 (xed3_operand_get_disp_width(xes) == 0) &&
3666 (xed3_operand_get_base0(xes) == XED_REG_RBP) &&
3667 (xed3_operand_get_easz(xes) == 3);
3668 if (conditions_satisfied) {
3669 okay=1;
3670 xed3_operand_set_mod(xes,1);
3671 xed3_operand_set_disp_width(xes,8);
3672 xed3_operand_set_disp(xes,0);
3673 if (okay) return 1;
3674 }
3675 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3676 (xed3_operand_get_disp_width(xes) == 0) &&
3677 (xed3_operand_get_base0(xes) == XED_REG_R13W) &&
3678 (xed3_operand_get_easz(xes) == 1);
3679 if (conditions_satisfied) {
3680 okay=1;
3681 xed3_operand_set_mod(xes,1);
3682 xed3_operand_set_disp_width(xes,8);
3683 xed3_operand_set_disp(xes,0);
3684 if (okay) return 1;
3685 }
3686 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3687 (xed3_operand_get_disp_width(xes) == 0) &&
3688 (xed3_operand_get_base0(xes) == XED_REG_R13D) &&
3689 (xed3_operand_get_easz(xes) == 2);
3690 if (conditions_satisfied) {
3691 okay=1;
3692 xed3_operand_set_mod(xes,1);
3693 xed3_operand_set_disp_width(xes,8);
3694 xed3_operand_set_disp(xes,0);
3695 if (okay) return 1;
3696 }
3697 conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
3698 (xed3_operand_get_disp_width(xes) == 0) &&
3699 (xed3_operand_get_base0(xes) == XED_REG_R13) &&
3700 (xed3_operand_get_easz(xes) == 3);
3701 if (conditions_satisfied) {
3702 okay=1;
3703 xed3_operand_set_mod(xes,1);
3704 xed3_operand_set_disp_width(xes,8);
3705 xed3_operand_set_disp(xes,0);
3706 if (okay) return 1;
3707 }
3708 conditions_satisfied = 1;
3709 if (conditions_satisfied) {
3710 okay=1;
3711 xed3_operand_set_error(xes,XED_ERROR_GENERAL_ERROR);
3712 return 0; /* error */
3713 /* FIXME action code not done yet for return 1*/
3714 if (okay) return 1;
3715 }
3716 return 0; /*pacify the compiler*/
3717 (void) okay;
3718 (void) xes;
3719 (void) conditions_satisfied;
3720 }
xed_encode_nonterminal_VMODRM_MOD_ENCODE_EMIT(xed_encoder_request_t * xes)3721 xed_uint_t xed_encode_nonterminal_VMODRM_MOD_ENCODE_EMIT(xed_encoder_request_t* xes)
3722 {
3723 /* VMODRM_MOD_ENCODE()::
3724 EASZ=2 DISP_WIDTH=8 -> FB MOD=1 value=0x1
3725 EASZ=2 DISP_WIDTH=32 BASE0=@ -> FB MOD=0 value=0x0
3726 EASZ=3 DISP_WIDTH=32 BASE0=@ -> FB MOD=0 value=0x0
3727 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_AX EASZ=1 -> FB MOD=0 value=0x0
3728 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_EAX EASZ=2 -> FB MOD=0 value=0x0
3729 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_RAX EASZ=3 -> FB MOD=0 value=0x0
3730 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_BX EASZ=1 -> FB MOD=0 value=0x0
3731 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_EBX EASZ=2 -> FB MOD=0 value=0x0
3732 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_RBX EASZ=3 -> FB MOD=0 value=0x0
3733 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_CX EASZ=1 -> FB MOD=0 value=0x0
3734 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_ECX EASZ=2 -> FB MOD=0 value=0x0
3735 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_RCX EASZ=3 -> FB MOD=0 value=0x0
3736 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_DX EASZ=1 -> FB MOD=0 value=0x0
3737 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_EDX EASZ=2 -> FB MOD=0 value=0x0
3738 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_RDX EASZ=3 -> FB MOD=0 value=0x0
3739 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_SI EASZ=1 -> FB MOD=0 value=0x0
3740 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_ESI EASZ=2 -> FB MOD=0 value=0x0
3741 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_RSI EASZ=3 -> FB MOD=0 value=0x0
3742 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_DI EASZ=1 -> FB MOD=0 value=0x0
3743 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_EDI EASZ=2 -> FB MOD=0 value=0x0
3744 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_RDI EASZ=3 -> FB MOD=0 value=0x0
3745 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_SP EASZ=1 -> FB MOD=0 value=0x0
3746 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_ESP EASZ=2 -> FB MOD=0 value=0x0
3747 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_RSP EASZ=3 -> FB MOD=0 value=0x0
3748 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R8W EASZ=1 -> FB MOD=0 value=0x0
3749 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R8D EASZ=2 -> FB MOD=0 value=0x0
3750 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R8 EASZ=3 -> FB MOD=0 value=0x0
3751 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R9W EASZ=1 -> FB MOD=0 value=0x0
3752 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R9D EASZ=2 -> FB MOD=0 value=0x0
3753 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R9 EASZ=3 -> FB MOD=0 value=0x0
3754 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R10W EASZ=1 -> FB MOD=0 value=0x0
3755 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R10D EASZ=2 -> FB MOD=0 value=0x0
3756 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R10 EASZ=3 -> FB MOD=0 value=0x0
3757 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R11W EASZ=1 -> FB MOD=0 value=0x0
3758 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R11D EASZ=2 -> FB MOD=0 value=0x0
3759 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R11 EASZ=3 -> FB MOD=0 value=0x0
3760 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R12W EASZ=1 -> FB MOD=0 value=0x0
3761 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R12D EASZ=2 -> FB MOD=0 value=0x0
3762 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R12 EASZ=3 -> FB MOD=0 value=0x0
3763 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R14W EASZ=1 -> FB MOD=0 value=0x0
3764 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R14D EASZ=2 -> FB MOD=0 value=0x0
3765 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R14 EASZ=3 -> FB MOD=0 value=0x0
3766 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R15W EASZ=1 -> FB MOD=0 value=0x0
3767 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R15D EASZ=2 -> FB MOD=0 value=0x0
3768 EASZ=2 DISP_WIDTH=0 MODE=2 BASE0=XED_REG_R15 EASZ=3 -> FB MOD=0 value=0x0
3769 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_AX EASZ=1 -> FB MOD=0 value=0x0
3770 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_EAX EASZ=2 -> FB MOD=0 value=0x0
3771 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_RAX EASZ=3 -> FB MOD=0 value=0x0
3772 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_BX EASZ=1 -> FB MOD=0 value=0x0
3773 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_EBX EASZ=2 -> FB MOD=0 value=0x0
3774 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_RBX EASZ=3 -> FB MOD=0 value=0x0
3775 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_CX EASZ=1 -> FB MOD=0 value=0x0
3776 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_ECX EASZ=2 -> FB MOD=0 value=0x0
3777 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_RCX EASZ=3 -> FB MOD=0 value=0x0
3778 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_DX EASZ=1 -> FB MOD=0 value=0x0
3779 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_EDX EASZ=2 -> FB MOD=0 value=0x0
3780 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_RDX EASZ=3 -> FB MOD=0 value=0x0
3781 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_SI EASZ=1 -> FB MOD=0 value=0x0
3782 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_ESI EASZ=2 -> FB MOD=0 value=0x0
3783 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_RSI EASZ=3 -> FB MOD=0 value=0x0
3784 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_DI EASZ=1 -> FB MOD=0 value=0x0
3785 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_EDI EASZ=2 -> FB MOD=0 value=0x0
3786 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_RDI EASZ=3 -> FB MOD=0 value=0x0
3787 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_SP EASZ=1 -> FB MOD=0 value=0x0
3788 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_ESP EASZ=2 -> FB MOD=0 value=0x0
3789 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_RSP EASZ=3 -> FB MOD=0 value=0x0
3790 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R8W EASZ=1 -> FB MOD=0 value=0x0
3791 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R8D EASZ=2 -> FB MOD=0 value=0x0
3792 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R8 EASZ=3 -> FB MOD=0 value=0x0
3793 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R9W EASZ=1 -> FB MOD=0 value=0x0
3794 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R9D EASZ=2 -> FB MOD=0 value=0x0
3795 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R9 EASZ=3 -> FB MOD=0 value=0x0
3796 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R10W EASZ=1 -> FB MOD=0 value=0x0
3797 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R10D EASZ=2 -> FB MOD=0 value=0x0
3798 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R10 EASZ=3 -> FB MOD=0 value=0x0
3799 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R11W EASZ=1 -> FB MOD=0 value=0x0
3800 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R11D EASZ=2 -> FB MOD=0 value=0x0
3801 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R11 EASZ=3 -> FB MOD=0 value=0x0
3802 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R12W EASZ=1 -> FB MOD=0 value=0x0
3803 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R12D EASZ=2 -> FB MOD=0 value=0x0
3804 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R12 EASZ=3 -> FB MOD=0 value=0x0
3805 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R14W EASZ=1 -> FB MOD=0 value=0x0
3806 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R14D EASZ=2 -> FB MOD=0 value=0x0
3807 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R14 EASZ=3 -> FB MOD=0 value=0x0
3808 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R15W EASZ=1 -> FB MOD=0 value=0x0
3809 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R15D EASZ=2 -> FB MOD=0 value=0x0
3810 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R15 EASZ=3 -> FB MOD=0 value=0x0
3811 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_RAX -> FB MOD=1 value=0x1
3812 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_RBX -> FB MOD=1 value=0x1
3813 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_RCX -> FB MOD=1 value=0x1
3814 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_RDX -> FB MOD=1 value=0x1
3815 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_RSP -> FB MOD=1 value=0x1
3816 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_RBP -> FB MOD=1 value=0x1
3817 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_RSI -> FB MOD=1 value=0x1
3818 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_RDI -> FB MOD=1 value=0x1
3819 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_R8 -> FB MOD=1 value=0x1
3820 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_R9 -> FB MOD=1 value=0x1
3821 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_R10 -> FB MOD=1 value=0x1
3822 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_R11 -> FB MOD=1 value=0x1
3823 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_R12 -> FB MOD=1 value=0x1
3824 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_R13 -> FB MOD=1 value=0x1
3825 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_R14 -> FB MOD=1 value=0x1
3826 EASZ=3 DISP_WIDTH=8 BASE0=XED_REG_R15 -> FB MOD=1 value=0x1
3827 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_AX EASZ=1 -> FB MOD=2 value=0x2
3828 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_EAX EASZ=2 -> FB MOD=2 value=0x2
3829 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_RAX EASZ=3 -> FB MOD=2 value=0x2
3830 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_BX EASZ=1 -> FB MOD=2 value=0x2
3831 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_EBX EASZ=2 -> FB MOD=2 value=0x2
3832 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_RBX EASZ=3 -> FB MOD=2 value=0x2
3833 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_CX EASZ=1 -> FB MOD=2 value=0x2
3834 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_ECX EASZ=2 -> FB MOD=2 value=0x2
3835 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_RCX EASZ=3 -> FB MOD=2 value=0x2
3836 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_DX EASZ=1 -> FB MOD=2 value=0x2
3837 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_EDX EASZ=2 -> FB MOD=2 value=0x2
3838 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_RDX EASZ=3 -> FB MOD=2 value=0x2
3839 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_SI EASZ=1 -> FB MOD=2 value=0x2
3840 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_ESI EASZ=2 -> FB MOD=2 value=0x2
3841 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_RSI EASZ=3 -> FB MOD=2 value=0x2
3842 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_DI EASZ=1 -> FB MOD=2 value=0x2
3843 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_EDI EASZ=2 -> FB MOD=2 value=0x2
3844 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_RDI EASZ=3 -> FB MOD=2 value=0x2
3845 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_SP EASZ=1 -> FB MOD=2 value=0x2
3846 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_ESP EASZ=2 -> FB MOD=2 value=0x2
3847 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_RSP EASZ=3 -> FB MOD=2 value=0x2
3848 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_BP EASZ=1 -> FB MOD=2 value=0x2
3849 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_EBP EASZ=2 -> FB MOD=2 value=0x2
3850 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_RBP EASZ=3 -> FB MOD=2 value=0x2
3851 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R8W EASZ=1 -> FB MOD=2 value=0x2
3852 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R8D EASZ=2 -> FB MOD=2 value=0x2
3853 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R8 EASZ=3 -> FB MOD=2 value=0x2
3854 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R9W EASZ=1 -> FB MOD=2 value=0x2
3855 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R9D EASZ=2 -> FB MOD=2 value=0x2
3856 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R9 EASZ=3 -> FB MOD=2 value=0x2
3857 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R10W EASZ=1 -> FB MOD=2 value=0x2
3858 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R10D EASZ=2 -> FB MOD=2 value=0x2
3859 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R10 EASZ=3 -> FB MOD=2 value=0x2
3860 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R11W EASZ=1 -> FB MOD=2 value=0x2
3861 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R11D EASZ=2 -> FB MOD=2 value=0x2
3862 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R11 EASZ=3 -> FB MOD=2 value=0x2
3863 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R12W EASZ=1 -> FB MOD=2 value=0x2
3864 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R12D EASZ=2 -> FB MOD=2 value=0x2
3865 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R12 EASZ=3 -> FB MOD=2 value=0x2
3866 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R13W EASZ=1 -> FB MOD=2 value=0x2
3867 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R13D EASZ=2 -> FB MOD=2 value=0x2
3868 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R13 EASZ=3 -> FB MOD=2 value=0x2
3869 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R14W EASZ=1 -> FB MOD=2 value=0x2
3870 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R14D EASZ=2 -> FB MOD=2 value=0x2
3871 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R14 EASZ=3 -> FB MOD=2 value=0x2
3872 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R15W EASZ=1 -> FB MOD=2 value=0x2
3873 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R15D EASZ=2 -> FB MOD=2 value=0x2
3874 EASZ=3 DISP_WIDTH=32 BASE0=XED_REG_R15 EASZ=3 -> FB MOD=2 value=0x2
3875 EASZ=2 DISP_WIDTH=32 MODE=1 BASE0=XED_REG_EAX -> FB MOD=2 value=0x2
3876 EASZ=2 DISP_WIDTH=32 MODE=1 BASE0=XED_REG_EBX -> FB MOD=2 value=0x2
3877 EASZ=2 DISP_WIDTH=32 MODE=1 BASE0=XED_REG_ECX -> FB MOD=2 value=0x2
3878 EASZ=2 DISP_WIDTH=32 MODE=1 BASE0=XED_REG_EDX -> FB MOD=2 value=0x2
3879 EASZ=2 DISP_WIDTH=32 MODE=1 BASE0=XED_REG_ESP -> FB MOD=2 value=0x2
3880 EASZ=2 DISP_WIDTH=32 MODE=1 BASE0=XED_REG_EBP -> FB MOD=2 value=0x2
3881 EASZ=2 DISP_WIDTH=32 MODE=1 BASE0=XED_REG_ESI -> FB MOD=2 value=0x2
3882 EASZ=2 DISP_WIDTH=32 MODE=1 BASE0=XED_REG_EDI -> FB MOD=2 value=0x2
3883 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_EAX -> FB MOD=2 value=0x2
3884 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_EBX -> FB MOD=2 value=0x2
3885 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_ECX -> FB MOD=2 value=0x2
3886 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_EDX -> FB MOD=2 value=0x2
3887 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_ESP -> FB MOD=2 value=0x2
3888 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_EBP -> FB MOD=2 value=0x2
3889 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_ESI -> FB MOD=2 value=0x2
3890 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_EDI -> FB MOD=2 value=0x2
3891 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_R8D -> FB MOD=2 value=0x2
3892 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_R9D -> FB MOD=2 value=0x2
3893 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_R10D -> FB MOD=2 value=0x2
3894 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_R11D -> FB MOD=2 value=0x2
3895 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_R12D -> FB MOD=2 value=0x2
3896 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_R13D -> FB MOD=2 value=0x2
3897 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_R14D -> FB MOD=2 value=0x2
3898 EASZ=2 DISP_WIDTH=32 MODE=2 BASE0=XED_REG_R15D -> FB MOD=2 value=0x2
3899 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_BP EASZ=1 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
3900 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_EBP EASZ=2 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
3901 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_RBP EASZ=3 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
3902 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_R13W EASZ=1 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
3903 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_R13D EASZ=2 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
3904 EASZ=2 DISP_WIDTH=0 BASE0=XED_REG_R13 EASZ=3 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
3905 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_BP EASZ=1 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
3906 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_EBP EASZ=2 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
3907 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_RBP EASZ=3 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
3908 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R13W EASZ=1 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
3909 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R13D EASZ=2 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
3910 EASZ=3 DISP_WIDTH=0 BASE0=XED_REG_R13 EASZ=3 -> FB MOD=1 value=0x1 FB DISP_WIDTH=8 value=0x8 FB DISP=0 value=0x0
3911 */
3912 xed_uint_t okay=1;
3913 return 1;
3914 (void) okay;
3915 (void) xes;
3916 }
xed_encode_nonterminal_UISA_ENC_INDEX_ZMM_EMIT(xed_encoder_request_t * xes)3917 xed_uint_t xed_encode_nonterminal_UISA_ENC_INDEX_ZMM_EMIT(xed_encoder_request_t* xes)
3918 {
3919 /* UISA_ENC_INDEX_ZMM()::
3920 INDEX=XED_REG_ZMM0 -> FB VEXDEST4=0 value=0x0 FB REXX=0 value=0x0 FB SIBINDEX=0 value=0x0
3921 INDEX=XED_REG_ZMM1 -> FB VEXDEST4=0 value=0x0 FB REXX=0 value=0x0 FB SIBINDEX=1 value=0x1
3922 INDEX=XED_REG_ZMM2 -> FB VEXDEST4=0 value=0x0 FB REXX=0 value=0x0 FB SIBINDEX=2 value=0x2
3923 INDEX=XED_REG_ZMM3 -> FB VEXDEST4=0 value=0x0 FB REXX=0 value=0x0 FB SIBINDEX=3 value=0x3
3924 INDEX=XED_REG_ZMM4 -> FB VEXDEST4=0 value=0x0 FB REXX=0 value=0x0 FB SIBINDEX=4 value=0x4
3925 INDEX=XED_REG_ZMM5 -> FB VEXDEST4=0 value=0x0 FB REXX=0 value=0x0 FB SIBINDEX=5 value=0x5
3926 INDEX=XED_REG_ZMM6 -> FB VEXDEST4=0 value=0x0 FB REXX=0 value=0x0 FB SIBINDEX=6 value=0x6
3927 INDEX=XED_REG_ZMM7 -> FB VEXDEST4=0 value=0x0 FB REXX=0 value=0x0 FB SIBINDEX=7 value=0x7
3928 INDEX=XED_REG_ZMM8 -> FB VEXDEST4=0 value=0x0 FB REXX=1 value=0x1 FB SIBINDEX=0 value=0x0
3929 INDEX=XED_REG_ZMM9 -> FB VEXDEST4=0 value=0x0 FB REXX=1 value=0x1 FB SIBINDEX=1 value=0x1
3930 INDEX=XED_REG_ZMM10 -> FB VEXDEST4=0 value=0x0 FB REXX=1 value=0x1 FB SIBINDEX=2 value=0x2
3931 INDEX=XED_REG_ZMM11 -> FB VEXDEST4=0 value=0x0 FB REXX=1 value=0x1 FB SIBINDEX=3 value=0x3
3932 INDEX=XED_REG_ZMM12 -> FB VEXDEST4=0 value=0x0 FB REXX=1 value=0x1 FB SIBINDEX=4 value=0x4
3933 INDEX=XED_REG_ZMM13 -> FB VEXDEST4=0 value=0x0 FB REXX=1 value=0x1 FB SIBINDEX=5 value=0x5
3934 INDEX=XED_REG_ZMM14 -> FB VEXDEST4=0 value=0x0 FB REXX=1 value=0x1 FB SIBINDEX=6 value=0x6
3935 INDEX=XED_REG_ZMM15 -> FB VEXDEST4=0 value=0x0 FB REXX=1 value=0x1 FB SIBINDEX=7 value=0x7
3936 INDEX=XED_REG_ZMM16 -> FB VEXDEST4=1 value=0x1 FB REXX=0 value=0x0 FB SIBINDEX=0 value=0x0
3937 INDEX=XED_REG_ZMM17 -> FB VEXDEST4=1 value=0x1 FB REXX=0 value=0x0 FB SIBINDEX=1 value=0x1
3938 INDEX=XED_REG_ZMM18 -> FB VEXDEST4=1 value=0x1 FB REXX=0 value=0x0 FB SIBINDEX=2 value=0x2
3939 INDEX=XED_REG_ZMM19 -> FB VEXDEST4=1 value=0x1 FB REXX=0 value=0x0 FB SIBINDEX=3 value=0x3
3940 INDEX=XED_REG_ZMM20 -> FB VEXDEST4=1 value=0x1 FB REXX=0 value=0x0 FB SIBINDEX=4 value=0x4
3941 INDEX=XED_REG_ZMM21 -> FB VEXDEST4=1 value=0x1 FB REXX=0 value=0x0 FB SIBINDEX=5 value=0x5
3942 INDEX=XED_REG_ZMM22 -> FB VEXDEST4=1 value=0x1 FB REXX=0 value=0x0 FB SIBINDEX=6 value=0x6
3943 INDEX=XED_REG_ZMM23 -> FB VEXDEST4=1 value=0x1 FB REXX=0 value=0x0 FB SIBINDEX=7 value=0x7
3944 INDEX=XED_REG_ZMM24 -> FB VEXDEST4=1 value=0x1 FB REXX=1 value=0x1 FB SIBINDEX=0 value=0x0
3945 INDEX=XED_REG_ZMM25 -> FB VEXDEST4=1 value=0x1 FB REXX=1 value=0x1 FB SIBINDEX=1 value=0x1
3946 INDEX=XED_REG_ZMM26 -> FB VEXDEST4=1 value=0x1 FB REXX=1 value=0x1 FB SIBINDEX=2 value=0x2
3947 INDEX=XED_REG_ZMM27 -> FB VEXDEST4=1 value=0x1 FB REXX=1 value=0x1 FB SIBINDEX=3 value=0x3
3948 INDEX=XED_REG_ZMM28 -> FB VEXDEST4=1 value=0x1 FB REXX=1 value=0x1 FB SIBINDEX=4 value=0x4
3949 INDEX=XED_REG_ZMM29 -> FB VEXDEST4=1 value=0x1 FB REXX=1 value=0x1 FB SIBINDEX=5 value=0x5
3950 INDEX=XED_REG_ZMM30 -> FB VEXDEST4=1 value=0x1 FB REXX=1 value=0x1 FB SIBINDEX=6 value=0x6
3951 INDEX=XED_REG_ZMM31 -> FB VEXDEST4=1 value=0x1 FB REXX=1 value=0x1 FB SIBINDEX=7 value=0x7
3952 */
3953 xed_uint_t okay=1;
3954 return 1;
3955 (void) okay;
3956 (void) xes;
3957 }
xed_encode_nonterminal_FIXUP_SMODE_ENC_EMIT(xed_encoder_request_t * xes)3958 xed_uint_t xed_encode_nonterminal_FIXUP_SMODE_ENC_EMIT(xed_encoder_request_t* xes)
3959 {
3960 /* FIXUP_SMODE_ENC()::
3961 MODE=2 SMODE=0 -> FB SMODE=2 value=0x2
3962 MODE=2 SMODE=1 -> FB ERROR=XED_ERROR_GENERAL_ERROR
3963 */
3964 xed_uint_t okay=1;
3965 return 1;
3966 (void) okay;
3967 (void) xes;
3968 }
xed_encode_nonterminal_FORCE64_EMIT(xed_encoder_request_t * xes)3969 xed_uint_t xed_encode_nonterminal_FORCE64_EMIT(xed_encoder_request_t* xes)
3970 {
3971 /* FORCE64()::
3972 */
3973 xed_uint_t okay=1;
3974 return 1;
3975 (void) okay;
3976 (void) xes;
3977 }
xed_encode_nonterminal_NELEM_GSCAT_EMIT(xed_encoder_request_t * xes)3978 xed_uint_t xed_encode_nonterminal_NELEM_GSCAT_EMIT(xed_encoder_request_t* xes)
3979 {
3980 /* NELEM_GSCAT()::
3981 */
3982 xed_uint_t okay=1;
3983 return 1;
3984 (void) okay;
3985 (void) xes;
3986 }
xed_encode_nonterminal_SEGMENT_ENCODE_EMIT(xed_encoder_request_t * xes)3987 xed_uint_t xed_encode_nonterminal_SEGMENT_ENCODE_EMIT(xed_encoder_request_t* xes)
3988 {
3989 /* SEGMENT_ENCODE()::
3990 DEFAULT_SEG=1 SEG0=@ -> FB SEG_OVD=0 value=0x0
3991 DEFAULT_SEG=1 SEG0=XED_REG_CS -> FB SEG_OVD=1 value=0x1
3992 DEFAULT_SEG=1 SEG0=XED_REG_DS -> FB SEG_OVD=2 value=0x2
3993 DEFAULT_SEG=1 SEG0=XED_REG_SS -> FB SEG_OVD=0 value=0x0
3994 DEFAULT_SEG=1 SEG0=XED_REG_ES -> FB SEG_OVD=3 value=0x3
3995 DEFAULT_SEG=1 SEG0=XED_REG_FS -> FB SEG_OVD=4 value=0x4
3996 DEFAULT_SEG=1 SEG0=XED_REG_GS -> FB SEG_OVD=5 value=0x5
3997 DEFAULT_SEG=0 SEG0=@ -> FB SEG_OVD=0 value=0x0
3998 DEFAULT_SEG=0 SEG0=XED_REG_CS -> FB SEG_OVD=1 value=0x1
3999 DEFAULT_SEG=0 SEG0=XED_REG_DS -> FB SEG_OVD=0 value=0x0
4000 DEFAULT_SEG=0 SEG0=XED_REG_SS -> FB SEG_OVD=6 value=0x6
4001 DEFAULT_SEG=0 SEG0=XED_REG_ES -> FB SEG_OVD=3 value=0x3
4002 DEFAULT_SEG=0 SEG0=XED_REG_FS -> FB SEG_OVD=4 value=0x4
4003 DEFAULT_SEG=0 SEG0=XED_REG_GS -> FB SEG_OVD=5 value=0x5
4004 */
4005 xed_uint_t okay=1;
4006 return 1;
4007 (void) okay;
4008 (void) xes;
4009 }
xed_encode_nonterminal_MODRM_RM_ENCODE_EMIT(xed_encoder_request_t * xes)4010 xed_uint_t xed_encode_nonterminal_MODRM_RM_ENCODE_EMIT(xed_encoder_request_t* xes)
4011 {
4012 /* MODRM_RM_ENCODE()::
4013 EASZ=1 SIB=0 -> nt NT[MODRM_RM_ENCODE_EA16_SIB0]
4014 EASZ=2 SIB=0 -> nt NT[MODRM_RM_ENCODE_EA32_SIB0]
4015 EASZ=3 SIB=0 -> nt NT[MODRM_RM_ENCODE_EA64_SIB0]
4016 EASZ!=1 SIB=1 -> nt NT[MODRM_RM_ENCODE_EANOT16_SIB1]
4017 */
4018 xed_uint_t okay=1;
4019 unsigned int iform = xed_encoder_request_iforms(xes)->x_MODRM_RM_ENCODE;
4020 /* 5 */ if (iform==5) {
4021 xed_encode_nonterminal_MODRM_RM_ENCODE_EA16_SIB0_EMIT(xes);
4022 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4023 return okay;
4024 }
4025 /* 2 */ if (iform==2) {
4026 xed_encode_nonterminal_MODRM_RM_ENCODE_EA32_SIB0_EMIT(xes);
4027 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4028 return okay;
4029 }
4030 /* 7 */ if (iform==7) {
4031 xed_encode_nonterminal_MODRM_RM_ENCODE_EA64_SIB0_EMIT(xes);
4032 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4033 return okay;
4034 }
4035 /* 6 */ if (iform==6) {
4036 xed_encode_nonterminal_MODRM_RM_ENCODE_EANOT16_SIB1_EMIT(xes);
4037 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4038 return okay;
4039 }
4040 if (1) { /*otherwise*/
4041 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4042 return okay;
4043 }
4044 return 0; /*pacify the compiler*/
4045 (void) okay;
4046 (void) xes;
4047 (void) iform;
4048 }
xed_encode_nonterminal_FIX_ROUND_LEN512_EMIT(xed_encoder_request_t * xes)4049 xed_uint_t xed_encode_nonterminal_FIX_ROUND_LEN512_EMIT(xed_encoder_request_t* xes)
4050 {
4051 /* FIX_ROUND_LEN512()::
4052 */
4053 xed_uint_t okay=1;
4054 return 1;
4055 (void) okay;
4056 (void) xes;
4057 }
xed_encode_nonterminal_NELEM_GPR_READER_SUBDWORD_EMIT(xed_encoder_request_t * xes)4058 xed_uint_t xed_encode_nonterminal_NELEM_GPR_READER_SUBDWORD_EMIT(xed_encoder_request_t* xes)
4059 {
4060 /* NELEM_GPR_READER_SUBDWORD()::
4061 */
4062 xed_uint_t okay=1;
4063 return 1;
4064 (void) okay;
4065 (void) xes;
4066 }
xed_encode_nonterminal_NELEM_GPR_WRITER_LDOP_EMIT(xed_encoder_request_t * xes)4067 xed_uint_t xed_encode_nonterminal_NELEM_GPR_WRITER_LDOP_EMIT(xed_encoder_request_t* xes)
4068 {
4069 /* NELEM_GPR_WRITER_LDOP()::
4070 */
4071 xed_uint_t okay=1;
4072 return 1;
4073 (void) okay;
4074 (void) xes;
4075 }
xed_encode_nonterminal_ERROR_EMIT(xed_encoder_request_t * xes)4076 xed_uint_t xed_encode_nonterminal_ERROR_EMIT(xed_encoder_request_t* xes)
4077 {
4078 /* ERROR()::
4079 */
4080 xed_uint_t okay=1;
4081 return 1;
4082 (void) okay;
4083 (void) xes;
4084 }
xed_encode_nonterminal_DISP_WIDTH_32_EMIT(xed_encoder_request_t * xes)4085 xed_uint_t xed_encode_nonterminal_DISP_WIDTH_32_EMIT(xed_encoder_request_t* xes)
4086 {
4087 /* DISP_WIDTH_32()::
4088 DISP_WIDTH=32 -> nothing
4089 */
4090 xed_uint_t okay=1;
4091 return 1;
4092 (void) okay;
4093 (void) xes;
4094 }
xed_encode_nonterminal_VEX_TYPE_ENC_BIND(xed_encoder_request_t * xes)4095 xed_uint_t xed_encode_nonterminal_VEX_TYPE_ENC_BIND(xed_encoder_request_t* xes)
4096 {
4097 /* VEX_TYPE_ENC()::
4098 REXX=1 -> emit 0xC4 emit_type=numeric value=0xc4 nbits=8 FB VEX_C4=1 value=0x1
4099 REXB=1 -> emit 0xC4 emit_type=numeric value=0xc4 nbits=8 FB VEX_C4=1 value=0x1
4100 MAP=0 -> emit 0xC4 emit_type=numeric value=0xc4 nbits=8 FB VEX_C4=1 value=0x1
4101 MAP=2 -> emit 0xC4 emit_type=numeric value=0xc4 nbits=8 FB VEX_C4=1 value=0x1
4102 MAP=3 -> emit 0xC4 emit_type=numeric value=0xc4 nbits=8 FB VEX_C4=1 value=0x1
4103 REXW=1 -> emit 0xC4 emit_type=numeric value=0xc4 nbits=8 FB VEX_C4=1 value=0x1
4104 */
4105 xed_uint_t okay=1;
4106 xed_uint_t conditions_satisfied=0;
4107 conditions_satisfied = (xed3_operand_get_rexx(xes) == 1);
4108 if (conditions_satisfied) {
4109 okay=1;
4110 xed3_operand_set_vex_c4(xes,1);
4111 xed_encoder_request_iforms(xes)->x_VEX_TYPE_ENC=1;
4112 if (okay) return 1;
4113 }
4114 conditions_satisfied = (xed3_operand_get_rexb(xes) == 1);
4115 if (conditions_satisfied) {
4116 okay=1;
4117 xed3_operand_set_vex_c4(xes,1);
4118 xed_encoder_request_iforms(xes)->x_VEX_TYPE_ENC=2;
4119 if (okay) return 1;
4120 }
4121 conditions_satisfied = (xed3_operand_get_map(xes) == 0);
4122 if (conditions_satisfied) {
4123 okay=1;
4124 xed3_operand_set_vex_c4(xes,1);
4125 xed_encoder_request_iforms(xes)->x_VEX_TYPE_ENC=3;
4126 if (okay) return 1;
4127 }
4128 conditions_satisfied = (xed3_operand_get_map(xes) == 2);
4129 if (conditions_satisfied) {
4130 okay=1;
4131 xed3_operand_set_vex_c4(xes,1);
4132 xed_encoder_request_iforms(xes)->x_VEX_TYPE_ENC=4;
4133 if (okay) return 1;
4134 }
4135 conditions_satisfied = (xed3_operand_get_map(xes) == 3);
4136 if (conditions_satisfied) {
4137 okay=1;
4138 xed3_operand_set_vex_c4(xes,1);
4139 xed_encoder_request_iforms(xes)->x_VEX_TYPE_ENC=5;
4140 if (okay) return 1;
4141 }
4142 conditions_satisfied = (xed3_operand_get_rexw(xes) == 1);
4143 if (conditions_satisfied) {
4144 okay=1;
4145 xed3_operand_set_vex_c4(xes,1);
4146 xed_encoder_request_iforms(xes)->x_VEX_TYPE_ENC=6;
4147 if (okay) return 1;
4148 }
4149 conditions_satisfied = 1;
4150 if (conditions_satisfied) {
4151 okay=1;
4152 xed3_operand_set_vex_c4(xes,0);
4153 /* FIXME action code not done yet for return 1*/
4154 xed_encoder_request_iforms(xes)->x_VEX_TYPE_ENC=0;
4155 if (okay) return 1;
4156 }
4157 return 0; /*pacify the compiler*/
4158 (void) okay;
4159 (void) xes;
4160 (void) conditions_satisfied;
4161 }
xed_encode_nonterminal_VEX_TYPE_ENC_EMIT(xed_encoder_request_t * xes)4162 xed_uint_t xed_encode_nonterminal_VEX_TYPE_ENC_EMIT(xed_encoder_request_t* xes)
4163 {
4164 /* VEX_TYPE_ENC()::
4165 REXX=1 -> emit 0xC4 emit_type=numeric value=0xc4 nbits=8 FB VEX_C4=1 value=0x1
4166 REXB=1 -> emit 0xC4 emit_type=numeric value=0xc4 nbits=8 FB VEX_C4=1 value=0x1
4167 MAP=0 -> emit 0xC4 emit_type=numeric value=0xc4 nbits=8 FB VEX_C4=1 value=0x1
4168 MAP=2 -> emit 0xC4 emit_type=numeric value=0xc4 nbits=8 FB VEX_C4=1 value=0x1
4169 MAP=3 -> emit 0xC4 emit_type=numeric value=0xc4 nbits=8 FB VEX_C4=1 value=0x1
4170 REXW=1 -> emit 0xC4 emit_type=numeric value=0xc4 nbits=8 FB VEX_C4=1 value=0x1
4171 */
4172 xed_uint_t okay=1;
4173 unsigned int iform = xed_encoder_request_iforms(xes)->x_VEX_TYPE_ENC;
4174 /* 1 */ if (iform==1) {
4175 xed_encoder_request_encode_emit(xes,8,0xc4);
4176 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4177 return okay;
4178 }
4179 /* 2 */ if (iform==2) {
4180 xed_encoder_request_encode_emit(xes,8,0xc4);
4181 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4182 return okay;
4183 }
4184 /* 3 */ if (iform==3) {
4185 xed_encoder_request_encode_emit(xes,8,0xc4);
4186 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4187 return okay;
4188 }
4189 /* 4 */ if (iform==4) {
4190 xed_encoder_request_encode_emit(xes,8,0xc4);
4191 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4192 return okay;
4193 }
4194 /* 5 */ if (iform==5) {
4195 xed_encoder_request_encode_emit(xes,8,0xc4);
4196 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4197 return okay;
4198 }
4199 /* 6 */ if (iform==6) {
4200 xed_encoder_request_encode_emit(xes,8,0xc4);
4201 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4202 return okay;
4203 }
4204 if (1) { /*otherwise*/
4205 xed_encoder_request_encode_emit(xes,8,0xc5);
4206 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4207 return okay;
4208 }
4209 return 0; /*pacify the compiler*/
4210 (void) okay;
4211 (void) xes;
4212 (void) iform;
4213 }
xed_encode_nonterminal_EVEX_UPP_ENC_EMIT(xed_encoder_request_t * xes)4214 xed_uint_t xed_encode_nonterminal_EVEX_UPP_ENC_EMIT(xed_encoder_request_t* xes)
4215 {
4216 /* EVEX_UPP_ENC()::
4217 VEX_PREFIX=0 -> emit 0b100 emit_type=numeric value=0x4 nbits=3
4218 VEX_PREFIX=1 -> emit 0b101 emit_type=numeric value=0x5 nbits=3
4219 VEX_PREFIX=3 -> emit 0b110 emit_type=numeric value=0x6 nbits=3
4220 VEX_PREFIX=2 -> emit 0b111 emit_type=numeric value=0x7 nbits=3
4221 */
4222 xed_uint_t okay=1;
4223 unsigned int iform = xed_encoder_request_iforms(xes)->x_EVEX_UPP_ENC;
4224 /* 1 */ if (iform==1) {
4225 xed_encoder_request_encode_emit(xes,3,0x4);
4226 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4227 return okay;
4228 }
4229 /* 2 */ if (iform==2) {
4230 xed_encoder_request_encode_emit(xes,3,0x5);
4231 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4232 return okay;
4233 }
4234 /* 4 */ if (iform==4) {
4235 xed_encoder_request_encode_emit(xes,3,0x6);
4236 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4237 return okay;
4238 }
4239 /* 3 */ if (iform==3) {
4240 xed_encoder_request_encode_emit(xes,3,0x7);
4241 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4242 return okay;
4243 }
4244 if (1) { /*otherwise*/
4245 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4246 return okay;
4247 }
4248 return 0; /*pacify the compiler*/
4249 (void) okay;
4250 (void) xes;
4251 (void) iform;
4252 }
xed_encode_nonterminal_EVEX_MAP_ENC_EMIT(xed_encoder_request_t * xes)4253 xed_uint_t xed_encode_nonterminal_EVEX_MAP_ENC_EMIT(xed_encoder_request_t* xes)
4254 {
4255 /* EVEX_MAP_ENC()::
4256 MAP=0 -> emit 0b0000 emit_type=numeric value=0x0 nbits=4
4257 MAP=1 -> emit 0b0001 emit_type=numeric value=0x1 nbits=4
4258 MAP=2 -> emit 0b0010 emit_type=numeric value=0x2 nbits=4
4259 MAP=3 -> emit 0b0011 emit_type=numeric value=0x3 nbits=4
4260 */
4261 xed_uint_t okay=1;
4262 unsigned int iform = xed_encoder_request_iforms(xes)->x_EVEX_MAP_ENC;
4263 /* 1 */ if (iform==1) {
4264 xed_encoder_request_encode_emit(xes,4,0x0);
4265 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4266 return okay;
4267 }
4268 /* 2 */ if (iform==2) {
4269 xed_encoder_request_encode_emit(xes,4,0x1);
4270 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4271 return okay;
4272 }
4273 /* 3 */ if (iform==3) {
4274 xed_encoder_request_encode_emit(xes,4,0x2);
4275 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4276 return okay;
4277 }
4278 /* 4 */ if (iform==4) {
4279 xed_encoder_request_encode_emit(xes,4,0x3);
4280 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4281 return okay;
4282 }
4283 if (1) { /*otherwise*/
4284 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4285 return okay;
4286 }
4287 return 0; /*pacify the compiler*/
4288 (void) okay;
4289 (void) xes;
4290 (void) iform;
4291 }
xed_encode_nonterminal_NELEM_FULLMEM_EMIT(xed_encoder_request_t * xes)4292 xed_uint_t xed_encode_nonterminal_NELEM_FULLMEM_EMIT(xed_encoder_request_t* xes)
4293 {
4294 /* NELEM_FULLMEM()::
4295 */
4296 xed_uint_t okay=1;
4297 return 1;
4298 (void) okay;
4299 (void) xes;
4300 }
xed_encode_nonterminal_NELEM_GPR_WRITER_STORE_EMIT(xed_encoder_request_t * xes)4301 xed_uint_t xed_encode_nonterminal_NELEM_GPR_WRITER_STORE_EMIT(xed_encoder_request_t* xes)
4302 {
4303 /* NELEM_GPR_WRITER_STORE()::
4304 */
4305 xed_uint_t okay=1;
4306 return 1;
4307 (void) okay;
4308 (void) xes;
4309 }
xed_encode_nonterminal_ESIZE_1_BITS_EMIT(xed_encoder_request_t * xes)4310 xed_uint_t xed_encode_nonterminal_ESIZE_1_BITS_EMIT(xed_encoder_request_t* xes)
4311 {
4312 /* ESIZE_1_BITS()::
4313 */
4314 xed_uint_t okay=1;
4315 return 1;
4316 (void) okay;
4317 (void) xes;
4318 }
xed_encode_nonterminal_NELEM_GPR_WRITER_STORE_SUBDWORD_EMIT(xed_encoder_request_t * xes)4319 xed_uint_t xed_encode_nonterminal_NELEM_GPR_WRITER_STORE_SUBDWORD_EMIT(xed_encoder_request_t* xes)
4320 {
4321 /* NELEM_GPR_WRITER_STORE_SUBDWORD()::
4322 */
4323 xed_uint_t okay=1;
4324 return 1;
4325 (void) okay;
4326 (void) xes;
4327 }
xed_encode_nonterminal_SE_IMM8_EMIT(xed_encoder_request_t * xes)4328 xed_uint_t xed_encode_nonterminal_SE_IMM8_EMIT(xed_encoder_request_t* xes)
4329 {
4330 /* SE_IMM8()::
4331 DUMMY=0 ESRC[ssss]=* UIMM0[dddd]=* -> emit ssss_dddd emit_type=letters nbits=8
4332 */
4333 xed_uint_t okay=1;
4334 unsigned int iform = xed_encoder_request_iforms(xes)->x_SE_IMM8;
4335 /* 1 */ if (iform==1) {
4336 xed_encoder_request_encode_emit(xes,8,(xed3_operand_get_esrc(xes)<< 4)|(xed3_operand_get_uimm0(xes)));
4337 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4338 return okay;
4339 }
4340 if (1) { /*otherwise*/
4341 if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
4342 return okay;
4343 }
4344 return 0; /*pacify the compiler*/
4345 (void) okay;
4346 (void) xes;
4347 (void) iform;
4348 }
xed_encode_nonterminal_MODRM_MOD_EA16_DISP8_EMIT(xed_encoder_request_t * xes)4349 xed_uint_t xed_encode_nonterminal_MODRM_MOD_EA16_DISP8_EMIT(xed_encoder_request_t* xes)
4350 {
4351 /* MODRM_MOD_EA16_DISP8()::
4352 BASE0=XED_REG_BX INDEX=@ -> FB MOD=1 value=0x1
4353 BASE0=XED_REG_SI INDEX=@ -> FB MOD=1 value=0x1
4354 BASE0=XED_REG_DI INDEX=@ -> FB MOD=1 value=0x1
4355 BASE0=XED_REG_BP INDEX=@ -> FB MOD=1 value=0x1
4356 BASE0=XED_REG_BP INDEX=XED_REG_SI -> FB MOD=1 value=0x1
4357 BASE0=XED_REG_BP INDEX=XED_REG_DI -> FB MOD=1 value=0x1
4358 BASE0=XED_REG_BX INDEX=XED_REG_SI -> FB MOD=1 value=0x1
4359 BASE0=XED_REG_BX INDEX=XED_REG_DI -> FB MOD=1 value=0x1
4360 */
4361 xed_uint_t okay=1;
4362 return 1;
4363 (void) okay;
4364 (void) xes;
4365 }
xed_encode_nonterminal_NELEM_GPR_WRITER_LDOP_Q_EMIT(xed_encoder_request_t * xes)4366 xed_uint_t xed_encode_nonterminal_NELEM_GPR_WRITER_LDOP_Q_EMIT(xed_encoder_request_t* xes)
4367 {
4368 /* NELEM_GPR_WRITER_LDOP_Q()::
4369 */
4370 xed_uint_t okay=1;
4371 return 1;
4372 (void) okay;
4373 (void) xes;
4374 }
xed_encode_nonterminal_BND_B_CHECK_EMIT(xed_encoder_request_t * xes)4375 xed_uint_t xed_encode_nonterminal_BND_B_CHECK_EMIT(xed_encoder_request_t* xes)
4376 {
4377 /* BND_B_CHECK()::
4378 REXB=0 RM=0x0 -> nothing
4379 REXB=0 RM=0x1 -> nothing
4380 REXB=0 RM=0x2 -> nothing
4381 REXB=0 RM=0x3 -> nothing
4382 REXB=0 RM=0x4 -> FB ERROR=XED_ERROR_GENERAL_ERROR
4383 REXB=0 RM=0x5 -> FB ERROR=XED_ERROR_GENERAL_ERROR
4384 REXB=0 RM=0x6 -> FB ERROR=XED_ERROR_GENERAL_ERROR
4385 REXB=0 RM=0x7 -> FB ERROR=XED_ERROR_GENERAL_ERROR
4386 REXB=1 RM=0x0 -> FB ERROR=XED_ERROR_GENERAL_ERROR
4387 REXB=1 RM=0x1 -> FB ERROR=XED_ERROR_GENERAL_ERROR
4388 REXB=1 RM=0x2 -> FB ERROR=XED_ERROR_GENERAL_ERROR
4389 REXB=1 RM=0x3 -> FB ERROR=XED_ERROR_GENERAL_ERROR
4390 REXB=1 RM=0x4 -> FB ERROR=XED_ERROR_GENERAL_ERROR
4391 REXB=1 RM=0x5 -> FB ERROR=XED_ERROR_GENERAL_ERROR
4392 REXB=1 RM=0x6 -> FB ERROR=XED_ERROR_GENERAL_ERROR
4393 REXB=1 RM=0x7 -> FB ERROR=XED_ERROR_GENERAL_ERROR
4394 */
4395 xed_uint_t okay=1;
4396 return 1;
4397 (void) okay;
4398 (void) xes;
4399 }
4400