1 /* $OpenBSD: if_xl_cardbus.c,v 1.35 2024/05/24 06:26:47 jsg Exp $ */
2 /* $NetBSD: if_xl_cardbus.c,v 1.13 2000/03/07 00:32:52 mycroft Exp $ */
3
4 /*
5 * CardBus specific routines for 3Com 3C575-family CardBus ethernet adapter
6 *
7 * Copyright (c) 1998 and 1999
8 * HAYAKAWA Koichi. All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY HAYAKAWA KOICHI ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL TAKESHI OHASHI OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 *
31 *
32 */
33
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/device.h>
37
38 #include <net/if.h>
39 #include <net/if_media.h>
40
41 #include <netinet/in.h>
42 #include <netinet/if_ether.h>
43
44 #include <machine/cpu.h>
45 #include <machine/bus.h>
46
47 #include <dev/cardbus/cardbusvar.h>
48 #include <dev/pci/pcidevs.h>
49
50 #include <dev/mii/miivar.h>
51
52 #include <dev/ic/xlreg.h>
53
54 #if defined XL_DEBUG
55 #define DPRINTF(a) printf a
56 #else
57 #define DPRINTF(a)
58 #endif
59
60 #define CARDBUS_3C575BTX_FUNCSTAT_PCIREG CARDBUS_BASE2_REG /* means 0x18 */
61
62 int xl_cardbus_match(struct device *, void *, void *);
63 void xl_cardbus_attach(struct device *, struct device *,void *);
64 int xl_cardbus_detach(struct device *, int);
65 void xl_cardbus_intr_ack(struct xl_softc *);
66
67 #define XL_CARDBUS_BOOMERANG 0x0001
68 #define XL_CARDBUS_CYCLONE 0x0002
69
70 #define XL_CARDBUS_INTR 0x0004
71 #define XL_CARDBUS_INTR_ACK 0x8000
72
73 struct xl_cardbus_softc {
74 struct xl_softc sc_softc;
75
76 cardbus_devfunc_t sc_ct;
77 int sc_intrline;
78 u_int8_t sc_cardbus_flags;
79 u_int8_t sc_cardtype;
80
81 /* CardBus function status space. 575B requests it. */
82 bus_space_tag_t sc_funct;
83 bus_space_handle_t sc_funch;
84 bus_size_t sc_funcsize;
85
86 bus_size_t sc_mapsize; /* size of mapped bus space region */
87 };
88
89 const struct cfattach xl_cardbus_ca = {
90 sizeof(struct xl_cardbus_softc), xl_cardbus_match,
91 xl_cardbus_attach, xl_cardbus_detach
92 };
93
94 const struct xl_cardbus_product {
95 u_int32_t ecp_prodid; /* CardBus product ID */
96 int ecp_flags; /* initial softc flags */
97 pcireg_t ecp_csr; /* PCI CSR flags */
98 int ecp_cardtype; /* card type */
99 } xl_cardbus_products[] = {
100 { PCI_PRODUCT_3COM_3C575,
101 XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_8BITROM,
102 PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE,
103 XL_CARDBUS_BOOMERANG },
104
105 { PCI_PRODUCT_3COM_3CCFE575BT,
106 XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_8BITROM |
107 XL_FLAG_INVERT_LED_PWR,
108 PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
109 PCI_COMMAND_MASTER_ENABLE,
110 XL_CARDBUS_CYCLONE },
111
112 { PCI_PRODUCT_3COM_3CCFE575CT,
113 XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_8BITROM |
114 XL_FLAG_INVERT_MII_PWR,
115 PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
116 PCI_COMMAND_MASTER_ENABLE,
117 XL_CARDBUS_CYCLONE },
118
119 { PCI_PRODUCT_3COM_3CCFEM656,
120 XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_8BITROM |
121 XL_FLAG_INVERT_LED_PWR | XL_FLAG_INVERT_MII_PWR,
122 PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
123 PCI_COMMAND_MASTER_ENABLE,
124 XL_CARDBUS_CYCLONE },
125
126 { PCI_PRODUCT_3COM_3CCFEM656B,
127 XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_8BITROM |
128 XL_FLAG_INVERT_LED_PWR | XL_FLAG_INVERT_MII_PWR,
129 PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
130 PCI_COMMAND_MASTER_ENABLE,
131 XL_CARDBUS_CYCLONE },
132
133 { PCI_PRODUCT_3COM_3CCFEM656C,
134 XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_8BITROM |
135 XL_FLAG_INVERT_MII_PWR,
136 PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
137 PCI_COMMAND_MASTER_ENABLE,
138 XL_CARDBUS_CYCLONE },
139
140 { 0,
141 0,
142 0,
143 0 },
144 };
145
146 const struct xl_cardbus_product *xl_cardbus_lookup(const struct cardbus_attach_args *);
147
148 const struct xl_cardbus_product *
xl_cardbus_lookup(const struct cardbus_attach_args * ca)149 xl_cardbus_lookup(const struct cardbus_attach_args *ca)
150 {
151 const struct xl_cardbus_product *ecp;
152
153 if (PCI_VENDOR(ca->ca_id) != PCI_VENDOR_3COM)
154 return (NULL);
155
156 for (ecp = xl_cardbus_products; ecp->ecp_prodid != 0; ecp++)
157 if (PCI_PRODUCT(ca->ca_id) == ecp->ecp_prodid)
158 return (ecp);
159 return (NULL);
160 }
161
162 int
xl_cardbus_match(struct device * parent,void * match,void * aux)163 xl_cardbus_match(struct device *parent, void *match, void *aux)
164 {
165 struct cardbus_attach_args *ca = aux;
166
167 if (xl_cardbus_lookup(ca) != NULL)
168 return (1);
169
170 return (0);
171 }
172
173 void
xl_cardbus_attach(struct device * parent,struct device * self,void * aux)174 xl_cardbus_attach(struct device *parent, struct device *self, void *aux)
175 {
176 struct xl_cardbus_softc *csc = (void *)self;
177 struct xl_softc *sc = &csc->sc_softc;
178 struct cardbus_attach_args *ca = aux;
179 cardbus_devfunc_t ct = ca->ca_ct;
180 cardbus_chipset_tag_t cc = ct->ct_cc;
181 cardbus_function_tag_t cf = ct->ct_cf;
182 pcireg_t command, bhlc;
183 const struct xl_cardbus_product *ecp;
184 bus_space_handle_t ioh;
185 bus_addr_t adr;
186
187 if (Cardbus_mapreg_map(ct, CARDBUS_BASE0_REG, PCI_MAPREG_TYPE_IO, 0,
188 &sc->xl_btag, &ioh, &adr, &csc->sc_mapsize)) {
189 printf(": can't map i/o space\n");
190 return;
191 }
192
193 ecp = xl_cardbus_lookup(ca);
194 if (ecp == NULL) {
195 printf("\n");
196 panic("xl_cardbus_attach: impossible");
197 }
198
199 sc->xl_flags = ecp->ecp_flags;
200 sc->sc_dmat = ca->ca_dmat;
201
202 sc->xl_bhandle = ioh;
203
204 (ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_IO_ENABLE);
205
206 command = pci_conf_read(ca->ca_pc, ca->ca_tag,
207 PCI_COMMAND_STATUS_REG);
208 command |= ecp->ecp_csr;
209 csc->sc_cardtype = ecp->ecp_cardtype;
210
211 if (csc->sc_cardtype == XL_CARDBUS_CYCLONE) {
212 /* map CardBus function status window */
213 if (Cardbus_mapreg_map(ct, CARDBUS_BASE2_REG,
214 PCI_MAPREG_TYPE_MEM, 0, &csc->sc_funct,
215 &csc->sc_funch, 0, &csc->sc_funcsize)) {
216 printf("%s: unable to map function status window\n",
217 self->dv_xname);
218 return;
219 }
220
221 /*
222 * Make sure CardBus bridge can access memory space. Usually
223 * memory access is enabled by BIOS, but some BIOSes do not
224 * enable it.
225 */
226 (ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_MEM_ENABLE);
227 }
228
229 (ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
230 pci_conf_write(ca->ca_pc, ca->ca_tag, PCI_COMMAND_STATUS_REG,
231 command);
232
233 /*
234 * set latency timer
235 */
236 bhlc = pci_conf_read(ca->ca_pc, ca->ca_tag, PCI_BHLC_REG);
237 if (PCI_LATTIMER(bhlc) < 0x20) {
238 /* at least the value of latency timer should 0x20. */
239 DPRINTF(("if_xl_cardbus: lattimer 0x%x -> 0x20\n",
240 PCI_LATTIMER(bhlc)));
241 bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
242 bhlc |= (0x20 << PCI_LATTIMER_SHIFT);
243 pci_conf_write(ca->ca_pc, ca->ca_tag, PCI_BHLC_REG, bhlc);
244 }
245
246 csc->sc_ct = ca->ca_ct;
247 csc->sc_intrline = ca->ca_intrline;
248
249 /* Map and establish the interrupt. */
250
251 sc->xl_intrhand = cardbus_intr_establish(cc, cf, ca->ca_intrline,
252 IPL_NET, xl_intr, csc, self->dv_xname);
253
254 if (sc->xl_intrhand == NULL) {
255 printf(": couldn't establish interrupt");
256 printf(" at %d", ca->ca_intrline);
257 printf("\n");
258 return;
259 }
260 printf(": irq %d", ca->ca_intrline);
261
262 sc->intr_ack = xl_cardbus_intr_ack;
263
264 xl_attach(sc);
265
266 if (csc->sc_cardtype == XL_CARDBUS_CYCLONE)
267 bus_space_write_4(csc->sc_funct, csc->sc_funch,
268 XL_CARDBUS_INTR, XL_CARDBUS_INTR_ACK);
269
270 }
271
272 int
xl_cardbus_detach(struct device * self,int arg)273 xl_cardbus_detach(struct device *self, int arg)
274 {
275 struct xl_cardbus_softc *csc = (void *)self;
276 struct xl_softc *sc = &csc->sc_softc;
277 struct cardbus_devfunc *ct = csc->sc_ct;
278
279 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf,
280 sc->xl_intrhand);
281 xl_detach(sc);
282 if (csc->sc_cardtype == XL_CARDBUS_CYCLONE)
283 Cardbus_mapreg_unmap(ct, CARDBUS_BASE2_REG,
284 csc->sc_funct, csc->sc_funch, csc->sc_funcsize);
285 Cardbus_mapreg_unmap(ct, CARDBUS_BASE0_REG, sc->xl_btag,
286 sc->xl_bhandle, csc->sc_mapsize);
287 return (0);
288 }
289
290 void
xl_cardbus_intr_ack(struct xl_softc * sc)291 xl_cardbus_intr_ack(struct xl_softc *sc)
292 {
293 struct xl_cardbus_softc *csc = (struct xl_cardbus_softc *)sc;
294
295 bus_space_write_4(csc->sc_funct, csc->sc_funch, XL_CARDBUS_INTR,
296 XL_CARDBUS_INTR_ACK);
297 }
298