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/qemu/include/hw/ppc/
H A Dspapr_ovec.h417ece33 Tue Oct 25 04:47:30 GMT 2016 Michael Roth <mdroth@linux.vnet.ibm.com> spapr: improve ibm,architecture-vec-5 property handling

ibm,architecture-vec-5 is supposed to encode all option vector 5 bits
negotiated between platform/guest. Currently we hardcode this property
in the boot-time device tree to advertise a single negotiated
capability, "Form 1" NUMA Affinity, regardless of whether or not CAS
has been invoked or that capability has actually been negotiated.

Improve this by generating ibm,architecture-vec-5 based on the full
set of option vector 5 capabilities negotiated via CAS.

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
/qemu/hw/ppc/
H A Dspapr.c417ece33 Tue Oct 25 04:47:30 GMT 2016 Michael Roth <mdroth@linux.vnet.ibm.com> spapr: improve ibm,architecture-vec-5 property handling

ibm,architecture-vec-5 is supposed to encode all option vector 5 bits
negotiated between platform/guest. Currently we hardcode this property
in the boot-time device tree to advertise a single negotiated
capability, "Form 1" NUMA Affinity, regardless of whether or not CAS
has been invoked or that capability has actually been negotiated.

Improve this by generating ibm,architecture-vec-5 based on the full
set of option vector 5 capabilities negotiated via CAS.

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>