Searched hist:"6 c5276c8" (Results 1 – 3 of 3) sorted by relevance
| /freebsd/sys/dev/mpt/ |
| H A D | mpt_user.c | 6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
|
| H A D | mpt.c | 6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
|
| H A D | mpt_cam.c | 6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
6c5276c8 Sun Mar 06 12:48:15 GMT 2011 Marius Strobl <marius@FreeBSD.org> - Allocate the DMA memory shared between the host and the controller as
coherent.
- Add some missing bus_dmamap_sync() calls. This includes putting such
calls before calling reply handlers instead of calling bus_dmamap_sync()
for the request queue from individual reply handlers as these handlers
generally read back updates by the controller.
Tested on amd64 and sparc64.
MFC after: 2 weeks
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