Searched hist:"7 a47bae5" (Results 1 – 3 of 3) sorted by relevance
| /qemu/target/mips/ |
| H A D | mips-defs.h | 7a47bae5 Wed Dec 16 11:29:00 GMT 2020 Philippe Mathieu-Daudé <f4bug@amsat.org> target/mips/mips-defs: Rename ISA_MIPS32R2 as ISA_MIPS_R2
The MIPS ISA release 2 is common to 32/64-bit CPUs.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210104221154.3127610-13-f4bug@amsat.org>
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| H A D | internal.h | 7a47bae5 Wed Dec 16 11:29:00 GMT 2020 Philippe Mathieu-Daudé <f4bug@amsat.org> target/mips/mips-defs: Rename ISA_MIPS32R2 as ISA_MIPS_R2
The MIPS ISA release 2 is common to 32/64-bit CPUs.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210104221154.3127610-13-f4bug@amsat.org>
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| /qemu/linux-user/mips/ |
| H A D | cpu_loop.c | 7a47bae5 Wed Dec 16 11:29:00 GMT 2020 Philippe Mathieu-Daudé <f4bug@amsat.org> target/mips/mips-defs: Rename ISA_MIPS32R2 as ISA_MIPS_R2
The MIPS ISA release 2 is common to 32/64-bit CPUs.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210104221154.3127610-13-f4bug@amsat.org>
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