| /freebsd/sys/arm/include/ |
| H A D | cpuinfo.h | 935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
|
| /freebsd/sys/arm/arm/ |
| H A D | cpuinfo.c | 935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
|
| H A D | mp_machdep.c | 935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
|
| H A D | cpufunc.c | 935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
935c21a1 Mon Oct 19 19:18:02 GMT 2015 Ian Lepore <ian@FreeBSD.org> Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
|