/freebsd/sys/x86/x86/ |
H A D | intr_machdep.c | dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435 dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435 dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435 dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435 dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435 dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435 dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435
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/freebsd/sys/amd64/include/ |
H A D | intr_machdep.h | dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435 dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435 dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435 dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435 dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435 dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435 dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435
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/freebsd/sys/i386/include/ |
H A D | intr_machdep.h | dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435 dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435 dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435 dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435 dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435 dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435 dc6a8280 Wed Aug 16 18:48:53 GMT 2017 Conrad Meyer <cem@FreeBSD.org> x86: Add dynamic interrupt rebalancing
Add an option to dynamically rebalance interrupts across cores (hw.intrbalance); off by default.
The goal is to minimize preemption. By placing interrupt sources on distinct CPUs, ithreads get preferentially scheduled on distinct CPUs. Overall preemption is reduced and latency is reduced. In our workflow it reduced "fighting" between two high-frequency interrupt sources. Reduced latency was proven by, e.g., SPEC2008.
Submitted by: jeff@ (earlier version) Reviewed by: kib@ Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D10435
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