| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonOptAddrMode.cpp | 93 bool processAddUses(NodeAddr<StmtNode *> AddSN, MachineInstr *AddMI,
95 bool updateAddUses(MachineInstr *AddMI, MachineInstr *UseMI);
348 MachineInstr *AddMI, in processAddUses() argument
351 unsigned AddDefR = AddMI->getOperand(0).getReg(); in processAddUses()
384 unsigned BaseReg = AddMI->getOperand(1).getReg(); in processAddUses()
385 if (!isSafeToExtLR(AddSN, AddMI, BaseReg, UNodeList)) in processAddUses()
401 Changed |= updateAddUses(AddMI, UseMI); in processAddUses()
405 Deleted.insert(AddMI); in processAddUses()
410 bool HexagonOptAddrMode::updateAddUses(MachineInstr *AddMI, in updateAddUses() argument
412 const MachineOperand ImmOp = AddMI->getOperand(2); in updateAddUses()
[all …]
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| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonOptAddrMode.cpp | 94 bool processAddUses(NodeAddr<StmtNode *> AddSN, MachineInstr *AddMI,
96 bool updateAddUses(MachineInstr *AddMI, MachineInstr *UseMI);
349 MachineInstr *AddMI, in processAddUses() argument
352 unsigned AddDefR = AddMI->getOperand(0).getReg(); in processAddUses()
385 unsigned BaseReg = AddMI->getOperand(1).getReg(); in processAddUses()
386 if (!isSafeToExtLR(AddSN, AddMI, BaseReg, UNodeList)) in processAddUses()
402 Changed |= updateAddUses(AddMI, UseMI); in processAddUses()
406 Deleted.insert(AddMI); in processAddUses()
411 bool HexagonOptAddrMode::updateAddUses(MachineInstr *AddMI, in updateAddUses() argument
413 const MachineOperand ImmOp = AddMI->getOperand(2); in updateAddUses()
[all …]
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/Hexagon/ |
| H A D | HexagonOptAddrMode.cpp | 94 bool processAddUses(NodeAddr<StmtNode *> AddSN, MachineInstr *AddMI,
96 bool updateAddUses(MachineInstr *AddMI, MachineInstr *UseMI);
349 MachineInstr *AddMI, in processAddUses() argument
352 unsigned AddDefR = AddMI->getOperand(0).getReg(); in processAddUses()
385 unsigned BaseReg = AddMI->getOperand(1).getReg(); in processAddUses()
386 if (!isSafeToExtLR(AddSN, AddMI, BaseReg, UNodeList)) in processAddUses()
402 Changed |= updateAddUses(AddMI, UseMI); in processAddUses()
406 Deleted.insert(AddMI); in processAddUses()
411 bool HexagonOptAddrMode::updateAddUses(MachineInstr *AddMI, in updateAddUses() argument
413 const MachineOperand ImmOp = AddMI->getOperand(2); in updateAddUses()
[all …]
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64CollectLOH.cpp | 402 const MachineInstr *AddMI = Info.MI0; in handleADRP() local
404 int OpIdx = mapRegToGPRIndex(AddMI->getOperand(0).getReg()); in handleADRP()
439 MachineInstr *AddMI = const_cast<MachineInstr *>(Info.MI1); in handleADRP() local
441 auto AddIt = MachineBasicBlock::iterator(AddMI); in handleADRP()
442 auto EndIt = AddMI->getParent()->end(); in handleADRP()
443 if (AddMI->getIterator() == EndIt || LdrMI != &*next_nodbg(AddIt, EndIt)) in handleADRP()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64CollectLOH.cpp | 402 const MachineInstr *AddMI = Info.MI0; in handleADRP() local
404 int OpIdx = mapRegToGPRIndex(AddMI->getOperand(0).getReg()); in handleADRP()
439 MachineInstr *AddMI = const_cast<MachineInstr *>(Info.MI1); in handleADRP() local
441 auto AddIt = MachineBasicBlock::iterator(AddMI); in handleADRP()
442 auto EndIt = AddMI->getParent()->end(); in handleADRP()
443 if (AddMI->getIterator() == EndIt || LdrMI != &*next_nodbg(AddIt, EndIt)) in handleADRP()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64CollectLOH.cpp | 402 const MachineInstr *AddMI = Info.MI0; in handleADRP() local
404 int OpIdx = mapRegToGPRIndex(AddMI->getOperand(0).getReg()); in handleADRP()
439 MachineInstr *AddMI = const_cast<MachineInstr *>(Info.MI1); in handleADRP() local
441 auto AddIt = MachineBasicBlock::iterator(AddMI); in handleADRP()
442 auto EndIt = AddMI->getParent()->end(); in handleADRP()
443 if (AddMI->getIterator() == EndIt || LdrMI != &*next_nodbg(AddIt, EndIt)) in handleADRP()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AArch64/ |
| H A D | AArch64CollectLOH.cpp | 402 const MachineInstr *AddMI = Info.MI0; in handleADRP() local
404 int OpIdx = mapRegToGPRIndex(AddMI->getOperand(0).getReg()); in handleADRP()
439 MachineInstr *AddMI = const_cast<MachineInstr *>(Info.MI1); in handleADRP() local
441 auto AddIt = MachineBasicBlock::iterator(AddMI); in handleADRP()
442 auto EndIt = AddMI->getParent()->end(); in handleADRP()
443 if (AddMI->getIterator() == EndIt || LdrMI != &*next_nodbg(AddIt, EndIt)) in handleADRP()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64CollectLOH.cpp | 402 const MachineInstr *AddMI = Info.MI0; in handleADRP() local
404 int OpIdx = mapRegToGPRIndex(AddMI->getOperand(0).getReg()); in handleADRP()
439 MachineInstr *AddMI = const_cast<MachineInstr *>(Info.MI1); in handleADRP() local
441 auto AddIt = MachineBasicBlock::iterator(AddMI); in handleADRP()
442 auto EndIt = AddMI->getParent()->end(); in handleADRP()
443 if (AddMI->getIterator() == EndIt || LdrMI != &*next_nodbg(AddIt, EndIt)) in handleADRP()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64CollectLOH.cpp | 402 const MachineInstr *AddMI = Info.MI0; in handleADRP() local
404 int OpIdx = mapRegToGPRIndex(AddMI->getOperand(0).getReg()); in handleADRP()
439 MachineInstr *AddMI = const_cast<MachineInstr *>(Info.MI1); in handleADRP() local
441 auto AddIt = MachineBasicBlock::iterator(AddMI); in handleADRP()
442 auto EndIt = AddMI->getParent()->end(); in handleADRP()
443 if (AddMI->getIterator() == EndIt || LdrMI != &*next_nodbg(AddIt, EndIt)) in handleADRP()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 375 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument
383 Register reg = AddMI->getOperand(0).getReg(); in combineRestoreADD()
391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
396 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 375 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument
383 Register reg = AddMI->getOperand(0).getReg(); in combineRestoreADD()
391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
396 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 375 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument
383 Register reg = AddMI->getOperand(0).getReg(); in combineRestoreADD()
391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
396 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 375 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument
383 Register reg = AddMI->getOperand(0).getReg(); in combineRestoreADD()
391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
396 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 375 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument
383 Register reg = AddMI->getOperand(0).getReg(); in combineRestoreADD()
391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
396 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 375 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument
383 Register reg = AddMI->getOperand(0).getReg(); in combineRestoreADD()
391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
396 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 375 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument
383 Register reg = AddMI->getOperand(0).getReg(); in combineRestoreADD()
391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
396 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 375 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument
383 Register reg = AddMI->getOperand(0).getReg(); in combineRestoreADD()
391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
396 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 375 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument
383 Register reg = AddMI->getOperand(0).getReg(); in combineRestoreADD()
391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
396 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 375 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument
383 Register reg = AddMI->getOperand(0).getReg(); in combineRestoreADD()
391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
396 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 375 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument
383 Register reg = AddMI->getOperand(0).getReg(); in combineRestoreADD()
391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
396 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 375 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument
383 Register reg = AddMI->getOperand(0).getReg(); in combineRestoreADD()
391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
396 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 375 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument
383 Register reg = AddMI->getOperand(0).getReg(); in combineRestoreADD()
391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
396 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 375 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument
383 unsigned reg = AddMI->getOperand(0).getReg(); in combineRestoreADD()
391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
396 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 376 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument
384 unsigned reg = AddMI->getOperand(0).getReg(); in combineRestoreADD()
392 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
397 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 376 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument
384 unsigned reg = AddMI->getOperand(0).getReg(); in combineRestoreADD()
392 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
397 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
|