| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/edk2/EmbeddedPkg/Drivers/Lan9118Dxe/ |
| H A D | Lan9118DxeHw.h | 130 #define RXSTATUS_RXW_TO BIT4 // Incomming frame larger t…
160 #define IRQCFG_IRQ_POL BIT4 // IRQ Polarity
170 #define INSTS_RSFF BIT4 // Rx Status FIFO full
227 #define PHYSTS_REMOTE_FAULT BIT4 // Remote fault detected
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/ARM/VExpressPkg/Drivers/Lan9118Dxe/ |
| H A D | Lan9118DxeHw.h | 137 #define RXSTATUS_RXW_TO BIT4 // Incoming frame larger th…
167 #define IRQCFG_IRQ_POL BIT4 // IRQ Polarity
177 #define INSTS_RSFF BIT4 // Rx Status FIFO full
234 #define PHYSTS_REMOTE_FAULT BIT4 // Remote fault detected
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| /dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/ |
| H A D | PchRegsSpi.h | 50 #define B_PCH_SPI_HSFS_BERASE_MASK (BIT4 | BIT3) // Block / Sector Erase Size
81 #define B_PCH_SPI_OPTYPE2_MASK (BIT5 | BIT4) // Opcode Type 2 Mask
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| H A D | PchRegsSmbus.h | 60 #define B_PCH_SMBUS_PCICMD_PMWE BIT4 // Postable Memory Write Enable - reserved as '0'
81 #define B_PCH_SMBUS_FAIL BIT4 // Failed
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/ |
| H A D | PchRegsSpi.h | 44 #define B_PCH_SPI_HSFS_BERASE_MASK (BIT4 | BIT3) // Block / Sector Erase Size
75 #define B_PCH_SPI_OPTYPE2_MASK (BIT5 | BIT4) // Opcode Type 2 Mask
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| H A D | PchRegsSmbus.h | 54 #define B_PCH_SMBUS_PCICMD_PMWE BIT4 // Postable Memory Write Enable - reserved as '0'
75 #define B_PCH_SMBUS_FAIL BIT4 // Failed
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Register/ |
| H A D | PchRegsTraceHub.h | 103 #define B_TRACE_HUB_MEM_MTB_MSCNMODE (BIT5 | BIT4)
113 #define B_TRACE_HUB_MEM_MTB_SCR2_FSEOFF4 BIT4
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| H A D | PchRegsSpi.h | 82 #define B_SPI_CFG_BC_TSS BIT4
124 #define B_SPI_MEM_HSFSC_SAF_DLE BIT4 ///< SAF Data length error
203 #define B_SPI_MEM_SFDPX_VSCCX_WEWS BIT4 ///< Write Enable on Writ…
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/ |
| H A D | Bcm2836SdHost.h | 59 #define SDHOST_HSTS_CRC7_ERROR BIT4
73 #define SDHOST_HCFG_DATA_IRPT_EN BIT4
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Register/ |
| H A D | PchRegsSpi.h | 72 #define B_PCH_SPI_BC_TSS BIT4
113 #define B_PCH_SPI_HSFSC_SAF_DLE BIT4 ///< SAF Data length error
192 #define B_PCH_SPI_SFDPX_VSCCX_WEWS BIT4 ///< Write Enable on Writ…
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| H A D | PchRegsTraceHub.h | 96 #define B_PCH_TRACE_HUB_MTB_MSCNMODE (BIT5 | BIT4)
106 #define B_PCH_TRACE_HUB_MTB_SCR2_FSEOFF4 BIT4
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/SimicsIch10Pkg/Include/Register/ |
| H A D | PchRegsSpi.h | 73 #define B_PCH_SPI_BC_TSS BIT4
114 #define B_PCH_SPI_HSFSC_SAF_DLE BIT4 ///< SAF Data length error
193 #define B_PCH_SPI_SFDPX_VSCCX_WEWS BIT4 ///< Write Enable on Writ…
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/TigerlakeSiliconPkg/Include/Register/ |
| H A D | PmcRegs.h | 105 #define B_ACPI_IO_SMI_STS_ON_SLP_EN BIT4
221 #define B_PMC_PWRM_GEN_PMCON_B_SMI_LOCK BIT4
244 #define B_PMC_PWRM_GPIO_CFG_GPE0_DW1 (BIT7 | BIT6 | BIT5 | BIT4)
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| /dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/IncludePrivate/Register/ |
| H A D | SpiRegs.h | 59 #define B_SPI_CFG_BC_TSS BIT4
90 #define B_SPI_MEM_HSFSC_SAF_DLE BIT4 ///< SAF Data length error
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| /dports/games/libretro-mame2003/mame2003-libretro-4358db4/src/machine/ |
| H A D | decocass_machine.c | 1019 (BIT4(save) << 4) | in READ_HANDLER()
1033 (BIT4(save) << 4) | in READ_HANDLER()
1047 (BIT4(save) << 4) | in READ_HANDLER()
1059 (BIT4(save) << 2) | in READ_HANDLER()
1075 (BIT4(save) << 4) | in READ_HANDLER()
1089 (BIT4(save) << 3) | in READ_HANDLER()
1102 (BIT4(save) << 3) | in READ_HANDLER()
1117 (BIT4(save) << 4) | in READ_HANDLER()
1131 (BIT4(save) << 4) | in READ_HANDLER()
1144 (BIT4(save) << 4) | in READ_HANDLER()
[all …]
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| /dports/emulators/qemu60/qemu-6.0.0/roms/edk2/SecurityPkg/Include/Library/ |
| H A D | TpmCommLib.h | 137 #define TIS_PC_ACC_SEIZED BIT4
169 #define TIS_PC_STS_DATA BIT4
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/edk2/SecurityPkg/Include/Library/ |
| H A D | TpmCommLib.h | 137 #define TIS_PC_ACC_SEIZED BIT4
169 #define TIS_PC_STS_DATA BIT4
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| /dports/emulators/qemu5/qemu-5.2.0/roms/edk2/SecurityPkg/Include/Library/ |
| H A D | TpmCommLib.h | 137 #define TIS_PC_ACC_SEIZED BIT4
169 #define TIS_PC_STS_DATA BIT4
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| /dports/emulators/qemu42/qemu-4.2.1/roms/edk2/SecurityPkg/Include/Library/ |
| H A D | TpmCommLib.h | 137 #define TIS_PC_ACC_SEIZED BIT4
169 #define TIS_PC_STS_DATA BIT4
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| /dports/sysutils/uefi-edk2-bhyve/edk2-edk2-stable202102/SecurityPkg/Include/Library/ |
| H A D | TpmCommLib.h | 137 #define TIS_PC_ACC_SEIZED BIT4
169 #define TIS_PC_STS_DATA BIT4
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| /dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/SecurityPkg/Include/Library/ |
| H A D | TpmCommLib.h | 143 #define TIS_PC_ACC_SEIZED BIT4
175 #define TIS_PC_STS_DATA BIT4
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| /dports/sysutils/uefi-edk2-qemu/edk2-edk2-stable201911/SecurityPkg/Include/Library/ |
| H A D | TpmCommLib.h | 137 #define TIS_PC_ACC_SEIZED BIT4
169 #define TIS_PC_STS_DATA BIT4
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/edk2/SecurityPkg/Include/Library/ |
| H A D | TpmCommLib.h | 137 #define TIS_PC_ACC_SEIZED BIT4
169 #define TIS_PC_STS_DATA BIT4
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| /dports/emulators/qemu/qemu-6.2.0/roms/edk2/SecurityPkg/Include/Library/ |
| H A D | TpmCommLib.h | 137 #define TIS_PC_ACC_SEIZED BIT4
169 #define TIS_PC_STS_DATA BIT4
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| /dports/sysutils/edk2/edk2-edk2-stable202102/SecurityPkg/Include/Library/ |
| H A D | TpmCommLib.h | 137 #define TIS_PC_ACC_SEIZED BIT4
169 #define TIS_PC_STS_DATA BIT4
|