| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf537/ |
| H A D | ADSP-EDN-BF534-extended_def.h | 155 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register… macro
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| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf506/ |
| H A D | BF504_def.h | 157 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register… macro
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| /dports/devel/arm-none-eabi-newlib/newlib-2.4.0/libgloss/bfin/include/ |
| H A D | defBF59x_base.h | 237 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register */ macro
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| H A D | cdefBF59x_base.h | 254 #define pDMA0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA0_NEXT_DESC_PTR)
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| H A D | cdefBF51x_base.h | 275 #define pDMA0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA0_NEXT_DESC_PTR)
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| H A D | cdefBF52x_base.h | 270 #define pDMA0_NEXT_DESC_PTR (_PTR_TO_VOL_VOID_PTR DMA0_NEXT_DESC_PTR)
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| H A D | defBF532.h | 218 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register */ macro
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| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf538/ |
| H A D | BF538_def.h | 246 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 macro
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/ |
| H A D | ADSP-EDN-BF547-extended_def.h | 35 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register… macro
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| H A D | ADSP-EDN-BF542-extended_def.h | 35 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register… macro
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/ |
| H A D | ADSP-EDN-BF547-extended_def.h | 35 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register… macro
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| H A D | ADSP-EDN-BF542-extended_def.h | 35 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register… macro
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/ |
| H A D | ADSP-EDN-BF547-extended_def.h | 35 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register… macro
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| H A D | ADSP-EDN-BF542-extended_def.h | 35 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register… macro
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| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/ |
| H A D | ADSP-EDN-BF547-extended_def.h | 35 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register… macro
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| H A D | ADSP-EDN-BF542-extended_def.h | 35 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register… macro
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/ |
| H A D | ADSP-EDN-BF547-extended_def.h | 35 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register… macro
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| H A D | ADSP-EDN-BF542-extended_def.h | 35 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register… macro
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| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/ |
| H A D | ADSP-EDN-BF547-extended_def.h | 35 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register… macro
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| H A D | ADSP-EDN-BF542-extended_def.h | 35 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register… macro
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| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf548/ |
| H A D | ADSP-EDN-BF547-extended_def.h | 35 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register… macro
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| H A D | ADSP-EDN-BF542-extended_def.h | 35 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register… macro
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| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/ |
| H A D | ADSP-EDN-BF547-extended_def.h | 35 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register… macro
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| H A D | ADSP-EDN-BF542-extended_def.h | 35 #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register… macro
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
| H A D | ADSP-EDN-BF52x-extended_cdef.h | 445 #define pDMA0_NEXT_DESC_PTR ((void * volatile *)DMA0_NEXT_DESC_PTR) /* DMA Channel 0 Nex…
446 #define bfin_read_DMA0_NEXT_DESC_PTR() bfin_readPTR(DMA0_NEXT_DESC_PTR)
447 #define bfin_write_DMA0_NEXT_DESC_PTR(val) bfin_writePTR(DMA0_NEXT_DESC_PTR, val)
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