| /dports/math/openblas/TIMING/ |
| H A D | dtime.in | 16 DPP T T T
|
| H A D | DTIME.in | 17 DPP T T T
|
| /dports/emulators/qemu5/qemu-5.2.0/include/hw/ssi/ |
| H A D | xilinx_spips.h | 53 DPP = 0xa2, enumerator
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/include/hw/ssi/ |
| H A D | xilinx_spips.h | 53 DPP = 0xa2, enumerator
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SIDefines.h | 42 DPP = 1 << 15, enumerator
237 DPP = 4 enumerator
641 namespace DPP {
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SIDefines.h | 42 DPP = 1 << 15, enumerator
237 DPP = 4 enumerator
641 namespace DPP {
|
| /dports/math/openblas/large/ |
| H A D | DTIME.in | 17 DPP T T T
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SIDefines.h | 42 DPP = 1 << 15, enumerator
250 DPP = 4 enumerator
672 namespace DPP {
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIDefines.h | 42 DPP = 1 << 15, enumerator
250 DPP = 4 enumerator
672 namespace DPP {
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIDefines.h | 42 DPP = 1 << 15, enumerator
250 DPP = 4 enumerator
672 namespace DPP {
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AMDGPU/ |
| H A D | SIDefines.h | 49 DPP = 1 << 15, enumerator
260 DPP = 4 enumerator
682 namespace DPP {
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SIDefines.h | 42 DPP = 1 << 15, enumerator
250 DPP = 4 enumerator
672 namespace DPP {
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SIDefines.h | 42 DPP = 1 << 15,
250 DPP = 4
672 namespace DPP {
|
| /dports/emulators/qemu42/qemu-4.2.1/include/hw/ssi/ |
| H A D | xilinx_spips.h | 52 DPP = 0xa2, enumerator
|
| /dports/emulators/qemu-utils/qemu-4.2.1/include/hw/ssi/ |
| H A D | xilinx_spips.h | 52 DPP = 0xa2, enumerator
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/include/hw/ssi/ |
| H A D | xilinx_spips.h | 51 DPP = 0xa2, enumerator
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/include/hw/ssi/ |
| H A D | xilinx_spips.h | 52 DPP = 0xa2, enumerator
|
| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/include/hw/ssi/ |
| H A D | xilinx_spips.h | 52 DPP = 0xa2, enumerator
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AMDGPU/ |
| H A D | GCNHazardRecognizer.h | 66 int checkDPPHazards(MachineInstr *DPP);
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AMDGPU/ |
| H A D | GCNHazardRecognizer.h | 66 int checkDPPHazards(MachineInstr *DPP);
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/docs/ |
| H A D | AMDGPUInstructionSyntax.rst | 126 they may also be encoded in *VOP3*, *DPP* and *SDWA* formats.
136 *DPP* encoding _dpp
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/docs/ |
| H A D | AMDGPUInstructionSyntax.rst | 126 they may also be encoded in *VOP3*, *DPP* and *SDWA* formats.
136 *DPP* encoding _dpp
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/docs/ |
| H A D | AMDGPUInstructionSyntax.rst | 126 they may also be encoded in *VOP3*, *DPP* and *SDWA* formats.
136 *DPP* encoding _dpp
|
| /dports/devel/llvm10/llvm-10.0.1.src/docs/ |
| H A D | AMDGPUInstructionSyntax.rst | 126 they may also be encoded in *VOP3*, *DPP* and *SDWA* formats.
136 *DPP* encoding _dpp
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/docs/ |
| H A D | AMDGPUInstructionSyntax.rst | 126 they may also be encoded in *VOP3*, *DPP* and *SDWA* formats.
136 *DPP* encoding _dpp
|