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Searched refs:ECTRL2_MDSL_ECAP (Results 26 – 50 of 126) sorted by relevance

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/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-pcduino3/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-pine-h64/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0));
/dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-pinebook/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-pine64/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-orangepi-pc2/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-orangepi-plus-2e/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-orangepi-pc/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-orangepi-one/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-orangepi-pc-plus/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-bananapim2/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-tools/u-boot-2020.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/siemens/pxm2/
H A Dboard.c350 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()
/dports/sysutils/u-boot-rpi4/u-boot-2021.07/board/siemens/pxm2/
H A Dboard.c352 (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); in enable_pwm()

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