| /dports/sysutils/u-boot-rockpro64/u-boot-2021.07/board/samsung/trats/ |
| H A D | trats.c | 347 writel(EPLL_CON0_VAL, (unsigned int)&clk->epll_con0); in board_clock_init()
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| /dports/sysutils/u-boot-sifive-fu540/u-boot-2021.07/board/samsung/trats/ |
| H A D | trats.c | 347 writel(EPLL_CON0_VAL, (unsigned int)&clk->epll_con0); in board_clock_init()
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| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/board/samsung/trats/ |
| H A D | trats.c | 344 writel(EPLL_CON0_VAL, (unsigned int)&clk->epll_con0); in board_clock_init()
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| /dports/sysutils/u-boot-qemu-arm/u-boot-2021.07/board/samsung/trats/ |
| H A D | trats.c | 347 writel(EPLL_CON0_VAL, (unsigned int)&clk->epll_con0); in board_clock_init()
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| /dports/sysutils/u-boot-rpi/u-boot-2021.07/board/samsung/trats/ |
| H A D | trats.c | 347 writel(EPLL_CON0_VAL, (unsigned int)&clk->epll_con0); in board_clock_init()
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| /dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/board/samsung/trats/ |
| H A D | trats.c | 347 writel(EPLL_CON0_VAL, (unsigned int)&clk->epll_con0); in board_clock_init()
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| /dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/board/samsung/trats/ |
| H A D | trats.c | 347 writel(EPLL_CON0_VAL, (unsigned int)&clk->epll_con0); in board_clock_init()
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| /dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/board/samsung/trats/ |
| H A D | trats.c | 347 writel(EPLL_CON0_VAL, (unsigned int)&clk->epll_con0); in board_clock_init()
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| /dports/sysutils/u-boot-riotboard/u-boot-2021.07/board/samsung/trats/ |
| H A D | trats.c | 347 writel(EPLL_CON0_VAL, (unsigned int)&clk->epll_con0); in board_clock_init()
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| /dports/sysutils/u-boot-rpi2/u-boot-2021.07/board/samsung/trats/ |
| H A D | trats.c | 347 writel(EPLL_CON0_VAL, (unsigned int)&clk->epll_con0); in board_clock_init()
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| /dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/board/samsung/trats/ |
| H A D | trats.c | 347 writel(EPLL_CON0_VAL, (unsigned int)&clk->epll_con0); in board_clock_init()
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| /dports/sysutils/u-boot-rpi3/u-boot-2021.07/board/samsung/trats/ |
| H A D | trats.c | 347 writel(EPLL_CON0_VAL, (unsigned int)&clk->epll_con0); in board_clock_init()
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| /dports/sysutils/u-boot-rock64/u-boot-2021.07/board/samsung/trats/ |
| H A D | trats.c | 347 writel(EPLL_CON0_VAL, (unsigned int)&clk->epll_con0); in board_clock_init()
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/samsung/trats/ |
| H A D | setup.h | 260 #define EPLL_CON0_VAL SET_PLL(EPLL_MDIV, EPLL_PDIV, EPLL_SDIV) macro
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/samsung/trats/ |
| H A D | setup.h | 260 #define EPLL_CON0_VAL SET_PLL(EPLL_MDIV, EPLL_PDIV, EPLL_SDIV) macro
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| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/board/samsung/trats/ |
| H A D | setup.h | 260 #define EPLL_CON0_VAL SET_PLL(EPLL_MDIV, EPLL_PDIV, EPLL_SDIV) macro
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| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/board/samsung/trats/ |
| H A D | setup.h | 260 #define EPLL_CON0_VAL SET_PLL(EPLL_MDIV, EPLL_PDIV, EPLL_SDIV) macro
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| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/board/samsung/trats/ |
| H A D | setup.h | 260 #define EPLL_CON0_VAL SET_PLL(EPLL_MDIV, EPLL_PDIV, EPLL_SDIV) macro
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| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/board/samsung/trats/ |
| H A D | setup.h | 260 #define EPLL_CON0_VAL SET_PLL(EPLL_MDIV, EPLL_PDIV, EPLL_SDIV) macro
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| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/board/samsung/trats/ |
| H A D | setup.h | 260 #define EPLL_CON0_VAL SET_PLL(EPLL_MDIV, EPLL_PDIV, EPLL_SDIV) macro
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| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/board/samsung/trats/ |
| H A D | setup.h | 260 #define EPLL_CON0_VAL SET_PLL(EPLL_MDIV, EPLL_PDIV, EPLL_SDIV) macro
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| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/board/samsung/trats/ |
| H A D | setup.h | 260 #define EPLL_CON0_VAL SET_PLL(EPLL_MDIV, EPLL_PDIV, EPLL_SDIV) macro
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| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/board/samsung/trats/ |
| H A D | setup.h | 260 #define EPLL_CON0_VAL SET_PLL(EPLL_MDIV, EPLL_PDIV, EPLL_SDIV) macro
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| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/board/samsung/trats/ |
| H A D | setup.h | 260 #define EPLL_CON0_VAL SET_PLL(EPLL_MDIV, EPLL_PDIV, EPLL_SDIV) macro
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| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/board/samsung/trats/ |
| H A D | setup.h | 260 #define EPLL_CON0_VAL SET_PLL(EPLL_MDIV, EPLL_PDIV, EPLL_SDIV) macro
|