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Searched refs:FRS1 (Results 76 – 100 of 110) sorted by relevance

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/dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/riscv/insns/
H A Dfadd_q.h4 WRITE_FRD(f128_add(f128(FRS1), f128(FRS2)));
H A Dfcvt_l_d.h5 WRITE_RD(f64_to_i64(f64(FRS1), RM, true));
H A Dfcvt_w_d.h4 WRITE_RD(sext32(f64_to_i32(f64(FRS1), RM, true)));
H A Dfcvt_w_q.h4 WRITE_RD(sext32(f128_to_i32(f128(FRS1), RM, true)));
H A Dfcvt_w_s.h4 WRITE_RD(sext32(f32_to_i32(f32(FRS1), RM, true)));
H A Dfcvt_wu_q.h4 WRITE_RD(sext32(f128_to_ui32(f128(FRS1), RM, true)));
H A Dfdiv_d.h4 WRITE_FRD(f64_div(f64(FRS1), f64(FRS2)));
H A Dfcvt_lu_s.h5 WRITE_RD(f32_to_ui64(f32(FRS1), RM, true));
H A Dfadd_h.h4 WRITE_FRD(f16_add(f16(FRS1), f16(FRS2)));
H A Dfdiv_h.h4 WRITE_FRD(f16_div(f16(FRS1), f16(FRS2)));
H A Dfcvt_l_h.h5 WRITE_RD(f16_to_i64(f16(FRS1), RM, true));
H A Dfcvt_lu_h.h5 WRITE_RD(f16_to_ui64(f16(FRS1), RM, true));
H A Dfsub_h.h4 WRITE_FRD(f16_sub(f16(FRS1), f16(FRS2)));
H A Dfcvt_wu_h.h4 WRITE_RD(sext32(f16_to_ui32(f16(FRS1), RM, true)));
H A Dfcvt_w_h.h4 WRITE_RD(sext32(f16_to_i32(f16(FRS1), RM, true)));
H A Dfmul_h.h4 WRITE_FRD(f16_mul(f16(FRS1), f16(FRS2)));
H A Dfmadd_d.h4 WRITE_FRD(f64_mulAdd(f64(FRS1), f64(FRS2), f64(FRS3)));
H A Dfmadd_q.h4 WRITE_FRD(f128_mulAdd(f128(FRS1), f128(FRS2), f128(FRS3)));
H A Dfmadd_s.h4 WRITE_FRD(f32_mulAdd(f32(FRS1), f32(FRS2), f32(FRS3)));
H A Dfmsub_q.h4 WRITE_FRD(f128_mulAdd(f128(FRS1), f128(FRS2), f128_negate(f128(FRS3))));
H A Dfmadd_h.h4 WRITE_FRD(f16_mulAdd(f16(FRS1), f16(FRS2), f16(FRS3)));
H A Dfnmsub_q.h4 WRITE_FRD(f128_mulAdd(f128_negate(f128(FRS1)), f128(FRS2), f128(FRS3)));
H A Dfnmadd_q.h4 WRITE_FRD(f128_mulAdd(f128_negate(f128(FRS1)), f128(FRS2), f128_negate(f128(FRS3))));
H A Dfmsub_d.h4 WRITE_FRD(f64_mulAdd(f64(FRS1), f64(FRS2), f64(f64(FRS3).v ^ F64_SIGN)));
H A Dfnmsub_d.h4 WRITE_FRD(f64_mulAdd(f64(f64(FRS1).v ^ F64_SIGN), f64(FRS2), f64(FRS3)));

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