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Searched refs:ICR (Results 101 – 125 of 825) sorted by relevance

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/dports/biology/molden/molden5.8/plush/
H A DICR1 mol="ICR" Charge="0"
/dports/devel/anjuta/anjuta-3.34.0/plugins/parser-cxx/cxxparser/
H A Dflex-lexer-klass-tab.h104 #define ICR 311 macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32G4xx_HAL_Driver/inc/
H A Dstm32g4xx_hal_rcc_ex.h1149 … WRITE_REG(CRS->ICR, CRS_ICR_ERRC | ((__INTERRUPT__) & ~RCC_CRS_IT_ERROR_MASK)); \
1153 WRITE_REG(CRS->ICR, (__INTERRUPT__)); \
1193 … WRITE_REG(CRS->ICR, CRS_ICR_ERRC | ((__FLAG__) & ~RCC_CRS_FLAG_ERROR_MASK)); \
1197 WRITE_REG(CRS->ICR, (__FLAG__)); \
/dports/devel/asl/asl-current/include/coldfire/
H A Dmcf5407.inc106 ICR{Num} equ Base
107 AVEC cfbit ICR{Num},7 ; Autovector Enable
108 IL cffield ICR{Num},2,3 ; Interrupt Level
109 IP cffield ICR{Num},0,2 ; Interrupt Priority
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7750.h117 #define ICR 0xFFD00000 macro

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