/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 250 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const { in shouldCoalesce() argument 257 if (!HST.useHVXOps() || NewRC->getID() != Hexagon::HvxWRRegClass.getID()) in shouldCoalesce()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 250 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const { in shouldCoalesce() argument 257 if (!HST.useHVXOps() || NewRC->getID() != Hexagon::HvxWRRegClass.getID()) in shouldCoalesce()
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 243 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const { in shouldCoalesce() argument 250 if (!HST.useHVXOps() || NewRC->getID() != Hexagon::HvxWRRegClass.getID()) in shouldCoalesce()
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H A D | HexagonVLIWPacketizer.h | 136 bool isNewifiable(const MachineInstr &MI, const TargetRegisterClass *NewRC);
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 250 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const { in shouldCoalesce() argument 257 if (!HST.useHVXOps() || NewRC->getID() != Hexagon::HvxWRRegClass.getID()) in shouldCoalesce()
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 250 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const { in shouldCoalesce() argument 257 if (!HST.useHVXOps() || NewRC->getID() != Hexagon::HvxWRRegClass.getID()) in shouldCoalesce()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 243 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const { in shouldCoalesce() argument 250 if (!HST.useHVXOps() || NewRC->getID() != Hexagon::HvxWRRegClass.getID()) in shouldCoalesce()
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H A D | HexagonVLIWPacketizer.h | 136 bool isNewifiable(const MachineInstr &MI, const TargetRegisterClass *NewRC);
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 243 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const { in shouldCoalesce() argument 250 if (!HST.useHVXOps() || NewRC->getID() != Hexagon::HvxWRRegClass.getID()) in shouldCoalesce()
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H A D | HexagonVLIWPacketizer.h | 136 bool isNewifiable(const MachineInstr &MI, const TargetRegisterClass *NewRC);
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 250 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const { in shouldCoalesce() argument 257 if (!HST.useHVXOps() || NewRC->getID() != Hexagon::HvxWRRegClass.getID()) in shouldCoalesce()
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 238 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const { in shouldCoalesce() argument 245 if (!HST.useHVXOps() || NewRC->getID() != Hexagon::HvxWRRegClass.getID()) in shouldCoalesce()
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H A D | HexagonVLIWPacketizer.h | 137 bool isNewifiable(const MachineInstr &MI, const TargetRegisterClass *NewRC);
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/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 239 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const { in shouldCoalesce() argument 246 if (!HST.useHVXOps() || NewRC->getID() != Hexagon::HvxWRRegClass.getID()) in shouldCoalesce()
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H A D | HexagonVLIWPacketizer.h | 138 bool isNewifiable(const MachineInstr &MI, const TargetRegisterClass *NewRC);
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/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 250 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const { in shouldCoalesce() argument 257 if (!HST.useHVXOps() || NewRC->getID() != Hexagon::HvxWRRegClass.getID()) in shouldCoalesce()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.h | 136 unsigned DstSubReg, const TargetRegisterClass *NewRC,
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.h | 135 unsigned DstSubReg, const TargetRegisterClass *NewRC,
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.h | 135 unsigned DstSubReg, const TargetRegisterClass *NewRC,
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.h | 135 unsigned DstSubReg, const TargetRegisterClass *NewRC,
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.h | 135 unsigned DstSubReg, const TargetRegisterClass *NewRC,
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.h | 135 unsigned DstSubReg, const TargetRegisterClass *NewRC,
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.h | 135 unsigned DstSubReg, const TargetRegisterClass *NewRC,
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.h | 135 unsigned DstSubReg, const TargetRegisterClass *NewRC,
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.h | 135 unsigned DstSubReg, const TargetRegisterClass *NewRC,
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