Home
last modified time | relevance | path

Searched refs:QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT (Results 51 – 75 of 130) sorted by relevance

123456

/dports/sysutils/u-boot-rpi3-32/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dclk.c54 div = (val >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) in get_clocks()
/dports/sysutils/u-boot-rockpro64/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dclk.c54 div = (val >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) in get_clocks()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/mips/mach-ath79/qca953x/
H A Dclk.c52 div = (val >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) in get_clocks()
/dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dclk.c54 div = (val >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) in get_clocks()
/dports/sysutils/u-boot-qemu-arm/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dclk.c54 div = (val >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) in get_clocks()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dclk.c54 div = (val >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) in get_clocks()
/dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dclk.c54 div = (val >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) in get_clocks()
/dports/sysutils/u-boot-riotboard/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dclk.c54 div = (val >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) in get_clocks()
/dports/sysutils/u-boot-rpi2/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dclk.c54 div = (val >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) in get_clocks()
/dports/sysutils/u-boot-rpi3/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dclk.c54 div = (val >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) in get_clocks()
/dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dclk.c54 div = (val >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) in get_clocks()
/dports/sysutils/u-boot-rock64/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dclk.c54 div = (val >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) in get_clocks()
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/mips/ath79/
H A Dclock.c369 out_div = (pll >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & in qca953x_clocks_init()
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/mips/ath79/
H A Dclock.c369 out_div = (pll >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & in qca953x_clocks_init()
/dports/multimedia/libv4l/linux-5.13-rc2/arch/mips/ath79/
H A Dclock.c369 out_div = (pll >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & in qca953x_clocks_init()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h433 #define QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h433 #define QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h452 #define QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 macro
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h452 #define QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 macro
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h452 #define QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 macro
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h452 #define QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 macro
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h452 #define QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 macro
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h452 #define QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 macro
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h452 #define QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 macro
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/mips/mach-ath79/include/mach/
H A Dar71xx_regs.h452 #define QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 macro

123456