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Searched refs:SC_P_SCU_GPIO0_00 (Results 76 – 100 of 129) sorted by relevance

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/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-sopine/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-rpi/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-chip/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-orangepi-plus-2e/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-pine-h64/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-pcduino3/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-pine64/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h45 #define SC_P_SCU_GPIO0_00 36 /* SCU.GPIO0.IO00, SCU.UART0.RX, LSIO.GPIO0.IO2… macro
389 #define SC_P_SCU_GPIO0_00_SCU_GPIO0_IO00 SC_P_SCU_GPIO0_00 0
390 #define SC_P_SCU_GPIO0_00_SCU_UART0_RX SC_P_SCU_GPIO0_00 1
391 #define SC_P_SCU_GPIO0_00_LSIO_GPIO0_IO28 SC_P_SCU_GPIO0_00 3

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