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Searched refs:SDRAM_TIMING_LOW_TRTP_MASK (Results 101 – 124 of 124) sorted by relevance

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/dports/sysutils/u-boot-orangepi-pc2/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-orangepi-plus-2e/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-orangepi-pc/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-orangepi-one/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-orangepi-pc-plus/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-tools/u-boot-2020.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1707 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1718 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-bananapim2/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-rockpro64/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-rpi3-32/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-rpi4/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-sifive-fu540/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1699 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1710 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-qemu-arm/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-rpi2/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-riotboard/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-rpi3/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
/dports/sysutils/u-boot-rock64/u-boot-2021.07/drivers/ddr/marvell/a38x/
H A Dddr3_training.c1704 (((t_rtp - 1) & SDRAM_TIMING_LOW_TRTP_MASK) << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()
1715 (SDRAM_TIMING_LOW_TRTP_MASK << SDRAM_TIMING_LOW_TRTP_OFFS); in ddr3_tip_set_timing()

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