| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1109 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1166 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1168 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1173 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1290 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1327 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1360 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1428 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1109 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1166 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1168 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1173 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1290 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1327 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1360 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1428 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-pine64/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-pine-h64/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-pcduino3/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-pinebook/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
|
| /dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
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| /dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training_ip_engine.c | 1112 u32 bit_id, start_if, end_if, bit_end = 0; in ddr3_tip_ip_training_wrapper() local
1169 bit_end = BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training_wrapper()
1171 bit_end = 0; in ddr3_tip_ip_training_wrapper()
1176 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1293 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1330 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1363 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
1431 for (bit_id = 0; bit_id < bit_end; bit_id++) { in ddr3_tip_ip_training_wrapper()
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