Searched refs:clock_ctl (Results 26 – 34 of 34) sorted by relevance
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926 if (clock_ctl.mode_ntpdate) { in transmit()2788 clock_ctl.hardpps_enable = false; in init_proto()2836 clock_ctl.ntp_enable = (bool)value; in proto_config()2840 clock_ctl.hardpps_enable = (bool)value; in proto_config()
677 if (clock_ctl.mode_ntpdate) in newpeer()
1005 clock_ctl.hardpps_enable = true; in refclock_params()
2660 if (clock_ctl.mode_ntpdate) in peer_config()
914 clock_ctl.hardpps_enable = true; in oncore_ppsapi()
2420 clock_ctl.hardpps_enable = true; in parse_hardpps()
6145 u32 clock_ctl = tr32(TG3_EAV_REF_CLCK_CTL); in tg3_refclk_write() local6147 tw32(TG3_EAV_REF_CLCK_CTL, clock_ctl | TG3_EAV_REF_CLCK_CTL_STOP); in tg3_refclk_write()6150 tw32_f(TG3_EAV_REF_CLCK_CTL, clock_ctl | TG3_EAV_REF_CLCK_CTL_RESUME); in tg3_refclk_write()6266 u32 clock_ctl; in tg3_ptp_enable() local6279 clock_ctl = tr32(TG3_EAV_REF_CLCK_CTL); in tg3_ptp_enable()6280 clock_ctl &= ~TG3_EAV_CTL_TSYNC_GPIO_MASK; in tg3_ptp_enable()6308 clock_ctl | TG3_EAV_CTL_TSYNC_WDOG0); in tg3_ptp_enable()6311 tw32(TG3_EAV_REF_CLCK_CTL, clock_ctl); in tg3_ptp_enable()