/dports/emulators/qemu5/qemu-5.2.0/target/arm/ |
H A D | translate-sve.c | 899 TCGv_i64 incr = cpu_reg(s, a->rm); in trans_INDEX_ir() 909 TCGv_i64 start = cpu_reg(s, a->rn); in trans_INDEX_ri() 921 TCGv_i64 incr = cpu_reg(s, a->rm); in trans_INDEX_rr() 954 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_RDVL() 1707 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_INCDEC_r() 1723 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_SINCDEC_r_32() 1749 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_SINCDEC_r_64() 2539 reg = cpu_reg(s, a->rd); in do_clast_general() 3008 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_INCDECP_r() 3042 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_SINCDECP_r_32() [all …]
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/arm/ |
H A D | translate-sve.c | 912 TCGv_i64 incr = cpu_reg(s, a->rm); in trans_INDEX_ir() 922 TCGv_i64 start = cpu_reg(s, a->rn); in trans_INDEX_ri() 934 TCGv_i64 incr = cpu_reg(s, a->rm); in trans_INDEX_rr() 967 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_RDVL() 1753 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_INCDEC_r() 1769 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_SINCDEC_r_32() 1795 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_SINCDEC_r_64() 2592 reg = cpu_reg(s, a->rd); in do_clast_general() 3065 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_INCDECP_r() 3099 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_SINCDECP_r_32() [all …]
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/arm/ |
H A D | translate-sve.c | 919 TCGv_i64 incr = cpu_reg(s, a->rm); in trans_INDEX_ir() 929 TCGv_i64 start = cpu_reg(s, a->rn); in trans_INDEX_ri() 941 TCGv_i64 incr = cpu_reg(s, a->rm); in trans_INDEX_rr() 969 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_RDVL() 1754 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_INCDEC_r() 1771 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_SINCDEC_r_32() 1798 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_SINCDEC_r_64() 2596 reg = cpu_reg(s, a->rd); in do_clast_general() 3073 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_INCDECP_r() 3109 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_SINCDECP_r_32() [all …]
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/dports/emulators/qemu42/qemu-4.2.1/target/arm/ |
H A D | translate-sve.c | 912 TCGv_i64 incr = cpu_reg(s, a->rm); in trans_INDEX_ir() 922 TCGv_i64 start = cpu_reg(s, a->rn); in trans_INDEX_ri() 934 TCGv_i64 incr = cpu_reg(s, a->rm); in trans_INDEX_rr() 967 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_RDVL() 1753 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_INCDEC_r() 1769 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_SINCDEC_r_32() 1795 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_SINCDEC_r_64() 2592 reg = cpu_reg(s, a->rd); in do_clast_general() 3065 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_INCDECP_r() 3099 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_SINCDECP_r_32() [all …]
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/arm/ |
H A D | translate-sve.c | 912 TCGv_i64 incr = cpu_reg(s, a->rm); in trans_INDEX_ir() 922 TCGv_i64 start = cpu_reg(s, a->rn); in trans_INDEX_ri() 934 TCGv_i64 incr = cpu_reg(s, a->rm); in trans_INDEX_rr() 967 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_RDVL() 1753 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_INCDEC_r() 1769 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_SINCDEC_r_32() 1795 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_SINCDEC_r_64() 2592 reg = cpu_reg(s, a->rd); in do_clast_general() 3065 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_INCDECP_r() 3099 TCGv_i64 reg = cpu_reg(s, a->rd); in trans_SINCDECP_r_32() [all …]
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/dports/emulators/simh/simh-3.9.0_5/SDS/ |
H A D | sds_sys.c | 47 extern REG cpu_reg[]; 62 REG *sim_PC = &cpu_reg[0];
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/dports/emulators/simh-hp3000/simh-hp3000-3.11.0.10/SCP/HP3000/ |
H A D | hp3000_cpu.c | 1066 static REG cpu_reg [] = { variable 1184 cpu_reg, /* register array */ 3769 for (index = 0; cpu_reg [index].loc != NULL; index++) /* scan the CPU register list */ in set_model() 3770 … if (cpu_reg [index].loc == &PBANK /* and set the maximum allowed value */ in set_model() 3771 || cpu_reg [index].loc == &DBANK /* for the three bank registers */ in set_model() 3772 || cpu_reg [index].loc == &SBANK) /* to the highest bank number */ in set_model() 3773 cpu_reg [index].maxval = mem_bank_mask; /* for the new CPU model */ in set_model()
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/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm64/kvm/hyp/nvhe/ |
H A D | setup.c | 179 cpu_reg(host_ctxt, 1) = ret; in __pkvm_init_finalise()
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/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm64/kvm/hyp/nvhe/ |
H A D | setup.c | 179 cpu_reg(host_ctxt, 1) = ret; in __pkvm_init_finalise()
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/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm64/kvm/hyp/nvhe/ |
H A D | setup.c | 179 cpu_reg(host_ctxt, 1) = ret; in __pkvm_init_finalise()
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/dports/emulators/simh/simh-3.9.0_5/I1620/ |
H A D | i1620_sys.c | 40 extern REG cpu_reg[]; 56 REG *sim_PC = &cpu_reg[0];
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/dports/emulators/simh/simh-3.9.0_5/Interdata/ |
H A D | id16_sys.c | 47 extern REG cpu_reg[]; 67 REG *sim_PC = &cpu_reg[0];
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H A D | id32_sys.c | 51 extern REG cpu_reg[]; 71 REG *sim_PC = &cpu_reg[0];
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/dports/emulators/simh/simh-3.9.0_5/PDP1/ |
H A D | pdp1_sys.c | 63 extern REG cpu_reg[]; 82 REG *sim_PC = &cpu_reg[0];
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/dports/emulators/simh/simh-3.9.0_5/I7094/ |
H A D | i7094_sys.c | 46 extern REG cpu_reg[]; 63 REG *sim_PC = &cpu_reg[0];
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/dports/emulators/simh/simh-3.9.0_5/GRI/ |
H A D | gri_sys.c | 38 extern REG cpu_reg[]; 56 REG *sim_PC = &cpu_reg[0];
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/dports/emulators/simh/simh-3.9.0_5/AltairZ80/ |
H A D | altairz80_sys.c | 36 extern REG cpu_reg[]; 98 REG *sim_PC = &cpu_reg[6];
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/dports/emulators/simh/simh-3.9.0_5/HP2100/ |
H A D | hp2100_sys.c | 65 extern REG cpu_reg[]; 100 REG *sim_PC = &cpu_reg[0];
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/ethernet/broadcom/ |
H A D | bnx2.c | 3833 load_cpu_fw(struct bnx2 *bp, const struct cpu_reg *cpu_reg, in load_cpu_fw() argument 3843 val |= cpu_reg->mode_value_halt; in load_cpu_fw() 3844 bnx2_reg_wr_ind(bp, cpu_reg->mode, val); in load_cpu_fw() 3845 bnx2_reg_wr_ind(bp, cpu_reg->state, cpu_reg->state_value_clear); in load_cpu_fw() 3853 offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base); in load_cpu_fw() 3867 offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base); in load_cpu_fw() 3881 offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base); in load_cpu_fw() 3890 bnx2_reg_wr_ind(bp, cpu_reg->inst, 0); in load_cpu_fw() 3893 bnx2_reg_wr_ind(bp, cpu_reg->pc, val); in load_cpu_fw() 3897 val &= ~cpu_reg->mode_value_halt; in load_cpu_fw() [all …]
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/ethernet/broadcom/ |
H A D | bnx2.c | 3833 load_cpu_fw(struct bnx2 *bp, const struct cpu_reg *cpu_reg, in load_cpu_fw() argument 3843 val |= cpu_reg->mode_value_halt; in load_cpu_fw() 3844 bnx2_reg_wr_ind(bp, cpu_reg->mode, val); in load_cpu_fw() 3845 bnx2_reg_wr_ind(bp, cpu_reg->state, cpu_reg->state_value_clear); in load_cpu_fw() 3853 offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base); in load_cpu_fw() 3867 offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base); in load_cpu_fw() 3881 offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base); in load_cpu_fw() 3890 bnx2_reg_wr_ind(bp, cpu_reg->inst, 0); in load_cpu_fw() 3893 bnx2_reg_wr_ind(bp, cpu_reg->pc, val); in load_cpu_fw() 3897 val &= ~cpu_reg->mode_value_halt; in load_cpu_fw() [all …]
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/ethernet/broadcom/ |
H A D | bnx2.c | 3833 load_cpu_fw(struct bnx2 *bp, const struct cpu_reg *cpu_reg, in load_cpu_fw() argument 3843 val |= cpu_reg->mode_value_halt; in load_cpu_fw() 3844 bnx2_reg_wr_ind(bp, cpu_reg->mode, val); in load_cpu_fw() 3845 bnx2_reg_wr_ind(bp, cpu_reg->state, cpu_reg->state_value_clear); in load_cpu_fw() 3853 offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base); in load_cpu_fw() 3867 offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base); in load_cpu_fw() 3881 offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base); in load_cpu_fw() 3890 bnx2_reg_wr_ind(bp, cpu_reg->inst, 0); in load_cpu_fw() 3893 bnx2_reg_wr_ind(bp, cpu_reg->pc, val); in load_cpu_fw() 3897 val &= ~cpu_reg->mode_value_halt; in load_cpu_fw() [all …]
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/dports/emulators/xhomer/xhomer-9-16-06/ |
H A D | pdp11_sys.c | 26 extern REG cpu_reg[]; 42 REG *sim_PC = &cpu_reg[0];
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/dports/emulators/pcem/pcem_emulator-pcem-faf5d6423060/src/ |
H A D | 386_dynarec.c | 184 #define fetch_ea_16(rmdat) cpu_state.pc++; cpu_mod=(rmdat >> 6) & 3; cpu_reg=(rmdat >>… 185 #define fetch_ea_32(rmdat) cpu_state.pc++; cpu_mod=(rmdat >> 6) & 3; cpu_reg=(rmdat >>…
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/dports/emulators/simh/simh-3.9.0_5/S3/ |
H A D | s3_sys.c | 43 extern REG cpu_reg[]; 64 REG *sim_PC = &cpu_reg[0];
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/dports/emulators/simh/simh-3.9.0_5/LGP/ |
H A D | lgp_cpu.c | 185 REG cpu_reg[] = { variable 225 "CPU", &cpu_unit, cpu_reg, cpu_mod,
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