| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/japanese/timidity++-slang/TiMidity++-2.15.0/interface/ |
| H A D | tk_c.c | 84 static void ctl_reset(void);
427 static void ctl_reset(void) in ctl_reset() function
1236 ctl_reset(); in ctl_event()
|
| H A D | vt100_c.c | 121 static void ctl_reset(void);
474 static void ctl_reset(void) in ctl_reset() function
1284 ctl_reset(); in ctl_event()
|
| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 331 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
342 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
346 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/sysutils/u-boot-pine-h64/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2);
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset);
351 rk_clrreg(&cru->softrst_con[10], ctl_reset);
|
| /dports/sysutils/u-boot-pcduino3/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/sysutils/u-boot-pinebook/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/sysutils/u-boot-pine64/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|
| /dports/audio/ocp/ocp-0.2.90/playgmi/timidity-git/interface/ |
| H A D | tk_c.c | 84 static void ctl_reset(void);
427 static void ctl_reset(void) in ctl_reset() function
1236 ctl_reset(); in ctl_event()
|
| H A D | vt100_c.c | 121 static void ctl_reset(void);
474 static void ctl_reset(void) in ctl_reset() function
1284 ctl_reset(); in ctl_event()
|
| /dports/sysutils/u-boot-orangepi-pc2/u-boot-2021.07/drivers/ram/rockchip/ |
| H A D | dmc-rk3368.c | 336 const u32 ctl_reset = BIT(3) | BIT(2); in ddrctl_reset() local
347 rk_setreg(&cru->softrst_con[10], ctl_reset | phy_reset); in ddrctl_reset()
351 rk_clrreg(&cru->softrst_con[10], ctl_reset); in ddrctl_reset()
|