/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.s.dcache.wb.ll | 3 declare void @llvm.amdgcn.s.dcache.wb() #0 11 call void @llvm.amdgcn.s.dcache.wb() 20 call void @llvm.amdgcn.s.dcache.wb()
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.s.dcache.wb.vol.ll | 3 declare void @llvm.amdgcn.s.dcache.wb.vol() #0 11 call void @llvm.amdgcn.s.dcache.wb.vol() 20 call void @llvm.amdgcn.s.dcache.wb.vol()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.s.dcache.wb.vol.ll | 3 declare void @llvm.amdgcn.s.dcache.wb.vol() #0 11 call void @llvm.amdgcn.s.dcache.wb.vol() 20 call void @llvm.amdgcn.s.dcache.wb.vol()
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H A D | llvm.amdgcn.s.dcache.wb.ll | 3 declare void @llvm.amdgcn.s.dcache.wb() #0 11 call void @llvm.amdgcn.s.dcache.wb() 20 call void @llvm.amdgcn.s.dcache.wb()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.s.dcache.wb.ll | 3 declare void @llvm.amdgcn.s.dcache.wb() #0 11 call void @llvm.amdgcn.s.dcache.wb() 20 call void @llvm.amdgcn.s.dcache.wb()
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H A D | llvm.amdgcn.s.dcache.wb.vol.ll | 3 declare void @llvm.amdgcn.s.dcache.wb.vol() #0 11 call void @llvm.amdgcn.s.dcache.wb.vol() 20 call void @llvm.amdgcn.s.dcache.wb.vol()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.s.dcache.wb.vol.ll | 3 declare void @llvm.amdgcn.s.dcache.wb.vol() #0 11 call void @llvm.amdgcn.s.dcache.wb.vol() 20 call void @llvm.amdgcn.s.dcache.wb.vol()
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H A D | llvm.amdgcn.s.dcache.wb.ll | 3 declare void @llvm.amdgcn.s.dcache.wb() #0 11 call void @llvm.amdgcn.s.dcache.wb() 20 call void @llvm.amdgcn.s.dcache.wb()
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/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.s.dcache.wb.vol.ll | 3 declare void @llvm.amdgcn.s.dcache.wb.vol() #0 11 call void @llvm.amdgcn.s.dcache.wb.vol() 20 call void @llvm.amdgcn.s.dcache.wb.vol()
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H A D | llvm.amdgcn.s.dcache.wb.ll | 3 declare void @llvm.amdgcn.s.dcache.wb() #0 11 call void @llvm.amdgcn.s.dcache.wb() 20 call void @llvm.amdgcn.s.dcache.wb()
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/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.s.dcache.wb.ll | 3 declare void @llvm.amdgcn.s.dcache.wb() #0 11 call void @llvm.amdgcn.s.dcache.wb() 20 call void @llvm.amdgcn.s.dcache.wb()
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H A D | llvm.amdgcn.s.dcache.wb.vol.ll | 3 declare void @llvm.amdgcn.s.dcache.wb.vol() #0 11 call void @llvm.amdgcn.s.dcache.wb.vol() 20 call void @llvm.amdgcn.s.dcache.wb.vol()
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/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.s.dcache.wb.vol.ll | 3 declare void @llvm.amdgcn.s.dcache.wb.vol() #0 11 call void @llvm.amdgcn.s.dcache.wb.vol() 20 call void @llvm.amdgcn.s.dcache.wb.vol()
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H A D | llvm.amdgcn.s.dcache.wb.ll | 3 declare void @llvm.amdgcn.s.dcache.wb() #0 11 call void @llvm.amdgcn.s.dcache.wb() 20 call void @llvm.amdgcn.s.dcache.wb()
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.s.dcache.wb.ll | 3 declare void @llvm.amdgcn.s.dcache.wb() #0 11 call void @llvm.amdgcn.s.dcache.wb() 20 call void @llvm.amdgcn.s.dcache.wb()
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H A D | llvm.amdgcn.s.dcache.wb.vol.ll | 3 declare void @llvm.amdgcn.s.dcache.wb.vol() #0 11 call void @llvm.amdgcn.s.dcache.wb.vol() 20 call void @llvm.amdgcn.s.dcache.wb.vol()
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/dports/sysutils/fusefs-s3backer/s3backer-1.5.4/ |
H A D | Makefile.am | 43 dcache.h \ 64 dcache.c \ 79 dcache.c \
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/dports/emulators/qemu/qemu-6.2.0/pc-bios/ |
H A D | petalogix-ml605.dts | 52 xlnx,allow-dcache-wr = < 0x01 >; 61 xlnx,dcache-addr-tag = < 0x11 >; 62 xlnx,dcache-always-used = < 0x01 >; 63 xlnx,dcache-byte-size = < 0x800 >; 64 xlnx,dcache-data-width = < 0x00 >; 66 xlnx,dcache-interface = < 0x01 >; 67 xlnx,dcache-line-len = < 0x08 >; 68 xlnx,dcache-use-fsl = < 0x00 >; 69 xlnx,dcache-use-writeback = < 0x01 >; 70 xlnx,dcache-victims = < 0x00 >; [all …]
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/dports/emulators/qemu60/qemu-6.0.0/pc-bios/ |
H A D | petalogix-ml605.dts | 52 xlnx,allow-dcache-wr = < 0x01 >; 61 xlnx,dcache-addr-tag = < 0x11 >; 62 xlnx,dcache-always-used = < 0x01 >; 63 xlnx,dcache-byte-size = < 0x800 >; 64 xlnx,dcache-data-width = < 0x00 >; 66 xlnx,dcache-interface = < 0x01 >; 67 xlnx,dcache-line-len = < 0x08 >; 68 xlnx,dcache-use-fsl = < 0x00 >; 69 xlnx,dcache-use-writeback = < 0x01 >; 70 xlnx,dcache-victims = < 0x00 >; [all …]
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/dports/emulators/qemu5/qemu-5.2.0/pc-bios/ |
H A D | petalogix-ml605.dts | 52 xlnx,allow-dcache-wr = < 0x01 >; 61 xlnx,dcache-addr-tag = < 0x11 >; 62 xlnx,dcache-always-used = < 0x01 >; 63 xlnx,dcache-byte-size = < 0x800 >; 64 xlnx,dcache-data-width = < 0x00 >; 66 xlnx,dcache-interface = < 0x01 >; 67 xlnx,dcache-line-len = < 0x08 >; 68 xlnx,dcache-use-fsl = < 0x00 >; 69 xlnx,dcache-use-writeback = < 0x01 >; 70 xlnx,dcache-victims = < 0x00 >; [all …]
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/pc-bios/ |
H A D | petalogix-ml605.dts | 52 xlnx,allow-dcache-wr = < 0x01 >; 61 xlnx,dcache-addr-tag = < 0x11 >; 62 xlnx,dcache-always-used = < 0x01 >; 63 xlnx,dcache-byte-size = < 0x800 >; 64 xlnx,dcache-data-width = < 0x00 >; 66 xlnx,dcache-interface = < 0x01 >; 67 xlnx,dcache-line-len = < 0x08 >; 68 xlnx,dcache-use-fsl = < 0x00 >; 69 xlnx,dcache-use-writeback = < 0x01 >; 70 xlnx,dcache-victims = < 0x00 >; [all …]
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/dports/net/haproxy20/haproxy-2.0.26/include/types/ |
H A D | peers.h | 79 struct dcache *dcache; /* dictionary cache */ member 127 struct dcache { struct
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/dports/net/haproxy/haproxy-2.4.10/include/haproxy/ |
H A D | peers-t.h | 81 struct dcache *dcache; /* dictionary cache */ member 128 struct dcache { struct
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/dports/net/haproxy21/haproxy-2.1.12/include/types/ |
H A D | peers.h | 79 struct dcache *dcache; /* dictionary cache */ member 127 struct dcache { struct
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/dports/net/haproxy23/haproxy-2.3.16/include/haproxy/ |
H A D | peers-t.h | 81 struct dcache *dcache; /* dictionary cache */ member 128 struct dcache { struct
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