| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 30 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
318 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
322 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 30 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
318 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
322 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-pcduino3/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-pine-h64/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-pine64/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-pinebook/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
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| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot/arch/arm/mach-keystone/ |
| H A D | ddr3_spd.c | 31 debug_ddr_cfg("dcr_val 0x%08X\n", ptr->dcr_val); in dump_phy_config()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
323 spd_cb->phy_cfg.dcr_val |= (1 << 27) | (1 << 29); in init_ddr3param()
|