| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 49 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
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| H A D | ARMFastISel.cpp | 2680 bool hasV6Ops = Subtarget->hasV6Ops(); in ARMEmitIntExt() local
2684 bool isSingleInstr = isSingleInstrTbl[Bitness][isThumb2][hasV6Ops][isZExt]; in ARMEmitIntExt()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 49 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
|
| H A D | ARMFastISel.cpp | 2685 bool hasV6Ops = Subtarget->hasV6Ops(); in ARMEmitIntExt() local
2689 bool isSingleInstr = isSingleInstrTbl[Bitness][isThumb2][hasV6Ops][isZExt]; in ARMEmitIntExt()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 50 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
|
| H A D | ARMFastISel.cpp | 2682 bool hasV6Ops = Subtarget->hasV6Ops();
2686 bool isSingleInstr = isSingleInstrTbl[Bitness][isThumb2][hasV6Ops][isZExt];
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 50 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
|
| H A D | ARMFastISel.cpp | 2682 bool hasV6Ops = Subtarget->hasV6Ops(); in ARMEmitIntExt() local
2686 bool isSingleInstr = isSingleInstrTbl[Bitness][isThumb2][hasV6Ops][isZExt]; in ARMEmitIntExt()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 49 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
|
| H A D | ARMFastISel.cpp | 2686 bool hasV6Ops = Subtarget->hasV6Ops(); in ARMEmitIntExt() local
2690 bool isSingleInstr = isSingleInstrTbl[Bitness][isThumb2][hasV6Ops][isZExt]; in ARMEmitIntExt()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 49 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
|
| H A D | ARMFastISel.cpp | 2680 bool hasV6Ops = Subtarget->hasV6Ops(); in ARMEmitIntExt() local
2684 bool isSingleInstr = isSingleInstrTbl[Bitness][isThumb2][hasV6Ops][isZExt]; in ARMEmitIntExt()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 50 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
|
| H A D | ARMFastISel.cpp | 2682 bool hasV6Ops = Subtarget->hasV6Ops(); in ARMEmitIntExt() local
2686 bool isSingleInstr = isSingleInstrTbl[Bitness][isThumb2][hasV6Ops][isZExt]; in ARMEmitIntExt()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 49 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 50 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 50 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 49 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
|
| H A D | ARMFastISel.cpp | 2685 bool hasV6Ops = Subtarget->hasV6Ops(); in ARMEmitIntExt() local
2689 bool isSingleInstr = isSingleInstrTbl[Bitness][isThumb2][hasV6Ops][isZExt]; in ARMEmitIntExt()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 49 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 50 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 49 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 50 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 50 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 2680 bool hasV6Ops = Subtarget->hasV6Ops(); in ARMEmitIntExt() local
2684 bool isSingleInstr = isSingleInstrTbl[Bitness][isThumb2][hasV6Ops][isZExt]; in ARMEmitIntExt()
|