| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/powerpc/sysdev/ |
| H A D | dcr-low.S | 35 mfdcr r3,0; blr
41 mfdcr r3,dcr; blr
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/powerpc/sysdev/ |
| H A D | dcr-low.S | 35 mfdcr r3,0; blr
41 mfdcr r3,dcr; blr
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| /dports/multimedia/libv4l/linux-5.13-rc2/arch/powerpc/sysdev/ |
| H A D | dcr-low.S | 35 mfdcr r3,0; blr
41 mfdcr r3,dcr; blr
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| /dports/sysutils/u-boot-utilite/u-boot-2015.07/board/esd/cpci405/ |
| H A D | cpci405.c | 162 if (mfdcr(CPC0_PSR) & PSR_PCI_ARBIT_EN) in cpci405_host()
176 CPC0_CR0Reg = mfdcr(CPC0_CR0); in cpci405_version()
231 CPC0_CR0Reg = mfdcr(CPC0_CR0); in misc_init_r()
348 CPC0_CR0Reg = mfdcr(CPC0_CR0); in misc_init_r()
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| H A D | flash.c | 79 pbcr = mfdcr (EBC0_CFGDATA); in flash_init()
96 pbcr = mfdcr (EBC0_CFGDATA); in flash_init()
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/ |
| H A D | reginfo.c | 235 #define PRINT_DCR(dcr) printf("0x%08x %-16s: 0x%08x\n", dcr,#dcr, mfdcr(dcr));
344 value = mfdcr(SDRAM0_CFGDATA); in ppc4xx_reginfo()
348 value = mfdcr(EBC0_CFGDATA); in ppc4xx_reginfo()
352 value = mfdcr(CPR0_CFGDATA); in ppc4xx_reginfo()
356 value = mfdcr(SDR0_CFGDATA); in ppc4xx_reginfo()
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/ |
| H A D | reginfo.c | 235 #define PRINT_DCR(dcr) printf("0x%08x %-16s: 0x%08x\n", dcr,#dcr, mfdcr(dcr));
344 value = mfdcr(SDRAM0_CFGDATA); in ppc4xx_reginfo()
348 value = mfdcr(EBC0_CFGDATA); in ppc4xx_reginfo()
352 value = mfdcr(CPR0_CFGDATA); in ppc4xx_reginfo()
356 value = mfdcr(SDR0_CFGDATA); in ppc4xx_reginfo()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/ |
| H A D | reginfo.c | 235 #define PRINT_DCR(dcr) printf("0x%08x %-16s: 0x%08x\n", dcr,#dcr, mfdcr(dcr));
344 value = mfdcr(SDRAM0_CFGDATA); in ppc4xx_reginfo()
348 value = mfdcr(EBC0_CFGDATA); in ppc4xx_reginfo()
352 value = mfdcr(CPR0_CFGDATA); in ppc4xx_reginfo()
356 value = mfdcr(SDR0_CFGDATA); in ppc4xx_reginfo()
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/ |
| H A D | reginfo.c | 235 #define PRINT_DCR(dcr) printf("0x%08x %-16s: 0x%08x\n", dcr,#dcr, mfdcr(dcr));
344 value = mfdcr(SDRAM0_CFGDATA); in ppc4xx_reginfo()
348 value = mfdcr(EBC0_CFGDATA); in ppc4xx_reginfo()
352 value = mfdcr(CPR0_CFGDATA); in ppc4xx_reginfo()
356 value = mfdcr(SDR0_CFGDATA); in ppc4xx_reginfo()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/ |
| H A D | reginfo.c | 235 #define PRINT_DCR(dcr) printf("0x%08x %-16s: 0x%08x\n", dcr,#dcr, mfdcr(dcr));
344 value = mfdcr(SDRAM0_CFGDATA); in ppc4xx_reginfo()
348 value = mfdcr(EBC0_CFGDATA); in ppc4xx_reginfo()
352 value = mfdcr(CPR0_CFGDATA); in ppc4xx_reginfo()
356 value = mfdcr(SDR0_CFGDATA); in ppc4xx_reginfo()
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| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/ |
| H A D | reginfo.c | 235 #define PRINT_DCR(dcr) printf("0x%08x %-16s: 0x%08x\n", dcr,#dcr, mfdcr(dcr));
344 value = mfdcr(SDRAM0_CFGDATA); in ppc4xx_reginfo()
348 value = mfdcr(EBC0_CFGDATA); in ppc4xx_reginfo()
352 value = mfdcr(CPR0_CFGDATA); in ppc4xx_reginfo()
356 value = mfdcr(SDR0_CFGDATA); in ppc4xx_reginfo()
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| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/powerpc/cpu/ppc4xx/ |
| H A D | reginfo.c | 222 #define PRINT_DCR(dcr) printf("0x%08x %-16s: 0x%08x\n", dcr,#dcr, mfdcr(dcr));
331 value = mfdcr(SDRAM0_CFGDATA); in ppc4xx_reginfo()
335 value = mfdcr(EBC0_CFGDATA); in ppc4xx_reginfo()
339 value = mfdcr(CPR0_CFGDATA); in ppc4xx_reginfo()
343 value = mfdcr(SDR0_CFGDATA); in ppc4xx_reginfo()
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| H A D | 4xx_uart.c | 32 #define MFREG(a, d) d = mfdcr(a)
177 reg = mfdcr(CPC0_CR0) & ~CR0_MASK; in get_serial_clock()
209 reg = mfdcr(CPC0_UCR) & ~(UCR0_MASK | UCR1_MASK); in get_serial_clock()
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| H A D | cmd_ecctest.c | 222 mfdcr(SDRAM_ERRADDULL), mfdcr(SDRAM_ERRADDLLL)); in do_ecctest()
|
| H A D | start.S | 675 mfdcr r1,ISRAM0_DPC
678 mfdcr r1,ISRAM0_PMEG
712 mfdcr r1,ISRAM1_DPC
715 mfdcr r1,ISRAM1_PMEG
1752 mfdcr r5, CPC0_PLLMR1
1799 mfdcr r4, CPC0_BOOT
1809 mfdcr r4, CPC0_BOOT
1818 mfdcr r3, CPC0_PLLMR0
1819 mfdcr r4, CPC0_PLLMR1
1837 mfdcr r3, CPC0_PLLMR0
[all …]
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| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/ |
| H A D | reginfo.c | 235 #define PRINT_DCR(dcr) printf("0x%08x %-16s: 0x%08x\n", dcr,#dcr, mfdcr(dcr));
344 value = mfdcr(SDRAM0_CFGDATA); in ppc4xx_reginfo()
348 value = mfdcr(EBC0_CFGDATA); in ppc4xx_reginfo()
352 value = mfdcr(CPR0_CFGDATA); in ppc4xx_reginfo()
356 value = mfdcr(SDR0_CFGDATA); in ppc4xx_reginfo()
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| /dports/sysutils/u-boot-utilite/u-boot-2015.07/board/esd/cpci2dp/ |
| H A D | cpci2dp.c | 23 CPC0_CR0Reg = mfdcr(CPC0_CR0); in board_early_init_f()
68 CPC0_CR0Reg = mfdcr(CPC0_CR0); in misc_init_r()
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| /dports/sysutils/u-boot-utilite/u-boot-2015.07/board/amcc/luan/ |
| H A D | luan.c | 164 while (!(mfdcr( L2_CACHE_STAT ) & 0x80000000 )) ;; /* poll L2_SR for completion */ in l2cache_enable()
187 return (mfdcr( L2_CACHE_CFG ) & 0x60000000) != 0; in l2cache_status()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/powerpc/include/asm/ |
| H A D | dcr-native.h | 29 #define dcr_read_native(host, dcr_n) mfdcr(dcr_n + host.base)
53 #define mfdcr(rn) \ macro
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/powerpc/include/asm/ |
| H A D | dcr-native.h | 29 #define dcr_read_native(host, dcr_n) mfdcr(dcr_n + host.base)
53 #define mfdcr(rn) \ macro
|
| /dports/multimedia/libv4l/linux-5.13-rc2/arch/powerpc/include/asm/ |
| H A D | dcr-native.h | 29 #define dcr_read_native(host, dcr_n) mfdcr(dcr_n + host.base)
53 #define mfdcr(rn) \ macro
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/post/cpu/ppc4xx/ |
| H A D | uart.c | 72 #define MFREG(a, d) d = mfdcr(a)
279 reg = mfdcr(CPC0_UCR) & ~(UCR0_MASK | UCR1_MASK); in uart_post_init()
289 reg = mfdcr(CPC0_CR0) & ~CR0_MASK; in uart_post_init()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/post/cpu/ppc4xx/ |
| H A D | uart.c | 72 #define MFREG(a, d) d = mfdcr(a)
279 reg = mfdcr(CPC0_UCR) & ~(UCR0_MASK | UCR1_MASK); in uart_post_init()
289 reg = mfdcr(CPC0_CR0) & ~CR0_MASK; in uart_post_init()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/post/cpu/ppc4xx/ |
| H A D | uart.c | 72 #define MFREG(a, d) d = mfdcr(a)
279 reg = mfdcr(CPC0_UCR) & ~(UCR0_MASK | UCR1_MASK); in uart_post_init()
289 reg = mfdcr(CPC0_CR0) & ~CR0_MASK; in uart_post_init()
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/post/cpu/ppc4xx/ |
| H A D | uart.c | 72 #define MFREG(a, d) d = mfdcr(a)
279 reg = mfdcr(CPC0_UCR) & ~(UCR0_MASK | UCR1_MASK); in uart_post_init()
289 reg = mfdcr(CPC0_CR0) & ~CR0_MASK; in uart_post_init()
|