| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
| H A D | BF523_cdef.h | 166 #define pICPLB_ADDR1 ((void * volatile *)ICPLB_ADDR1) /* Instruction Cacheability… macro
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| H A D | BF522_cdef.h | 166 #define pICPLB_ADDR1 ((void * volatile *)ICPLB_ADDR1) /* Instruction Cacheability… macro
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| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/ |
| H A D | BF549_cdef.h | 151 #define pICPLB_ADDR1 ((void * volatile *)ICPLB_ADDR1) /* Instruction Cacheability… macro
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| H A D | BF541_cdef.h | 151 #define pICPLB_ADDR1 ((void * volatile *)ICPLB_ADDR1) /* Instruction Cacheability… macro
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| H A D | BF542_cdef.h | 151 #define pICPLB_ADDR1 ((void * volatile *)ICPLB_ADDR1) /* Instruction Cacheability… macro
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| H A D | BF544_cdef.h | 151 #define pICPLB_ADDR1 ((void * volatile *)ICPLB_ADDR1) /* Instruction Cacheability… macro
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| H A D | BF548_cdef.h | 151 #define pICPLB_ADDR1 ((void * volatile *)ICPLB_ADDR1) /* Instruction Cacheability… macro
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| H A D | BF547_cdef.h | 151 #define pICPLB_ADDR1 ((void * volatile *)ICPLB_ADDR1) /* Instruction Cacheability… macro
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf561/ |
| H A D | BF561_cdef.h | 142 #define pICPLB_ADDR1 ((uint32_t volatile *)ICPLB_ADDR1) macro
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf561/ |
| H A D | BF561_cdef.h | 142 #define pICPLB_ADDR1 ((uint32_t volatile *)ICPLB_ADDR1) macro
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf561/ |
| H A D | BF561_cdef.h | 142 #define pICPLB_ADDR1 ((uint32_t volatile *)ICPLB_ADDR1) macro
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| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf561/ |
| H A D | BF561_cdef.h | 142 #define pICPLB_ADDR1 ((uint32_t volatile *)ICPLB_ADDR1) macro
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf561/ |
| H A D | BF561_cdef.h | 142 #define pICPLB_ADDR1 ((uint32_t volatile *)ICPLB_ADDR1) macro
|
| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf561/ |
| H A D | BF561_cdef.h | 142 #define pICPLB_ADDR1 ((uint32_t volatile *)ICPLB_ADDR1) macro
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf561/ |
| H A D | BF561_cdef.h | 142 #define pICPLB_ADDR1 ((uint32_t volatile *)ICPLB_ADDR1) macro
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
| H A D | BF524_cdef.h | 166 #define pICPLB_ADDR1 ((void * volatile *)ICPLB_ADDR1) /* Instruction Cacheability… macro
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| H A D | BF525_cdef.h | 166 #define pICPLB_ADDR1 ((void * volatile *)ICPLB_ADDR1) /* Instruction Cacheability… macro
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
| H A D | BF525_cdef.h | 166 #define pICPLB_ADDR1 ((void * volatile *)ICPLB_ADDR1) /* Instruction Cacheability… macro
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| H A D | BF524_cdef.h | 166 #define pICPLB_ADDR1 ((void * volatile *)ICPLB_ADDR1) /* Instruction Cacheability… macro
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
| H A D | BF524_cdef.h | 166 #define pICPLB_ADDR1 ((void * volatile *)ICPLB_ADDR1) /* Instruction Cacheability… macro
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| H A D | BF525_cdef.h | 166 #define pICPLB_ADDR1 ((void * volatile *)ICPLB_ADDR1) /* Instruction Cacheability…
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
| H A D | BF524_cdef.h | 166 #define pICPLB_ADDR1 ((void * volatile *)ICPLB_ADDR1) /* Instruction Cacheability… macro
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| H A D | BF525_cdef.h | 166 #define pICPLB_ADDR1 ((void * volatile *)ICPLB_ADDR1) /* Instruction Cacheability… macro
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| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf527/ |
| H A D | BF525_cdef.h | 166 #define pICPLB_ADDR1 ((void * volatile *)ICPLB_ADDR1) /* Instruction Cacheability… macro
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| H A D | BF524_cdef.h | 166 #define pICPLB_ADDR1 ((void * volatile *)ICPLB_ADDR1) /* Instruction Cacheability… macro
|