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Searched refs:tmp358 (Results 126 – 150 of 236) sorted by relevance

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/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AMDGPU/
H A Dsi-sgpr-spill.ll422 %tmp358 = fmul float %tmp349, %tmp357
434 %tmp383 = fmul float %tmp358, %tmp380
439 %tmp388 = fmul float %tmp387, %tmp358
534 %tmp492 = fmul float %tmp358, %tmp486
539 %tmp497 = fmul float %tmp496, %tmp358
574 %tmp532 = fmul float %tmp358, %tmp486
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AMDGPU/
H A Dsi-sgpr-spill.ll426 %tmp358 = fmul float %tmp349, %tmp357
438 %tmp383 = fmul float %tmp358, %tmp380
443 %tmp388 = fmul float %tmp387, %tmp358
538 %tmp492 = fmul float %tmp358, %tmp486
543 %tmp497 = fmul float %tmp496, %tmp358
578 %tmp532 = fmul float %tmp358, %tmp486
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AMDGPU/
H A Dsi-sgpr-spill.ll426 %tmp358 = fmul float %tmp349, %tmp357
438 %tmp383 = fmul float %tmp358, %tmp380
443 %tmp388 = fmul float %tmp387, %tmp358
538 %tmp492 = fmul float %tmp358, %tmp486
543 %tmp497 = fmul float %tmp496, %tmp358
578 %tmp532 = fmul float %tmp358, %tmp486
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dsi-sgpr-spill.ll434 %tmp358 = fmul float %tmp349, %tmp357
446 %tmp383 = fmul float %tmp358, %tmp380
451 %tmp388 = fmul float %tmp387, %tmp358
546 %tmp492 = fmul float %tmp358, %tmp486
551 %tmp497 = fmul float %tmp496, %tmp358
586 %tmp532 = fmul float %tmp358, %tmp486
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/
H A Dschedule-ilp.ll364 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
365 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
H A Dschedule-regpressure-limit.ll367 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
368 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
H A Dschedule-regpressure-limit3.ll366 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
367 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/
H A Dschedule-regpressure-limit3.ll366 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
367 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
H A Dschedule-regpressure-limit.ll367 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
368 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
H A Dschedule-ilp.ll364 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
365 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/
H A Dschedule-regpressure-limit.ll367 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
368 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
H A Dschedule-regpressure-limit3.ll366 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
367 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/
H A Dschedule-ilp.ll364 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
365 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
H A Dschedule-regpressure-limit.ll367 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
368 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
H A Dschedule-regpressure-limit3.ll366 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
367 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/
H A Dschedule-ilp.ll364 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
365 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
H A Dschedule-regpressure-limit.ll367 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
368 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
H A Dschedule-regpressure-limit3.ll366 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
367 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dschedule-regpressure-limit.ll367 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
368 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
H A Dschedule-regpressure-limit3.ll366 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
367 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
H A Dschedule-ilp.ll364 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
365 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/
H A Dschedule-regpressure-limit.ll367 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
368 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
H A Dschedule-ilp.ll364 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
365 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
H A Dschedule-regpressure-limit3.ll366 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
367 %tmp359 = load float, float addrspace(3)* %tmp358, align 4
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dschedule-regpressure-limit3.ll366 %tmp358 = getelementptr inbounds float, float addrspace(3)* %arg, i32 205
367 %tmp359 = load float, float addrspace(3)* %tmp358, align 4

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